Vertex 2002, Kona, Hawaii S.Xella – Rutherford Appleton Laboratory A vertex detector for the next linear collider Stefania Xella on behalf of the LCFI

Vertex 2002, Kona, Hawaii

A vertex detector for the next linear collider

Stefania Xella

on behalf of the LCFI collaboration: Bristol Univ., Lancaster Univ., Liverpool Univ., Oxford

Univ., Rutherford Appleton Laboratory, Queen Mary University London

hep.ph.liv.ac.uk/~green/lcfi/home.html


Next Linear Collider: a challenging environment for a

vertex detector

Main goal of the next linear collider is to measure PRECISELY the Higgs boson and possibly physics beyond the SM. This requires:

• High energy and luminosity, which might mean high beam background: Tesla: 50 s = 4 backgr hits/mm2 at 15 mm radius => fast detector readout • Optimal jet/flavour reconstruction due to event topology ee->tt : 6 jets, 2 b and 2 c flavoured ee->HA : 12 jets, 4 b flavoured => very granular, low material budget detector


Importance of the right design

5 layers, 0.1%X0

optimal vertex detector design is most important, to reach final physics goal !

PRELIMINARY tagging purity vs efficiencyPRELIMINARY tagging purity vs efficiency

4 layers, 0.2%X0


LCFI collaboration

Linear Collider Flavour Identification collaboration R&D work concentrates on a CCD pixel device :

designoptimizationfrom physics(see T.Kuhl talk) (RAL PPD/Bristol/Lancaster)

CCD developmentdesign/test(RAL PPD/E2V/Liverpool)

Readout IC,Driver IC, …(RAL ME/Oxford)

Mechanicalsupport(RAL PPD/Oxford)


Current design (I)

•Small pixels (20x20 m2) -> precise point resolution• thin detector(<0.1%X0) -> less multiple scattering• close to the IP (15 mm) -> smaller extrapolation error• large polar angle coverage |cos()|<0.90 with 5 hits |cos()|<0.96 with 3 hits


Current design (II)

• 5 layers -> higher resolution -> robust local alignment -> effective gamma conversion• fast readout (50s/layer) -> sustain high integrated background• gas cooled, low mass foam cryostat• minimal electronics (power + few optical fibres) -> little material at low angles


Very challenging !

Detector SLD Future LC

CCDs 96 120

CCD active area (cm2) 12.8 27.5

n. of pixels (106) 307 799

n. of layers 3 5

inner layer radius(mm) 28 15

layer thickness (%Xo) 0.4 0.1

cos() max 0.90 (2 hits)

0.96 (3 hits)

readout time (1 layer) 216 ms 50 s (8 ms NLC)


Column Parallel CCD (CPCCD)

Fast readout speed only with Column parallel readout new design!• Serial register omitted• 50 Mpixels/sec from each column• Image section clocked at high frequency• Each column has its own ADC/amplifier

“Classic CCD”Readout time

NM/Fout

N

M

N

Column Parallel CCDReadout time = N/Fout


Readout chip (CPR)

CMOS circuit bump bonded to the CCD

• Each column has amplifier and ADC

• Correlated double sampling for low noise

• Sparsification done in the chip

• Buffer memory and I/O interface


Ladder end

• Bump bonding CPCCD-CPR

• Driver IC provides high frequency (50MHz), low voltage (1.5V pp) clocks

• 2-phase driven CCD• Low inductance

connections and layout• Small clock and digital

feedthrough


Device simulations

ISE-TCAD software used at RAL. Mostly important: • To check feasibility of current design • Foresee show-stoppers• Test new ideas


Status of R&D program

• 5 or 6 stage R&D program in collaboration with E2V (former Marconi Applied Technology) company in the UK

• Test for high speed CCD readout (up to 50MPix/sec) successfully carried out on standard CCD58 device, in serial register

• Test for radiation damage at different temperatures/RO frequency being carried out

• CPCCD-1 and CPR-0,1 are (being) produced. Testing during end2002/beg2003• Several options for mechanical support design currently

investigated (unsupported/semi-supported)


First CPCCD-CPR

• 2 different charge transfer regions

• 3 types of output circuitry

• Independent CPCCD and CPR test possible

• Designed to work in almost any case!

Standard 2-phaseimplant

Metallised gates(high speed)

Metallised gates(high speed)

Field-enhanced 2-phase implant (high speed)

Sourcefollowers

Sourcefollowers DirectDirect

2-stagesource

followers

To pre-amps

ReadoutASIC

ReadoutASIC


First CPR tests

• 0.25 m CMOS • Charge transfer amplifier (CTA) in each ADC comparator• Designed to work up to 50 MHz• First CPR produced: small chip (2x6mm), testing flash ADC

and voltage amplifiers. Very promising results.• Next CPR contains CTA,ADC,FIFO memory in 20 m pitch


Tests of high speed CCD

E2V CCD58

• 3-phase driven CCD

• Classical readout

(serial register)• 12 m 2 pixels• 2 outputs• 2x106 pixels in

two sections


Tests of high speed CCD

55Fe X-ray spectrum at 50 Mpix/s

• MIP-like signal (5.9 keV X-rays generate 1620 electrons)

• Low noise 50 electrons at 50 MHz clocks

• CCD58 is designed to work with large signals at 10 Vpp clocks

• No performance deterioration down to 5 Vpp clocks

• Still good even at 3 Vpp clocks


low drive voltage/CTI

Clock traces and 55Fe spectrumfor low drive voltagesat 50 Mpix/sec

Radiation damage effects:• beam background expected about 50krad/year (neutron 5x109/cm2/year)• CTI should improve at fast readout : to be verified• CCD58 can be flexibly clocked from 1 to 50 MHZ, so it should be possible to obtain good results for CTE


Mechanical support R&D

Final goal is to design a CCD support structure with

• Low mass (< 0.1% Xo)• Stable shape under repeated temperature

cycles down to –100oC• Minimum metastability and hysteresis effects• Compatible with bump bonding• Robust assembly• Able to undergo gentle gas cooling


Thin ladder options

• Unsupported CCD : thinned to 50 m and held under tension. Tested experimentally:

* sagitta stability found better than 2 m at T>2N, but

* large differential contraction at CCD surface causes lateral curling + design is difficult to handle

• Semi-supported CCD :thinned to 20 m and attached to thin (not rigid) Be support, held under tension. Tested in ANSYS simulation:

* CCD surface may become dimpled: under study * may need fine pitched matrix of glue: difficult? => still lots of work to do and ideas to test


Thin ladder options

Be substrate

~300µm(0.12% X

0)

CCD

Recessed NuSil adhesive pads

CCDBe

substrate

1mm

CCD (20 μm thin) bonded with adhesive pads to 250 μm Be substrate

On cooling adhesive contracts more than Be pulls Si down on to Be surface

Layer thickness 0.12% Xo

1 mm diameter adhesive columns inside 2 mm diameter wells 200 μm deep in Be substrate


Summary

The LCFI collaboration R&D program is vast, and very challenging. Its aim is to provide a fast and low material budget CCD based pixel

detector to maximize the physics potential of the next

linearcollider

We are only at the first stage of a long R&D program, so stay tuned to hear more !


Backup slides


Backgrounds at the nlc


CPR-1

FIFO

250 5-bit flash ADCs

Charge Amplifiers Voltage Amplifiers

Wire/bump bond pads

Bump bond pads

In CPR-1:

Voltage amplifiers – for source follower outputs from the CPCCD

Charge amplifiers – for the direct connections to the CPCCD output nodes

Amplifier gain in both cases: 100 mV for 2000 e- signal

Noise below 100 e- RMS (simulated)

Direct connection and charge amplifier have many advantages:

Eliminate source followers in the CCD

Reduce power 5 times to 1 mW/channel

Programmable decay time constant (baseline restoration)

ADC full range: 100 mV, AC coupled, Correlated Double Sampling built-in (CTA does it)


Semi-supported silicon

~1mm(0.12% X

0)

20µm Si

CCD

Aerogel

Carbon fibre: CTE is tunable, layers can have optimal orientation and fibre diameter, difficult to simulate

Aerogel support: chemically bonds to Si, aerogel in compression

Many other ideas: CVD diamond, vacuum retention, etc…

Carbon fibre support

Aerogel support

Documents

Vertex 2002, Kona, Hawaii S.Xella – Rutherford Appleton Laboratory A vertex detector for the next linear collider Stefania Xella on behalf of the LCFI