W eb publishing of teaching material for ‘’Microcomputer Systems’’ and

Web publishing of teaching material for

‘’Microcomputer Systems’’

and

‘’Data Communications’’

M. Stojcev, G. Nikolic, T.Stankovic (FEEN)

Outline

Introduction

New teaching material for Architectures of Microcomputer Systems

New teaching material for Data Communications and Networking

Conclusion

writing material

power point presentation

writing material


Set-up of a web site

During the phase of development of the following two courses:

We have collected a great deal of material to help students to follow the courses, and we have set-up a web site to accompany the courses at

Architectures of Microcomputer Systems

Data Communications and Networking

www. elfak.ni.ac.yu/html/Informacije/vesti /resenja/mps/...

All of the figures, teaching materials, and writing parts of the exams are included in an Adobe Acrobate presentation

Outline

Introduction



Conclusion

writing material


writing material


Content of the

course:

ArchitectArchitectures of ures of MicrocoMicrocomputer mputer SystemsSystems

Introduction

Data representation

Arithmetic Appendix A: Digital Logic

Input -outputDatapath and Control

MemoryLanguage and Machine

Appendix: VHDL logic synthesis The instruction Set Artecture

Modern processors

Communications

Buses

Embedded systems

Writing material for


Translations (partial) of two books

Selected topics:

Embedded systems

RISC vs CISC

Low power design

Data acquisition systems

Structure of PC machines

Embedded processors

Modelling of embedded systems

High-level synthesis

Instruction level parallelism

Pipelining



The following chapters are translated:

Cht 1. Processor design, pp. 4 - 8

Cht 2. Pipeline processor design, pp 9 – 39

Cht 3. Superscalar proc. org., pp. 40 – 66

Cht 4. Superscalar Techniques, pp. 67 – 133

Layout of some tipical pages – Chapter 1




Translated:

Cht 2. Architecture of Y 86 processor, pp. 1 - 46



Layout of some tipical

pages – Chapter 2

E

M

W

F

D

Instructionmemory

Instructionmemory

PCincrement

PCincrement

Registerfile

Registerfile

ALUALU

Datamemory

Datamemory

SelectPC

rB

dstE dstMSelectA

ALUA

ALUB

Mem.control

Addr

srcA srcB

read

write

ALUfun.

Fetch

Decode

Execute

Memory

Write back

icode

data out

data in

A BM

E

M_valA

W_valM

W_valE

M_valA

W_valM

d_rvalA

f_PC

PredictPC

valE valM dstE dstM

Bchicode valE valA dstE dstM

icode ifun valC valA valB dstE dstM srcA srcB

valC valPicode ifun rA

predPC

CCCC

d_srcBd_srcA

e_Bch

M_Bch

0x000: irmovl $10,%edx

1 2 3 4 5 6 7 8 9

F D E M WF D E M W

0x006: irmovl $3,%eax F D E M WF D E M W

0x00c: nop F D E M WF D E M W

0x00d: nop F D E M WF D E M W

0x00e: nop F D E M WF D E M W

0x00f: addl %edx,%eax F D E M WF D E M W

10

W

R[%eax] 3

W

R[%eax] 3

D

valA R[%edx] = 10valB R[%eax] = 3

D

valA R[%edx] = 10valB R[%eax] = 3

# demo-h3.ys

Cycle 6

11

0x011: halt F D E M WF D E M W

Cycle 7


Data Dependencies: 3 Nop’s

Selected topics

Data acquisition systems, pp. 1 – 17

Structure of PC machines, pp. 1 – 6

Basics of Telemechanics, pp. 1 – 4

System for testing, pp. 1 - 10

Embedded system from beginning to the end, pp. 1 - 8

Embedded processors, pp. 1 – 7

Modeling design and optimization of embedded software, pp. 1 - 6

High-level synthesis, pp. 1 - 13

Embedded systems

RISC –CISC concept, pp. 1 - 5

Instruction level parallelism, pp. 1 - 11

Interleaving, pp. 1 - 6

Paralellism at instruction level, pp. 1 - 19

Scheduling, pp. 1 - 16

Branch prediction, pp. 1 - 13

Pipelining, pp. 1 - 17

Data dependencies, pp. 1 - 15

RISC vs CISC

325

32

3232

56

R1 (R2)+100

dekoderALU

Lw R1 (R2) 100

6 5

32

5 16

Lw R1 R2 100

memorija za

instrukcije32

32

+4(PC)

32

instrukcija

adresa

data_out

RF polje

ALU_opadd

RF polje

Inc 4 (PC)+4

L3

L2

L1

PC

1. IF

2. ID

3. EX

4. MA

reg_Read

sign_ext

data_out

R1 M((R2)+100)

32

5 32data_in

memorijapodataka

5. WBreg _write

mem_Read_adr

L4

32

Structure of FX-5P for Load

Lw R1,100(R2)

Superscalar vs Superpipeline

Low power design

Low power CMOS digital design, pp. 1 - 17

Sources of power dissipation, pp. 1 - 10

Outline

Introduction



Conclusion

writing material


writing material


Content of the course:

Data Data Communications Communications and Networkingand Networking

Part I

Part II

Part IV

Part III

Introduction: Network models

Physical layer:SignalsDigital & Analog TransmissionMultiplexing, Transmission MediaCircuit switching

Data Link Layer:Error Detection and CorrectionData Link Control ProtocolsMultiple Access, LAN, WLANCellular phone and Satellite Networks

Network Layer:Internetworking Addressing and RoutingNetwork Layer Protocols

Part V Transport Layer:UDP, TCP Quality of Service

Part VI Application Layer:Client Server ModelDNS, FTP, SMPT, HTTP, WWW, Multimedia


Data Communication and Networking

History of Communications Network, pp. 1 – 21

Introduction in Data Communications, pp 22 – 39

Techniques for Data Transfer, pp. 40 – 89

Data Link Layer, pp. 90 – 136

Network Layer, pp. 137 – 154

Routing, pp. 155 – 167

Internetworking, pp. 168 – 176

Network Components, pp. 177 – 209

Ethernet, pp. 210 – 225

TCP/IP, pp. 226 – 247

LAN, pp. 248 – 267

Cellular Wireless Networks, pp. 268 – 295

Satellite Communications, pp. 296 – 309

Interface Circuits, pp. 310 - 361

History of Communications Network

Token-Ring

AE

4 - 16 Mbps

AB

ED

C

ISO-OSI layers

Simplex, Half-duplex, Full-duplex

Position of the data-link layer

Network layer in an internetwork

Flooding is initiated from node 1

hop-1 transmissions

hop-3 transmissions

hop-2 transmissions

Interconnection of networks with diferent technology and end-to-end protocol stack in the data plane

CSMA/CD

Operation

In classful addressing, the address space is divided into five classes: A, B,

C, D, and E.

NoteNote::

Five classes

LEO, MEO and GEO satellites

Data communications via satellite

Stanica 1 Stanica 2 Stanica 3

Format okvira

Paketni podslot

Prenos paketnog

slota

Medju-paketnozaštitno vreme

Stanica 1 Stanica 2 Stanica 3

Prenos iz stanice 1

Prenos iz stanice 1

Prenos iz stanice 2

Prenos iz stanice 3

Cellular networks

Prostorijaza

komutacijuu

mobilnojtelefoniji

Bazna primo-predajna stanica



Javna telefonskakomutaciona

mreža

Outline

Introduction



Conclusion

writing material


writing material


Conclusion

We provide the following resources for students

Solutions for writing part of exams: A complet set of solutions from January 2000 until October 2004

Teaching materials: More than 500 pages of writing materials

PowerPoint slides: More than 2000 slides can be downloadeds to supplement lecture presentations

Q & A

Documents

W eb publishing of teaching material for ‘’Microcomputer Systems’’ and