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UNIT – IREVIEW OF SEMI CONDUCTOR PHYSICS
SyllabusReview of Semi Conductor Physics : Insulators, Semi conductors, and Metals classification using Energy Band Diagrams, Mobility and Conductivity, Electrons and holes in Intrinsic Semi conductors, Extrinsic Semi Conductor, (P and N Type semiconductor) Hall effect, Generation and Recombination of Charges, Diffusion, Continuity Equation, Injected Minority Carriers, Law of Junction, Fermi Dirac Function, Fermi level in Intrinsic and Extrinsic Semiconductor
INSULATORS, SEMICONDUCTORS, AND METALS
A very poor conductor of electricity is called an insulator; an excellent conductor is a metal; and a substance whose conductivity lies between these extremes is a semiconductor. A material may be placed in one of these three classes, depending upon its energy-band structure.
Insulator: The energy-band structure of insulator is shown schematically in Fig. a. A large forbidden band (EG ≈6 eV) separates the filled valence region from the vacant conduction band. Practically it is impossible for an electron to jump from the valence band to the conduction band. Hence such materials cannot conduct and called insulators. Insulators may conduct only at very high temperatures or if they are subjected to high voltage. Such conduction is rare and is called breakdown of an insulator. The insulating materials are diamond, glass, wood, mica, paper etc.
Semiconductor: A substance for which the width of the forbidden energy region is relatively small (≈1 eV) is called a semiconductor. The most important practical semiconductor materials are germanium and silicon, which have values of EG of 0.785 and 1.21 eV, respectively, at 0°K. Energies of this magnitude normally cannot be acquired from an applied field. Hence the valence band remains full, the conduction band empty, and these materials are insulators at low temperatures. However, the conductivity increases with temperature. These substances are known as intrinsic (pure) semiconductors.
As the temperature is increased, some of these valence electrons acquire thermal energy greater than EG, and hence move into the conduction band. These are now free electrons in the sense that they can move about under the influence of even a small applied field. The insulator has now become slightly conducting; it is a semiconductor. The absence of an electron in the valence band is represented by a small circle in Fig. b, and is called a hole. The phrase “holes in a semiconductor” therefore refers to the empty energy levels in an otherwise filled valence band.
1
Fig. Energy-band structure of (a) an insulator, (b) a semiconductor, and (c) a metal.
Note: It has been determined experimentally that EG decreases with temperature.
Conductors: A material having large number of free electrons can conduct very easily. For example, copper has 8.5x1O28 free electrons per cubic meter which is a very large number. Hence copper is called good conductor. In fact, in the metals like copper, aluminium there is no forbidden gap between valence band and conduction band. The two bands overlap. Hence even at room temperature, a large number of electrons are available for conduction. So without any additional energy, such metals contain a large number of free electrons and hence called good conductors. An energy band diagram for a conductor is shown in the Fig. (c).
MOBILITY
The following figure is a two-dimensional schematic picture of the charge distribution within a metal. The shaded regions represent the net positive charge of the nucleus and the tightly bound inner electrons. The black dots represent the outer, or valence, electrons in the atom. These electrons wander freely from atom to atom in the metal. According to the electron-gas theory of a metal, the electrons are in continuous motion, the direction of flight being changed at each collision with the heavy (almost stationary) ions. Since the motion is random, the average current is zero.
Now let us apply a constant electric field E (volts per meter) to the metal. As a result of this electrostatic force, the electrons would be accelerated and the velocity would increase indefinitely with time. However, at each inelastic collision with an ion, an electron loses energy, and a steady- state condition is reached where a finite value of drift speed v is attained. This drift velocity is in the direction opposite to that of the electric field. The average speed V is proportional to applied electric field E. Thus
V = µE where µ is called mobility of charged particle.
DRIFT CURRENT DENSITY
Let us consider conductor of length ‘L’ having ‘N’ number of electrons and
having a area of cross section ‘A’. Consider any cross section of the conductor.
Let ‘N’ be the number electrons passing through area ‘A’ in time ‘T’.So number of electrons crossing the area in unit time is N/T.
Thus the total charge per second passing any area, which, by definition, is the current in amperes, is
I=Nq/T=Nqv/L; where v = drift velocity (L/T)
2
The current density J for the conductor is current per unit cross sectional area of the conducting material.
J = I/A ampere/m2 J = Nev/LA ;
where LA = volume of the conductor ; n = number of electrons per unit volume; n = N/LA
J = nev but v = µE; Therefore J = neµE ampere/m2 ; This is the general expression for current density in a given material. The current density is related to electric field E by relation, J = σE; where σ = conductivity of the material in (Ω-m) -1 and σ= neµ.
EQUILIBRIUM CONCENTRATIONS
Concentration of Electrons
The carrier density, i.e., the number of electrons available for conduction in Conduction band is
n=equilibrium electron carrier concentration; N(E)=density of states; f(E) =fermi function; k=Boltzmann’s const.
Concentration of Holes
The carrier(free holes) density, i.e., the number of holes available for conduction in Valence Band is
Where N(E)=density of states; f(E) =Fermi function k=Boltzmann’s const in eV/0k, and
FERMİ LEVEL IN INTRINSIC SEMICONDUCTOR( EF)
For an intrinsic semiconductor n = p; So
Taking logarithm of both sides, we obtain
Hence
If the effective masses of hole and free electron are the same, Nc = Nv, then
3
n=∫EC
∞f (E )N (E )dE≈NC e
−(EC−EF ) ¿kT
NC=2( 2π mn k̄ T
h2 )3 /2
=effective density of states in conduction band
p=∫−∞
Eυ (1−f (E ) )N (E )dE≈N ve−(EF
−Eυ ) ¿kT
Nv=2( 2π mp k̄ T
h2 )3/2
=effective density of states in valence band
NC e−(EC−EF )¿ kT= N v e
−(EF−Eυ) ¿ kT
lnNc
Nv=Ec+Ev−2 EF
kTEF=
Ec+Ev
2− kT
2ln
N c
N vEF=
Ec+Ev
2
Hence Fermi level EF lies in the middle of forbidden energy band for intrinsic semiconductor.
FERMILEVEL IN EXTRINSIC SEMICONDUCTOR
For n-type material EF moves closer to the conduction band and the equation is given as
In n-type n = ND where
Similarly for p-type material EF moves closer to the
Valence band and the equation is given as
In p-type p = NA where
HALL EFFECT & APPLICATIONS
If a specimen (metal or semiconductor) carrying a current I is placed in a transverse magnetic field B, an electric field E is induced in the direction perpendicular to both I and B. This phenomenon is known as the Hall Effect.
Hall Effect is used to determine whether a semiconductor is n or p-type and to find the carrier concentration. Also, by simultaneously measuring the conductivity , the mobility µ can be calculated.
If ‘I’ is in the positive X direction and B is in the positive Z direction as shown in fig., a force will be exerted in the negative Y direction on the current carriers. The current I may be due to holes moving from left to right or to free electrons traveling from right to left in the semiconductor specimen. Hence, independently of whether the carriers are holes or electrons, they will be forced downward toward side 1. If the semiconductor is n-type material, so that the current is carried by electrons, these electrons will accumulate on side 1, and this surface becomes negatively charged with respect to side 2. Hence a potential, called the Hall voltage (VH), appears between surfaces 1 and 2.
4
Fig: Pertaining to the Hall effect. The carriers (whether electrons or holes) are subjected to a magnetic force in the negative Y direction.
EF=Ec−kT ln ( NcN D
)
n=NCe−(EC−EF) ¿ kT
EF=Ev+kT ln(N v
N A)
p=N v e−(EF−Ev ) ¿kT
If the polarity of VH is positive at terminal 2, then, as explained above, the carriers must be electrons. If, on the other hand, terminal 1 becomes charged positively with respect to terminal 2, the semiconductor must be p-type. These results have been verified experimentally, thus justifying the bipolar (two-carrier) nature of the current in a semiconductor.
Experimental Determination of Mobility
In the equilibrium state the electric field intensity E due to the Hall effect must exert a force on the carrier which just balances the magnetic force, or
Bqν = qE; Or E=Bνwhere q is the magnitude of the charge on the carrier, and ν is the drift speed.
We know that E = V/d, where d is the distance between surfaces 1 and 2.
Current density J = nq = ; where is charge densityBut current density J = I/A J = I/w.d
= Ed = B d = B.( J/).d =
Hall coefficient is defined as = 1/
Then = Or =
f conduction is due primarily to charges of one sign, the conductivity is related to the mobility as = .If the conductivity is measured together with the Hall coefficient, the mobility can be determined from
= / = Applications Since VH is proportional to B (for a given current I), then the Hall Effect has been incorporated into a magnetic field meter. Another instrument, called a Hall-effect multiplier, is available to give an output proportional to the product of two signals. If I is made proportional to one of the inputs and if B is linearly related to the second signal, then, V H is proportional to the product of the two inputs.
Continuity Equation
The carrier concentration in the body of a semiconductor is a function of time and distance. Mathematically, a partial differential equation governs this functional relationship between carrier concentration, time and distance. Such an equation is called continuity equation. The equation is based on the fact that charge can neither be created nor destroyed.
Consider the infinitesimal n type element of volume of area A and length dx as shown in the Fig. .The average hole concentration is p/rn .The current entering the volume at x is I and leaving at x +xd is I+ dl.
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This change in current is because of diffusion.
Now due to diffusion the concentration of charge carriers decreases exponentially with the distance.
Hence,dl = Number of coulombs per second decreased within the volume ... (1)
Now if τp, is the mean life time of the holes then, = Holes per second lost by recombination per unit volume
Due to recombination, number of coulombs per second decreased within the given volume is,
(Charge on Holes) x (Holes /Sec per unit volume) x (Volume)
= ... (2)
While let g is the rate at which electron hole pairs are generated by thermal generation per unit volume. Due to this, number of coulombs per second increases with the volume
(Charge on Holes) x (Rate of generation) x (Volume) = q g A dx …..(3)
Thus the total change in number of coulombs per second is because of three factors as indicated by the equations (1), (2) and (3).
Total change in holes per unit volume per second is Hence the total change in coulombs per second
within the given volume= ………… (4)
According to law of conservation of charges, ………. (5)
6
pτ p
q× pτ p×( Adx )=qAdx p
τ p
q dpdt
(volume )=qAdx dpdt
qAdx dpdt=−qAdx p
τ p+qgAdx−dl
where E = Electric field intensity within the volume
If the semiconductor is in thermal equilibrium and subjected to no external electric field then hole density will attain a constant value po. Under this condition I = 0 i.e. J = 0 and dp/dt= 0 due to equilibrium. Using in (7),
The equation (9) indicates the thermal equilibrium i.e. the rate at which holes are thermally generated just equal to the rate at which holes are lost due to the recombination.
Using (8) and (9) in (7),
This is called equation of conservation of charge or the continuity equation.
As holes in n type material are considered, let us use the suffix n. And as concentration is a function of both time t and distance x, let us use partial differentiation. Hence the final continuity equation takes the form as,
Similarly the continuity equation for the electrons in p type material can be written as,
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UNIT - IIJUNCTION DIODE CHARACTERISTICS AND SPECIAL DIODES
Syllabus
Junction Diode Characteristics and Special Diodes : Open circuited P N Junction, Forward and Reverse Bias, Current components in PN Diode, Diode Equation,Volt-Amper Characteristic, Temperature Dependence on V – I characteristic, Step Graded Junction, Diffusion Capacitance and Diode Resistance (Static and Dynamic), Energy Band Diagram of PN Diode,
Special Diodes: Avalanche and Zener Break Down, Zener Characterisitics, Tunnel Diode, Characteristics with the help of Energy Band Diagrams, Varactor Diode, LED, PIN Diode, Photo Diode
ENERGY BAND DIAGRAM OF A P-N JUNCTION UNDER OPEN-CIRCUIT CONDITIONS.
When P and N type material are put together, Fermi level readjusts due to movements of charge carriers initially. At equilibrium Fermi level is same in both P & N side.
However EF closer to EC in N type material and
closer to in P type material. Conduction band in P type is at a higher level compared to that in N type.
This creates a Energy Hill or Energy Barrier, for
the electrons on N side, denoted by and given by:
EF – EVP = ½EG - E1 and
ECn – EF = ½EG - E2
Adding these two equations, EO= E1 + E2 =EG - (ECn - EF) - (EF - EVp)
We know that,
So
8
Fig: Band diagram for a p-n junction under open-circuit conditions.
p=N υ e−(EF−Eυ) ¿ kTn=NCe
−(EC−EF) ¿ kT
np=ni2=NCN v e
−(EC−EV ) ¿ kT=NCN v e−(EG )/kT
We know that,
Using these equations
PN- JUNCTION WITH NO EXTERNAL VOLTAGE
The figure (a) shows a PN-junction just immediately after it is
formed. The P region has holes and negatively charged immobile
ions. The N region has free electrons and positively charged
immobile ions. Holes and electrons are the mobile charges, but the
ions are immobile. The sample as a whole is electrically neutral.
•Holes from the P region diffuse into the N region. They then
combine with the free electrons in the N region.•
Free electrons from the N region diffuse into the P region. These
electrons combine with the holes.•
The diffusion of holes (from P region to N region) and electrons
(from N region to P region) takes place because there is a
difference in their concentrations in the two regions. The P
region has more holes and the N region has more free electrons.•
The diffusion of holes and free electrons across the junction occurs for a very short time. After a few
recombinations of holes and electrons in the immediate neighborhood of the junction, a restraining
9
Fig.a:PN-junction when just formed.
Fig.b: Space-charge region or depletion region is formed in the vicinity of the junction
force is set up automatically. This force is called a barrier. Further diffusion of holes and electrons from
one side to the other is stopped by this barrier. •
The region containing the uncompensated acceptor and donor ions is called depletion region. That is,
there is a depletion of mobile charges (holes and free electrons) in this region. Since this region has
immobile (fixed) ions which are electrically charged it is also referred to as the space-charge region.
The electric field between the acceptor and the donor ions is called a barrier. •
The physical distance from one side of the barrier to the other is referred to as the width of the
barrier. The difference of potential from one side of the barrier to the other side is referred to as the
height of the barrier. •
For a silicon PN-junction, the barrier potential is about 0.7 V, whereas for a germanium PN-junction it
is approximately 0.3 V. •
The barrier discourages the diffusion of majority carriers across the Junction. The barrier helps the
minority carriers to drift across the junction. The minority carriers are constantly generated due to
thermal energy. The drift of minority carriers across the junction is counterbalanced by the diffusion of
the same number of majority carriers across the junction. The barrier height adjusts itself so that the
flow of minority carriers is exactly balanced by the flow of majority carriers across the junction.
2.10 BIASING A PN-JUNCTION
2.10.1 Forward Bias
A PN junction is said to be forward-biased, if the positive terminal
of the battery is connected to the P-side and the negative terminal
to the N-side, as shown in Fig.c.
When the PN-junction is forward-biased, the holes are repelled
from the positive terminal of the battery and move towards the
junction. The electrons are repelled from the negative terminal of
the battery and drift towards the junction. Because of their
acquired energy, some of the holes and the free electrons
penetrate the depletion region. This reduces the potential barrier.
The width of the depletion region reduces and so does the barrier
10
Fig.c: Forward Biased PN-junction.
Fig.d: Reverse Biased PN-junction.
height. As a result of this, more majority carriers diffuse across the junction. These carriers recombine
and cause movement of charge carriers in the space-charge region.
For each recombination of free electron and hole that occurs, an electron from the negative terminal of
the battery enters the N-type material. It then drifts towards the junction. Similarly, in the P-type
material near the positive terminal of the battery, an electron breaks a bond in the crystal and enters
the positive terminal of the battery. For each electron that breaks its bond, a hole is created. This hole
drifts towards the junction. Note that there is a continuous electron current in the external circuit. The
current in the P-type material is due to the movement of holes. The current in the N-type material is due
to the movement of electrons. The current continues as long as the battery is in the circuit. If the battery
voltage is increased, the barrier potential is further reduced. More majority carriers diffuse across the
junction. This results in an increased current through
the PN-junction.
Cutin voltage (V): It is the forward voltage after
which the forward current of the diode increases
rapidly (in an exponential manner). V is
approximately 0.2 V for germanium and 0.6 V for
silicon.
2.10.2 Reverse Bias
If the negative terminal of the battery is connected to
the P-type material and the positive terminal of the battery to the N-type material, then PN junction is
said o be reverse biased. The holes in the P region are attracted towards the negative terminal of the
battery. The electrons in the N region are attracted to the positive terminal of the battery. Thus the
majority carriers are drawn away from the junction. This action widens the depletion region and
increases the barrier potential (compare this with the unbiased PN-junction of Fig. b).
11
Fig.: V-I characteristics of PN-junction.
The increased barrier potential makes it more difficult for the majority carriers to diffuse across the
junction. However, this barrier potential is helpful to the minority carriers in crossing the junction. In
fact, as soon as a minority carrier is generated, it is swept (or drifted) across the junction because of the
barrier potential. The rate of generation of minority carriers depends upon temperature. If the
temperature is fixed, the rate of generation of minority carriers remains constant. Therefore, the current
due to the flow of minority carriers remains the same whether the battery voltage is low or high. For this
reason, this current is called reverse saturation current. This current is very small as the number of
minority carriers is small. It is of the order of nano amperes in silicon diodes and microamperes in
germanium diodes.
Note: For every 10c rise in temperature reverse saturation current will be doubled.
DIODE EQUATION
Let us now derive the expression for the total current as a function of applied voltage assuming that the width of the depletion region is zero. When the recombination at the junction are zero then the hole concentration at the junction boundary of P – region is equal to the hole concentration at the junction boundary of n – region. When the recombination starts the hole concentration in n-region decreases and becomes zero. Therefore Drift current is also zero. Drift current due to hole is
JP = PqpE – q D P
dqPdx
0 = Pq pE – q D P
dqPdx
Pq pE = q D P
dqPdx
E =
DPμp
1P
dPdx
According to Einstein’s equation
DPμp
= Dnμn
= V T
12
E =
V T
PdPdx
⇒ E= −dVdx
=V T
PdPdx
(E= −dVdx )
Let Pno be the hole concentration near the junction in n- region for an unbiased diode and Pn(o) be the hole concentration near the junction in n- region when the diode is biased.
Pn(o) is higher than Pno
∫o
v1V T
dV= ∫pno
pn (0)1P
dP
VV T
= [ ln ( p ) ]pnopn (o )
VV T
= ln pn (o )− ln ( pno )
VV T
=ln Pn ( o )ln (Pno)
− ln [ Pn (o )
Pno ]
This is termed as the law of junction
JP Diffusion = −q Dp dP
dx
IP = JP Diffusion. A
= -q Dp A
dPdx
Let pn ' (o ) is the excess hole concentration when it is forward bias.
13
dVV T
= −dPP
pn (o )= pnoeV /VT
pn ' (o ) = pn (o )− pno
Let Lp be the diffusion current and at Lp the effective hole concentration is zero (i.e., x2 = 0)
dpdx
=P2−P1
x2−x1=
O−pn ' (o )
Lp −O=−pn' (o )
Lp
IP=−qDpA (−pn ' (o )
Lp )= qDpALp
( pn' (o )−pn )
pn ' (o )=pn (o )−pno= pno eV /V T− pno
Pn ' (o )=Pno (eV /V T−1)
Let npo be the electron concentration near the junction in p- region for an unbiased diode.
Total current I = IP + In
Where Io is the reverse saturation current Io =
Aq Dp pnoLp
+Aq Dn n po
Ln
14
IP=AqDp pno
Lp(eV /V T−1)
I n=AqDn n po
Ln(eV /V T−1 )
I= [ Aq Dp pnoLp
+AqDn npo
Ln ]I= I o (eV /VT−1 )
I= I o (eV /ηVT−1 )
Where I = diode current
Io = diode reverse saturation current
V = external voltage applied to the diode
= a constant
for Germanium = 1
for silicon = 2
VT =
kTq= T
11 ,600 ( Thermal Voltagte)
k = Bottzman’s constant ( 1.38033 x 10-23 J/k)
q = Charge of the election ( 1.60219 x 10-19C)
T = Temperature of the diode junction (0k)
DIODE BREAKDOWN MECHANISMS
When a diode is reverse biased the depletion layer increases to set up a large potential barrier which prevents diffusion of majority carrier from one side to other. Thus there is no current due to the majority carriers. The breakdown mechanisms are of two types.
1) Avalanche breakdown 2) Zener breakdown.
Avalanche Breakdown
This occurs in lightly doped diodes where the depletion region is very wide and electric field is very low. As the applied reverse bias increases, the field across the junction increases correspondingly. The reverse voltage applied give high energy to the minority carriers.
The minority carriers with sufficient kinetic energy break up covalent bonds in the crystal thus
releasing a hole-electron pair. This process is called “Impact Ionization”. The newly released minority
carriers gain enough energy to breakup other covalent bonds. This process is known as Avalanche multiplication. In the avalanche breakdown temperature coefficient is +ve. The breakdown voltage increases if the junction temperature increases
Zener breakdown
15
This occurs when the P and N regions are heavily doped diodes. In this diode depletion region is very small. When a diode is reverse biased, a very strong electric field exists across the depletion region at near breakdown voltage levels. As a result of heavy doping of P and N regions, the depletion region width becomes very small. For an applied voltage of 6 volts or less, the field across the depletion region is very high is in the order of 2x 107 v/m. The very high electric field breaks covalent bonds and create new electron-hole pairs which increases the reverse current. For lightly doped diodes the zener breakdown voltage is quite high. In the zener breakdown temperature coefficient is –ve. The breakdown voltage decreases if the junction temperature increases.
TRANSITION CAPACITANCE (CT)
Under reverse bias condition the majority carriers move away from the junction, thereby uncovering more immobile charges. Hence the width of space charged at junction increases by reverse voltage. When the diode is reverse biased we observe the transition capacitance.
It is give by CT=|dQ
dV|
Where dQ is the increase in charge caused by change in voltage dV . Consider a step- graded junction i.e., one region is heavily doped and another region is lightly doped.
Suppose that p-region is heavily doped and n- region is lightly doped.( NA>> ND, ND = Donor ion concentration, NA
= Acceptor ion concentration). Since the barrier is always neutral, then
Wp NA = Wn ND --------- (1)
If NA >> ND, then Wp<< Wn ≈W.
The relationship between potential and charge density is given by the poisson’s equation
d2Vdx2
=−q N D
ε
Where V= applied reverse voltage, is permittivity of semiconductor, q = charge, x = width. By integrating we get,
16
Fig.: (a) A reverse biased p-n step-graded junction. (b) The charge density. (c) The field intensity. (d) The potential variation with distance x.
dVdx
=∫w
x q N D
εdx
dVdx
=q N D
ε(W−x )
V = ∫
q N D
ε(W−x ) dx
V =
q N D
ε (Wx− x2
2 )Suppose that at a reverse voltage V, the barrier width is, x = W
V =
q N D
ε (W 2−W 2
2 ) V =
q N D
ε (W 2
2 )--- (2)
Let Q be the total charge within the barrier ;Total charge Q = q ND AWn Q = q ND AW ----- (3) ( W ¿Wn)where A is the area of cross section of the barrier.
Transition capacitance CT =
dQdV
= qN D A dWdV ----- (4)
We know that from equation - 2
V =
q N D
ε (W 2
2 )
dVdW
=qN DW
ε -------- - (5)
From equation 5 CT = qN D A . ε
qN DW CT =
εAW
The transition capacitance is given by CT =
εAW .
DIFFUSION CAPACITANCE ( CD)
The capacitance that exists in a forward biased junction is called a diffusion or storage capacitance C D, whose value is usually much large then CT, which exists in a reverse biased junction.
Diffusion capacitance CD is defined as the rate of change of injected charge with applied voltage i.e.,
CD=dQdV where, dQ represents the change in the number of minority carriers stored outside the
depletion region when a change in voltage across the diode dV, is applied.
Calculation of CD :-
We know that I=Q
τ = life time of carriers i.e., holes & electrons
dI = dQτ We know that
CD=dQdV
= τ . dIdV
17
The PN diode current equation is I = IO (eV /ηV T−1 ) IO . e
V /ηV T= I+ IO.
dIdV
=IO e
V /ηVT
ηV T =
I+ IOηV T
Here I indicates the diode current and IO Reverse saturation current.
As I >> IO
dIdV
= IηV T
CD = τ . dI
dV= τI
ηV T
Where = a constant, 1 for Ge;2 for Si
VT – volt-equivalent temperature i.e., thermal voltage, VT =
KTq= T
11 ,600Diffusion capacitance CD increases exponentially with forward bias or proportional to diode forwards current. The values of CD range from 10 to 1000 PF, the large values being associated with the diode carrying a larger anode current, I.
TUNNEL DIODE
A normal pn junction diode has an impurity concentration of 1 part in . Impurity concentration in
Tunnel diode is1 part in . The width of the depletion layer for normal diode is 5 microns ( ).
The Width of junction in Tunnel Diode is < 100 A0 10-8m.
18
Reverse Bias:By reverse biasing the tunnel diode, barrier height increases as shown in fig. (b). Fermi level on N side is lowered. Electrons in the valence band on the p side are directly opposite to empty states in the conduction band on the n side. Electrons tunnel directly from the p region into the n region. The reverse-bias current increases monotonically and rapidly with reverse-bias voltage.
Forward Bias:When forward bias is applied, the potential barrier is decreased below E 0. Hence the n-side levels must shift upward with respect to those on the p-side, and the energy- band picture for this situation is indicated in Fig.a.There are occupied states in the conduction band of the material (the heavily shaded levels) which are at the same energy as allowed empty states (holes) in the valence band of the p side. Hence electrons will tunnel from the n to the p material, giving rise to the forward current.
As the forward bias is increased further, the condition shown in Fig. b is reached. Now the maximum number of electrons can leave occupied states on the right side of the junction, and tunnel through the barrier to empty states on the left side, giving rise to the maximum current IP as shown in Fig..
19
Fig.: The energy-band pictures in a Tunnel diode for forward bias. As the bias is increased, the band structure changes progressively from (a) to (d).
Normally an electron or hole must have energy greater than or equal to potential energy barrier, to move to other side of the barrier. As the barrier is very thin in this diode, instead of crossing the barrier carriers will tunnel through the barrier which is called as “Tunneling”.
If still more forward bias is applied, the situation in Fig. c is obtained, and the tunneling current decreases. Finally, at an even larger forward bias, the band structure of Fig. d is valid. Since now there are no empty allowed states on one side of the junction at the same energy as occupied states on the other side, the tunneling current must drop to zero. Now the carriers will move as in a normal forward biased pn junction diode.Characteristics: From the characteristics of tunnel diode, we see that the tunnel diode is an excellent conductor in the reverse direction (the p side of the junction negative with respect to the n side). Also, for small forward voltages (up to 50 mV for Ge), the resistance remains small (of the order of 5 ). At the peak current IP, corresponding to the voltage VP
the slope dI/dV of the characteristic is zero. If V is increased beyond VP, then the current decreases. The tunnel diode exhibits a negative-resistance characteristic between the peak current I P and the minimum value IV, called the valley current. At the valley voltage VV, at which I=IV, the conductance is again zero, and beyond this point the resistance becomes and remains positive. At the so-called peak forward voltage VF the current again reaches the value IP. For larger voltages the current increases beyond this value.
20
Fig.: Energy bands in a heavi1y doped p-n diode (a) under open circuited conditions and (b) with an applied reverse bias.
Fig. characteristics of Tunnel Diode
LIGHT EMITTING DIODES (LED)
The LED is an optical diode, which emits light when forward biased. The Fig. shows the symbol of LED. The two arrows indicates that the device emits the light energy.
Basic OperationWhenever a p-n junction is forward biased, the electrons cross the p-n junction from the n-region and recombine with the holes in the p-region. The free electrons are in the conduction band while the holes are present in the valence band. Thus the free electrons are at higher energy level with respect to the holes. When a free electron recombines with hole, it falls from conduction band to a valence band. Thus the energy level associated with it changes from higher value to lower value. The energy corresponding to the difference between higher level and lower level is released by an electron while travelling from the conduction band to the valence band. In normal diodes, this energy released is in the form of heat. But LED is made up some special material which releases this energy in the form of photons which emit the light energy. Hence such diodes are called light emitting diodes. This process is called Electroluminescence.The following figure shows the basic principle of this process. The energy released in the form of light depends on the energy corresponding to the forbidden gap. This determines the wavelength of the emitted light. The wavelength determines the color of the light and also determines whether the light is visible or invisible (infrared). Various impurities are added during the doping process to control the wavelength and color of the emitted light. For normal silicon diode, the forbidden energy gap is 1.1 eV and wavelength of the emitted light energy corresponds to that of infrared light spectrum. Hence in normal diodes the Light is not visible. The infrared Light is not visible.The LEDs use the materials like gallium arsenide (GaAs), gallium arsenide phosphide (GaAsP) or gallium phosphide (GaP). These are the mixtures of the elements gallium, arsenic and phosphorus. GaAs LEDs emit light radiations which are infrared hence invisible. GaAsP produces red or yellow visible light while GaP emits red or green visible light. Some LEDs emit blue and orange light too.ConstructionOne of the methods used for the LED construction is to deposit three semiconductor layers on the substrate. In between p-type and n-type, there exists an active region. This active region emits light, when an electron and hole recombine. When the diode is forward biased, holes from p-type and electrons from n-type, both get driven into the active region and when recombine, the light is emitted. In this particular structure, the LED emit light all the way around the layered structure. Thus the basic layered structure is placed in a tiny reflective cup so that the light from the active layer will be reflected towards the desired exit direction.
21
Fig.: Process of Electroluminescence
Symbol of LED
VARACTOR DIODEAs the transition capacitance varies with the applied voltage, it can be used as a voltage variable capacitance in many applications. In practice, special type of diodes are manufactured which shows the transition capacitance property more predominantly as compared to the normal diodes. Such diodes are called varactor diodes, varicap, VVC (voltage variable capacitance), or tuning diodes.Symbol and Equivalent CircuitThe Fig. (a) shows the symbol of varactor diode while the Fig. (b) shows the first approximation for its equivalent circuit in the reverse bias region.The RR is the reverse resistance which is very large while Rs is the geometric resistance of diode which is very small. The inductance Ls indicates that there is a high frequency limit associated with the use of varactor diodes.
Expression for Transition CapacitanceFor a varactor diode, the transition capacitance In terms of applied reverse bias voltage is given by,
where K = constant depends on semiconductor material and construction technique.Vj = junction potential; VR = magnitude of reverse bias voltage
n = ½ for the alloy junctions = 1/3 for the diffused junctions
22
UNIT –IVRECTIFIERS AND FILTERS
SyllabusRectifiers and Filters: Half wave rectifier, ripple factor, full wave rectifier(with and without transformer), Harmonic components in a rectifier circuit, Inductor filter, Capacitor filter, L- section filter, P- section filter, Multiple L- section and Multiple P section filter, and comparison of various filter circuits in terms of ripple factors, Simple circuit of a regulator using zener diode, Series and Shunt voltage regulators
Half-wave Rectifier
This is the simplest rectifier arrangement, as shown in Fig. 1 (a).
Fig.1. Half-wave rectifier input voltage and load current waveforms.
The secondary voltage of the transformer (being sinusoidal) can be expressed as
vs=V m sinωt=V m sin αwhere α = ωt This is shown in Fig.1 (b), where V m is the peak value of voltage. During the positive half cycle, when the voltage of the point A is positive w.r.t. point B, the diode D1 is forward biased and will conduct. This current, which flows through the load resistance RL, the diode (having forward resistance Rf) and secondary winding of the transformer (having resistance Rs can be expressed as
i=Im sinα for 0≤α≤π where
Im=V m
Rf+R s+RL
(This assumes that the cut-in voltage of the diode is negligible compared to V m) During the negative half cycle, when the voltage of the point A is negative w.r.t. point B, the diode D1, is reverse-biased and will not conduct. Therefore, the current
i=0 for π ≤α ≤2 π
The waveforms of current i during both the half cycles are shown in Fig.1(ç). The current, though not a good d.c. is unidirectional and has an average value which is non-zero (actually positive in this case).
23
Centre-tap Full-Wave Rectifier
Fig.2 (a) shows a full-wave rectifier circuit. The transformer secondary has a centre-tap and each half give a peak voltage ofV m. In each half (here is one diode i.e. D1 and D2 The load resistance RL is common to both halves.
This can be seen to comprise of two half-wave circuits. On the positive half cycle, when the point A is positive w.r.t. B, the diode D1
conducts and current i1 flows through RL. During this half-cycle, the point C is negative w.r.t point B and hence the diode D2 does not conduct. Therefore i2 = 0.
On the negative half-cycle, the point C is positive w.r.t. point B. Hence the diode D2
conducts and current i2 flows through RL. During this half-cycle, the point A is negative w.r.t. point B and hence the dode D1 does not conduct. Therefore i1 = 0. Fig.2
(b) and (c) shows the waveforms of currents i1
and i2 since both i1 and i2 flow through the load RL. The total current i through RL is i = i1 +i2,
which is obtained by adding the two waveform and is shown fig.2 (d).
Fig. 2 Full-Wave Rectifier and the current waveforms
Bridge Full-Wave Rectifier
Fig. 3 shows the bridge rectifier circuit, there are four diodes D1, D2, D3 and D4 which form the four arms of the “bridge”. The a.c. from the transformer secondary, in fed to the two corners and the load resistance RL is connected to the other two corners. Please note the directions of all the diodes and also the polarity of d.c. output.
Fig. 3 Bridge rectifier circuit
During positive half-cycle, the point A is more positive than the point B. The current path is point A, through D1, RL, D3 and back to point B. During this time, the diodes D2 and D4 are reverse-biased. In the negative half-cycle, the point B is more positive than point A. The current path is point B, through D2, RL, D4 and back to point A. During this time, the diodes D1 and D2 are reverse biased.
It is interesting to note that in both the half-cycles, the direction of current flow through RL
is the same. Thus we obtain full-wave rectification, the waveform being same as shown Fig. 2(d).
24
Half-wave Rectifier
a) Average value:
(i) Average Current (Idc)
If we put a d.c. ammeter in series with RL, it cannot show a reading the readings as shown in the Fig.1 (c), because a meter cannot respond to such fast changes in wave form. (However an oscilloscope can show the exact waveform). Instead, the d.c. ammeter will show an average reading. For finding out the average value of such an waveform, we have to determine the area under the curve and divide by 2π.
I dc=1
2 π∫02π
idα= 12π∫0
2π
Im sinα dα=Im2π (∫0
π
sin α dα+∫π
2π
sin α dα )Since the value of the current i=0 for π ≤α ≤2 π , therefore the second term above is equal to zero.
I dc=Im2 π
∫0
π
sin α dα = Im2π
[cos α ]0π=I dc=
Im2π
2=Imπ
(ii) D.C. Output Voltage (Vdc)
The d.c. (i.e. average) output voltage appearing across RL is
V dc=I dc RL
Substiting the value of I dc from equation 2 in the above equation,
V dc=ImπRL ¿
V m
π (R f+Rs+RL )RL
Normally Rf and Rs are quite small in value.
If R f+R s
RL≪1
Then V dc=V m
π
b) RMS Value
Root-means-square (RMS) current can be obtained by carrying out the following operations in the sequence s-m-r i.e. (i) Square Since current is given byi, therefore its square isi2;
(ii) Mean By calculating the area under the curve (by integrating) and then taking the mean over the period of2π ; (iii) Root: take the square-root.
I rms=[ 12π∫0
2π
i2dα ]12
I rms=[ 12π∫0
2π
Im2sin 2α dα ]
12
Because i=Im sinα
I rms=[ Im2
2π∫02π
sin 2α dα ]12
I rms=[ Im2
2π∫0π
sin 2α dα ]12 (as i =0 for
π ≤α ≤2 π
25
As sin2α=12(1−cos2α)
I rms=[ Im2
2π∫0π
12dα−
Im2
2π∫0π
12
cos 2αdα ]12
I rms=Im2
C) PIV
In the reverse bias, each diode has maximum voltage across it as it is open. Peak Inverse Voltage is defined as the maximum voltage to which a diode is subjected in the reverse bias.
Referring to Fig.1 (a) in the negative half-cycle, the point B is positive Vm volts w.r.t. the point A. Therefore, in half-wave circuit, PIV of the diode Vm volts.
D) Efficiency
Rectification efficiency is defined as
η=d .c . power delivered ¿ t h e load ¿a .c .input power
η=Pdc
Pac×100 %
Pdc=I dc2 RL
Pac is the rms power delivered into the circuit, comprising of RL, RS, and Rf
Pac=I rms2 (RL+R s+Rf )
η=I dc
2 RL
I rms2 (RL+Rs+R f )
×100 %
η=( Imπ )
2
RL
( Im2 )2
(RL+R s+Rf )
×100 %
η= 4π2
1R f+R s
RL+1
×100 %
If we assume (Rf + Rs)≪RL then
η= 4π2 ×100 %=40.6 %
This means, even under ideal conditions (i.e. RL and Rs equal to zero), only 40.6% of the a.c. input is converted into d.c. power. In general it can be understood that higher the rectification efficiency, lower would be the ripple content.
e) Ripple factor
The purpose of a rectifier is to convert a.c. into d.c. But the simple circuit as used in half-wave rectifier does not fully achieve this purpose.
We redraw the Fig.1 (c), but this time Idc is drawn in firm line and the rectified output in
dotted line. From this, we can consider that an alternating component (of course non-sinusoidal) has been superimposed on Idc.
Idc = Average value of the waveform i’ = The value of alternating component of the current wave form
26
I’rms = r.m,s value of the alternating component, i.e. of i’.
Ripple factor, r. is defined as
r=
r .m. s . value of the alternatingcomponent of thewave
average value of thewave
r=I rms'
I dc=V rms
'
V dc
r=√ I rms2 −I dc2
I dc=√V rms
2 −V dc2
V dc=√V rms
2 −V dc2
V dc2
r=√( Im2Imπ )−1=1.21
If the above expression is expressed as a percentage, it indicates that the amount of the alternating component present in the output is 121% of the d.c. value. In other words, it means the undesired ac. component is in fact more the desired half wave rectifier is not a good rectifier.
f) TUF (Transformer Utilization Factor)
Most of rectifier circuits make use of a transformer, whose secondary feeds the ac. power. It is necessary to determine the rating of transformer while designing a power supply. TUF is useful for this purpose. TUF is defined as
TUF=d . c . power delivered ¿ theload ¿a . c . power rating of transformer secondary
=Pdc
Pac(rated)
Pac (rated )=V ac(rms) Irms
TUF=( Imπ )
2
RL
V m
√2Im2
TUF=( Imπ )
2
RL
Im (R f+R s+RL )Im√22
If (R f+Rs) ≪ RL , then
TUF=√22π2 =0.287
Full-wave Rectifier
a) Average value: (i) Average Current (Idc)
If we put a d.c. ammeter in series with RL, it cannot show a reading the readings as shown in the Fig.2, because a meter cannot respond to such fast changes in wave form. (However an oscilloscope can show the exact waveform). Instead, the d.c. ammeter will show an average reading.
For finding out the average value of such an waveform, we have to determine the area under the curve and divide by 2π.
I dc=1
2 π∫02π
idα
27
¿ 12π∫0
2π
Im sin α dα
¿Im2π (∫0
π
sin α dα +∫π
2π
sin α dα )
Since the value of the current i for π ≤α ≤2 π is the same as the period 0≤α≤π , therefore the curve will be twice that of the half wave case.
I dc=2 Imπ
(ii) D.C. Output Voltage (Vdc)
The d.c. (i.e. average) output voltage appearing across RL is
V dc=I dc RL
substiting the value of I dc from equation 2 in the above equation,
V dc=2 Imπ
RL
V dc=2V m
π (R f+R s+RL )RL
Normally Rf and Rs are quite small in value.
If R f+R s
RL≪1
Then V dc=2V m
π
b) RMS Value
Root-means-square (RMS) current can be obtained by carrying out the following operations in the sequence s-m-r i.e. (i) Square Since current is given byi, therefore its square isi2;
(ii) Mean By calculating the area under the curve (by integrating) and then taking the mean over the period of2π ; (iii) Root: take the square-root.
I rms=[ 12π∫0
2π
i2dα ]12
I rms=[ 12π∫0
2π
Im2sin 2α dα ]
12
Because i=Im sinα
I rms=[ Im2
2π∫02π
sin 2α dα ]12
I rms=[ Im2
2π∫02π
sin 2α dα ]12 (as i =0 for
π ≤α ≤2 π
As sin2α=12(1−cos2α)
I rms=[ Im2
2π∫02π
12dα−
Im2
2π∫02 π
12
cos2αdα ]12
I rms=Im√2
C) PIV
In the reverse bias, each diode has maximum voltage across it as it is open. Peak Inverse Voltage is defined as the maximum voltage to which a diode is subjected in the reverse bias.
FWR the non conducting period, the inverse voltage across the non conducting dode is 2Vm
28
D) EfficiencyRectification efficiency is defined as
η=d .c . power delivered ¿ t he load ¿a .c .input power
η=Pdc
Pac×100 %
Pdc=I dc2 RL
Pac is the rms power delivered into the circuit, comprising of RL, RS, and Rf
Pac=I rms2 (RL+R s+2R f )
η=I dc
2 RL
I rms2 (RL+Rs+2 Rf )
×100 %
η=( 2 Imπ )
2
RL
( Im√2 )2
(RL+R s+2 Rf )
×100 %
η= 8π2
1R f+R s
RL+1
×100 %
If we assume (2Rf + Rs)≪RL then
η= 8π2 ×100 %=81.2%
This means, even under ideal conditions (i.e. RL and Rs equal to zero), only 81.2% of the a.c. input is converted into d.c. power. In general it can be understood that higher the rectification efficiency, lower would be the ripple content.
e) Ripple factor
The purpose of a rectifier is to convert a.c. into d.c..
Idc = Average value of the waveform i’ = The value of alternating component of the current wave form I’rms = r.m,s value of the alternating component, i.e. of i’.
Ripple factor, r. is defined as
r=
r .m. s . value of the alternatingcomponent of thewave
average value of thewave
r=I rms'
I dc=V rms
'
V dc
r=√ I rms2 −I dc2
I dc=√V rms
2 −V dc2
V dc=√V rms
2 −V dc2
V dc2
r=√( Im√2
2 Imπ
)−1=0.483
If the above expression is expressed as a percentage, it indicates that the amount of the alternating component present in the output is 121% of the d.c. value. In other words, it means the undesired ac. component is in fact more the desired half wave rectifier is not a good rectifier.
f) TUF (Transformer Utilization Factor)
29
In FWR, the average TUF is obtained by considering yhe primary and secondary windings separately. In each half of the secondary winding, the current flows through 1800, whre in the primary winding the current flows through complete 3600
(i) TUF (secondary)
Pac(rated secondary) = Pac(rated) one half + Pac(rated) other half
= V m
√2 X
Im2
+ V m
√2 X
Im2
= V mIm
√2 = 0.574
(ii) TUF (primary)
Since the primary winding carries a full wave current, its rated capacity is utilized to the same extent as the rectification.
TUF = 0.812
(iii) Average TUF
Average TUF = TUF ( secondary )+TUF ( primary )
2
= 0.574+0.812
2=0.693
(i) The current flow through both the primary and the secondary windings are sinusoidal (i.e. full cycle). Due to this, the TUF of the both the primary and the secondary are 0.812 and the overall TUF is 0.812. This is higher than the TUF of full-wave rectifier (0.693) and hence for the same d.c. output power, a smaller transformer can be used in the bridge circuit.
(ii) A centre-tap is not required in the transformer secondary.
(iii) The PIV of each diode = Vm. Let us consider the positive half cycle when diodes D1 and D3 are conducting and therefore the voltage drops across each of them is
negligible. Therefore the voltage appearing across D2 is equal to Vm. Also the voltage appearing across D4 is equal to Vm In a similar way considering the negative half-cycle, it can be understood that PIV of D1 and D3 are also equal to Vm. Thus, for a given voltage rating of the diodes, these can be used for high-voltage applications.
(d) Bridge circuit requires four diodes. At any given time two of them conduct in series, causing voltage drop due to two diodes. This additional voltage drop cannot be ignored in low voltage d.c. power supplies.
FWR with L-section filter
This is also known as the choke-input filter or L C filter. Figure shows the filter circuit, in which an inductor L is used at the input of the filter and a capacitor in parallel with the load resistance RL. Also shown in the dotted line is Rb the bleeder resistance.
30
Figure : L-section filter
The inductor L offers series impedance to the ripple currents and the capacitor C offers low impedance in shunt with the load. A corn hin4tion of these two effects result in a load current which smoothed much more effectively than either L or C alone.
If L is small, then the capacitor C will get charged to peak voltage Vm and diodes will conduct only for short periods in each half cycle. If the L is large, the diodes will conduct for longer period due to smoothening effect of the inductor if the value of L is more then certain minimum value (called critical inductance), each diode will conduct for complete half-cycle. The output d.c. voltage is given by
V dc=2V m
π
The output d.c. voltage on load is
V dc=2V m
π−I dc (Rc+Rs+R f )
whereR f, Rc and, R s are the resistances of diode, choke and secondary winding. Both the above equations are similar to those of only inductor filter. However the ripple is much lower in L-section filter than inductor filter.
Ripple Factor:
The choke L is series with the parallel combination of the capacitor C and the load resistance RL. In order the choke can suppress the ripple components, the reactance of the choke must be very large compared to the parallel impedance of the capacitor and the resistance. This parallel impedance is made small by making the reactance of C much smaller than resistance RL. So we can reasonably assume that the entire a.c. ripple passes through the capacitor and none through the resistance.
Due to the above consideration, the total impedance between point A and B is practically that of the choke alone and is approximately,
X L=2ωL, since ripple frequency = 2ω
The ripple voltage has the magnitude 4 vm
3π and
therefore the ripple current,
Γ=4 vm3π
1x L
The r.m.s. value of ripple current is Γ√2
so,
Γrms=4 vm
√23 π1xL
The a.c. ripple voltage the load RL is the same as that across the capacitor and this is equal to
V rms' =I rms
' Xc
¿ √23
V dc
X LXc
Where Xc = reactance of the capacitor at the ripple frequency i.e. 2ω
By defining ripple factor r = V rms'
V dc =
√23
V dc
XLX c
V dc
= √23
X c
X L= √2
12ω2LC
We note the ripple factor is dependent on the values of L and C, but is independent of load
Critical Inductance :
All the foregoing calculations are based on the assumption that value of the inductance is more than the critical value so that the current i
31
does not fill to zero at any time. For this to happen, the value of Idc must be more than the peak value of the a.c. (ripple) component.
I dc>√2 I rms'
V dc
RL≥
2V dc
3
Let the critical value of inductance be Lc. therefore
2ωLc≥2RL
3
Lc≥RL
3ω
A practical value (taking into account the approximations made in the derivation) would be more than the above and a figure of
Lc≥RL
800
Bleeder Resistance:
The output voltage of L-section filter at load is Vm whereas when some load current flows the
value is 2vmπ
. This means in the region of very
low current, the output voltage drops sharply, as shown in figure
Figure: (a) D.C. Output Voltage Vs. Load Current.
In order to avoid this sharp change in output voltage, a resistance Rb (called bleeder resistor) is connected in parallel to RL so that a current of Imin, bleeds (i.e. flows) through Rb. Making use of equation Lc, the value of the bleeder resistance is
Rb≤800Lc
32
UNIT- VTRANSISTOR AND FET CHARACTERISTICS
Transistor and FET Characteristics : Junction transistor, Transistor current components, Transistor as an amplifier, Characteristics of Transistor in Common Base and Common Emitter Configurations, Analytical expressions for Transistor Characteristics, Punch Through/ Reach Through, Photo Transistor, Typical transistor junction voltage values.
INTRODUCTION:
In 1948 John Bardeen, Walter Brattian, William Shoekley has invented transistor.
Transistor means variable resistance, since it transfers signals from low resisitance region to
high resistance region. It is also known as a semi conductor triode or Bipolar Junction Transistor
(since current in the device is due to both polarities i.e., electrons and holes). When a third
doped junction is added to a crystal diode in such a way that two PN junctions are formed
resulting a transistor.
A transistor consists of two PN junctions formed by a single crystal conductor. (Si or Ge)
in which a P-type substrate is sandwitched between two n-type layers resulting n-p-n transistor.
Similarly, if an n-type layer is held between two p-type layers then a P-N-P transistor is formed.
The construction of transistor involves four methods
1. Grown Junction type 2. Alloy junction type
3. Diffusion junction type 4. Expitaxial type
A transistor consists of three regions-emitter, base and collector. The middle portion is
based and two end portions are emitter and collector.
EMITTER :
It is the terminal through which the charge carriers enters into the transistor. It always
forward biased.
COLLECTOR:
It is the terminal which collect the charge carriers coming from emitter. It is always
reverse biased.
BASE:
Base is common terminal to both emitter and collector.
33
Physically collector region is made very larger than emitter and base. Base is made very
thin, when compared with other two. Emitter is heavily open than other two.
Circuit Symbols:
The circuit symbols of PNP and NPN transistors are shown below
There are two junctions between emitter and base, J and base and collector , J CB. The
arrow mark on the emitter terminal resents the direction of conventional current flow or
direction of current flow when base emitter junction is forward biased.
In both cases current through three leads are denoted bu IE (Emitter current), IB (base
current), IC (Collector current) and voltages are VEB, VCB and VCE as shown in fig.
SIGNS OF VARIUOS CURRENTS AND VOLTAGES
IE IB IC VEB VCE VCB
NPN - + + - + +
PNP + - - + - -
34
Transistor current components
Various components of currents flow in a transistor. In a P-N-P transistor, I E is forward biased and Ic is reverse biased. Since the emitter base junction IE is FB, the emitter will deliver current IE. This IE has two
components, the current IPE due to holes crossing from emitter to base and the current InE due to e crossing from base to emitter. Since the direction of hole current IPE is +ve, it is from left to right. The
electron current InE will be in the direction opposite to that of movement of e and therefore InE will also be from left to right.
In practical transistors, doping in the emitter is much more than the doping on the base. Thus conductivity of P- type material is much more than that of n- type and hence I I PE is much more than InE.
Out of all the holes crossing Ie to enter the base region, some of them
recombine with e in the base. Thus the no.of holes gets reduced. The remaining holes cross I c and reach the collector. Let the hole current crossing Ic be IPc.
Hence the recombination current is equal to IPE - IPC. Since Ic is reverse biased, there will be reverse current Ico. Taking the standard direction of current flow, the total collector current will be
Ic = Ico - Ipc - 1
Ipc is the major component of collector current Ic
Emitter Efficiency :-
r =
current of injected carriers atI ETotal emitter current
r =
IPEI PE+ I nE
=IPEI E
35
r =
IPEI E
Transport factor,
β =Current due to injected carriers reaching I c
Current due to injected carriers at IE
β =IPcIPE
Large signal current Gain,
= -
Collector−current increaseEmitter current change
When emitter is zero, there is only Ico to flow through collector. But when emitter current is IE, the total current is Ic. Hence the collector current increase is ( Ic – Ico)
= -
I c−I coIPE - 4
Relation between , , :
From (1)
Ic – Ico = - IPc
Substituting this (4) , we get
= -
−IPcIPE
=
I PcIE
Dividing the numerator and denominator by IPE and using (2) and (3) we get
36
=
I PcI PE .
I PEIE
= .
Transistor is the product of transport factor and emitter efficiency.
CB configuration
A NPN transistor connected in CB configuration is shown in fig. Emitter base junction VEB can be varied by varying VEE. A series resistor Rs is included to limit the forward emitter current. Collector base junction VCB can be varied by varying VCC.
INPUT CHARACTERISTICS:
These characteristics are plotted between emitter current IE and emitter base junction voltage VEB, at constant values of collector base junction VCB.
a. for VCB =0 the input emitter base junction is forward baised and the variation in emitter current is similar to the forward characteristics of PN diode.b. As we increase the collector base voltage VCB it causes the emitter current to increase at a fixed VEB. When VCB increases the depletion region in the collector base junction increases and reduces base width. As a result emitter current due to holes increases.c. Dynamic input resistance of transistor is calculated from the slope of characteristics.
r1= ∆V EB
∆ IEV⃒CB= Const.
Ic(mA)
IE(mA) VCB = IV IE
4 - VCB=0 5mA3 - 4mA2 - 3mA1 - 2mA
1mA0mA
0.5 0.6 VEB (V) 1 2 3 4 5 VCB(volt)Input characteristics. O/P Characteristics.
37
OUTPUT CHARACTERISTICS:
The characteristics are drawn between collector current IC and collector base voltage VCB
at a constant emitter current
a) ACTIVE REGION :
In this region collector base junction is reverse biased and emitter base junction is forward biased. When emitter current IE is zero, the collector current flowing is reverse saturation current ICO. When emitter current is IE, the collector current IC is equal to IE and does not depend upon collector base voltage VCB. However, due to the early effect there is a small rise in the magnitude of collector current with the increase in VCB. In this region the output characteristics are almost parallel lines equally space for equal increments of emitter current IE.
b) SATURATION REGION:
In this region both collector base and emitter base junctions are forward biased. When VCB is slightly positive, the collector base junction becomes forward biased the collector current is positive giving rise to a hole current. Hence IC decreases.
c) CUT OFF REGION:
In this region both junctions are reverse biased. Hence the current flowing through the device is leakage current ICBO.
d) The dynamic output resistance ro.
Vo= ∆V CB
∆ IC⃒VEB= Const.
Since collector curves are almost parallel, for a given VCB, IC does not change appreciably. Hence output resistance is very high.
CE configuration
In this configuration, base is the input terminal, collector is the output terminal and emitter is the common terminal.
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Input Characteristics :
The input characteristics are drawn between base current IB and base emitter voltage VBE for different values or VCE.
1)If VCE = 0, and if the base- emitter junction is forward biased, the input characteristics is the same as the characteristics of forward biased diode.2)When VCE is increased, the width of the depletion region at the reverse- biased collector- base junction will increase. Hence the effective width of the base will decrease. This effect causes a decrease in the base current IB. Hence to get same value of IB as that for VCB = 0, VBE should be increased. Therefore the curve shifts to the right as VCE.
Output characteristics :-
The output characteristics are drawn between VCE (Collector – emitter voltage) to collector current ( IC) with base current ( IB) as parameter.
From the equations IC = ( 1+ ) ICO + IB if were constant, the for a given value of IB, IC also
would have been a constant and the curve would have been a horizontal line. However, due to early effect, the recombination in the base region is less if VCB is more. Thus we get more collector current IC with increase in VCE and the curves have a rising pattern.
The out put characteristics have 3 regions.
a. Active region b. Cutoff region c. Saturation region
a)Active region : In active region, emitter junction is forward – based and collector junction is reverse biased. Since emitter junction is forward biased, IB
0mA. Therefore the area above IB = 0mA and to the right of hatched region is the active region.
b) Cutoff region : Cutoff is defined as the condition when emitter current IE = 0. For achieving this
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condition it is not enough to have base current IB = 0 because even with IB =0, the collector
current IC = (1+) ICO . Therefore in order to achieve cutoff condition, it is necessary to slightly
reverse bias the emitter base junction, which can be achieved by applying 0.1V for germanium and OV for silicon transistors. This will ensure the required condition of cutoff i.e.,
IE=0 ; IC= ICO; IB=− IC=−ICO .
c) Saturation region : In the saturation region, both emitter junction and collector junction should be forward-biased. Therefore VBE and VBC both should have magnitudes at least equal to cut-in voltage Vr which is equal to fraction of a volt. Also since VCE =VCB- VBE, therefore VCE is also a few tenth of a volt at saturation. This is the left hatched region in output characteristic graph.
Early Effect
As VCC made to increase the reverse bias, the space charge width between collector and base tends to increase. This results in decrease of effective width of the base. This dependence of base width on collector voltage is known as ‘Early Effect’. This decrease of effective base width has three consequences.
(i) There is less chance of recombination in base region and Ic increases causing to increase with increase in VCB.
(ii) The charge gradient is increased within the base and current of minority carries injected across emitter junction increases.
(iii) For extremely large Vcs, the effective base width becomes zero causing voltage breaks down in the transistor. This phenomenon is called the “Punch through”.
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UNIT - VI
JFET CHARACTERISTICS
Syllabus
JFET characteristics (Qualitative and Quantitative discussion), Small signal model of JFET, MOSFET characteristics (Enhancement and depletion mode), Symbols of MOSFET, Introduction to SCR and UJT and their characteristics
JFET
Construction of FET:
A FET consists of a uniformly doped a semiconductor bar (also known as channel) with ohmic contacts at both ends and with semiconductor junctions on both sides of the bar.
In the case of N-channel FET, the starting material is a piece of P-type silicon into which is diffused an n-type region. A p-region is than diffused into n-region, leaving a thin channel of n-material. Ohmic contacts for the source and drain are made by metallization at each end of n-channel. This n-channel is conductive part of the device.
Similarly in the case of p-channel FET, the starting material is n-type material into which p-region is doped. Again n-type material is diffused into it to form a thin p-channel. The action of p-channel FET is complementary to n-channel FET.
OPERATION OF N- CHANNEL JFET :-
When VGS = 0 and VDS = 0 :- When no voltage is applied between drain and source, and gate and source, the thickness of the depletion regions round the PN junction is uniform.
When VGS = 0 and VDS is Positive :- The drain is biased positively w.r.t source. Therefore, a potential gradient exists along the channel increasing from zero at source end to VDS at drain
end. This results in the creation of depletion region where the thickness increases along the channel from source to drain the depletion region therefore have wedge shape.
The depletion regions are regions in which number of charge carriers have been
41
substantially reduced, i.e the resistivity of n-type channel has been increased. Hence the resistance from source to drain increases as VDS increases and consequently channel thickness decreases.As VDS is increased, the cross- sectional area of the channel will be reduced. At a certain voltage of VDS, the cross- sectional area becomes minimum and this voltage is called Pinch-off voltage.Pinch-off voltage is defined as Drain to Source voltage where the drain current begins to level off and approach a constant value. When VGS = -ve and VDS =+ve:As we increase gate to source voltage VGS in negative direction at a constant value of VDs, the effect of reverse bias increases and it causes the pinch off to occur at a lower level of VDS. Increasing VGS will also reduces the maximum drain current.
STATIC CHARACTERISTICS (OR) DRAIN CHARACTERISTICS:
These characteristics are obtained by plotting graph between drain to source voltage VDS
drain current Id at constant values of gate to source voltage VGS. These characteristics are divided into three regions.
a) OHMIC Region: When VGS=0, if we increase VDS from zero to a small amount the n-channel bar acts as a simple resistor. Hence the current Id increases linearly with VDS in this region.b) PINCHOFF REGION: As we further increases VDS, the ohmic voltage drop along the length of the bar reverse biases the gate source junction. This is turn decreases conductance of the channel. Therefore with increasing VDS, the characteristics bends and finally at a value Vp(Pinch off Voltage) or voltage VDS current reaches saturation value and becomes constant.c) BREAK DOWN REGION: As we increase VDS beyond avalanche break down voltage VA, FET enters break down region where a small change in VDS will cause a large change in drain current ID.
Different curves are drawn between VDS and Id for different constant gate voltage VGS. Break down occurs at lower values of VDS and VGS increases.
TRANSFER CHARACTERISTICS:
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These characteristics are drawn between gate to source voltage VGS and drain current ID for constant values of VDS. At a fixed VDS, drain current Id also fixed and will be maximum when VGS=0. As we increase VGS negatively, the channel width reduces and drain current reduces. Different curves are plotted at different values off VDS. Let the saturation drain current be IDS and its value when VGS=0 be IDSS. Then transfer characteristics giving the relationship between IDS and VGS is
IDS = IDSS (1- V GS
Vp)2
This equation is known as “shockley’s Equation”.
Depletion MOSFET.
The construction of N- channel depletion MOSFET, shown in fig(b) with VGS = 0 and the drain D at a positive potential with respect to the source, the electrons flow through the N- channel from Source to Drain. Therefore, the conventional current ID flows through the channel D to S. If the gate
voltage is made negative, positive charge consisting of holes is induced in the channel through SiO2 of the gate- channel capacitor. The introduction of the positive charge causes depletion of mobile electrons in the channel. Thus depletion region is produced in the channel. The shape of the depletion region depends on VGS and VDS. When VDS is increased, ID increases and it becomes practically constant at a certain value of VDS, called pinch-off voltage.
Drain Characteristics:
1. The curves are plotted for both negative and positive values of gate to source (V GS). The curve shown above the VGS = 0 has a positive value where as those below has negative vale of VGS.
2. When VGS is zero and negative, the MOSFET Operates in the depletion mode. If VGS is zero and positive, the MOSFET operates in the enhancement mode. When VDS = 0, there is no conduction takes place between source to drain. If VGS < 0, and VDS > 0 i.e., increased above zero volt, then drain current increases linearly. As a result of VGS < 0 is applied to the gate induces positive charged holes in the channel, and also it controls the channel width. Thus the conduction ID I constant.
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3. If VGS > 0 the gate induces more electrons in channel side, it is added with the free electrons generated by source. The potential applied to gate determines the channel width and maintain constant current flow.
Transfer characteristics :
1. The fig shows the transfer characteristics for an N channel depletion type MOSFET. The region AB of the characteristics is similar to that of JEFT.
2. This curve extends for the positive values of gate-to-source voltage VGS also. The value of IDSS represents the current from drain to source with VGS = 0. The drain current at any point along the transfer characteristics is given by ID = IDss
(1− V GS
V GS (off ) )2
Even if VGS = 0, the device has a drain current equal to IDSS.
3. In depletion mode, when VGS = 0 maximum current will flow between source to drain thus ID = IDSS when VGS increased continuously, after a certain extend the positive charges induced by gate completely depletes the channel thus no drain current i.e, VGS = VP.
4. In enhancement mode of increasing VGS > 0 more free electrons are induced in the channel, thus it enhances the electron result in which ID increases.
MOSFET.
The enhancement type MOSFET has no depletion mode and it operates only in enhancement mode. The basic structure of the N channel enhancement- type MOSFET is shown in fig below. The p type substrate extends the silicon dioxide layer completely. The MOSFET is always operated with positive gate to source voltage. When gate
to source voltage is zero, the VDD supply tries to force free e from source to drain. But the presence of p region does not permit the electrons to pass through it. Thus there is no drain current for VGS = 0. If some positive voltage is applied to the gate, it induces a negative charge in the p-type substrate just adjacent to the silicon dioxide layer. When the gate is positive enough
44
it can attract a number of tree electrons. This forms a thin layer of electrons, which stretches from source to drain. The minimum gate to source voltage, which produces inversion layer is called ‘ threshold voltage” by the symbol VGS. When the voltage VGS is less than VGS (th), no, current flows from drain to source.
Drain Characteristics :-
The drain characteristics for N- channel enhancement- type MOSFET is shown in fig. The gate to source voltage is less than threshold voltage, VGS (th), there is no drain current. An extremely small value of drain current does flow through the MOSFET. The current flow is due to the
presence for thermally generated electrons in the p type substrate. When the value of VGS is kept above VGB (th) , a drain current flows.
The value of drain current increases with increase in gate to source voltage. It is because of that fact that the width of the
inversion layer widens for increased value of VGS and therefore allows more number of free electrons to pass through it. The drain current reaches, it saturation value above certain value of drain to source voltage.
Transfer characteristics :
The fig shows the transfer characteristics for N-channel enhancement type MOSFET. There is no drain current when gate to source voltage, VGS = 0. It VGS is increased above the threshold voltage, VGS (th), the drain current at any point along the curve gives the relation.
ID = k [ VGS - VGS (th)]2
Where k is a constant, and whose value depends on the type of MOSEFT.
Working principle of UJT with emitter characteristics.
The basic structure of a Unipolar Junction Transistor (UJT) is shown in Fig.1. It is essentially a bar of N type semiconductor material into which P type material has been diffused nearer to base 2 region. Contacts are then made to the device as shown; these are referred to as the emitter, base 1 and base 2 respectively. Fig.3 shows the schematic symbol used to denote a UJT in circuit diagrams.
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Fig.1 Fig.2 Fig.3 Fig.4
The equivalent circuit shown in Fig.2 has been developed to explain how the device works, and it is necessary to define the terms used in this explanation.
RBB is known as the interbase resistance, and is the sum of RB1 and RB2: RBB = RB1 + RB2 (1) N.B. This is only true when the emitter is open circuit. VRB1 is the voltage developed across RB1; this is given by the voltage divider rule: RB1
VRB1 = VBB (2) RB1 + RB2 Since the denominator of equation 2 is equal to equation 1, the former can be rewritten as:
RB1 VRB1 = ____ x VBB (3) RBB
The ratio RB1 / RBB is referred to as the intrinsic standoff ratio and is denoted by (the Greek letter eta).
If an external voltage Ve is connected to the emitter, the equivalent circuit can be redrawn as shown in Fig.4.
If Ve is less than VRB1, the diode is reverse biased and the circuit behaves as though the emitter was open
circuit. If however Ve is increased so that it exceeds VRB1 by at least 0.7V, the diode becomes forward biased and emitter current Ie flows into the base 1 region. Because of this, the value of RB1 decreases. It has been suggested that this is due to the presence of additional charge carriers (holes) in the bar. Further increase in Ve causes the emitter current to increase which in turn reduces RB1 and this causes a further increase in current. This runaway effect is termed regeneration. The value of emitter voltage at which this occurs is known as the peak voltage V P
and is given by:
VP = VBB + VD (4)
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The characteristics of the UJT are illustrated by the graph of emitter voltage against emitter current (Fig.5). As the emitter voltage is increased, the current is very small - just a few microamps. When the peak point is reached, the current rises rapidly, until at the valley point the device runs into saturation. At this point RB1 is at its lowest value, which is known as the saturation resistance.
Field Effect Transistor (FET) Bipolar Junction Transistor (BJT)
1. It is a uni-polar device (i.e.,) current in the device is either by electrons (or) holes.
2. It is a voltage controlled device (i.e.,) voltage at the gate terminal controls the amount of current through the device.
3. Input resistance is very high and is of the order of mega ohms.
4. It has negative temperature coefficient at high current levels. It means that current decreases as the temperature Increases. This characteristic prevents the FET from thermal brake down.
5. It does not suffer from minority carrier storage effects and therefore has higher switching speeds and cut-off frequencies.
6. It is less noisy than a BJT and vacuum tube.
7. Simpler to fabricate as a IC and occupies a less space on IC.
8. Low gain-bandwidth product
9. Cost is high
1. It is bipolar device i.e., current in the device is carried by both electrons and holes.
2. It is a current controlled device (i.e.,) the base controls the amount of collector current.
3. Input resistance is very low as compared to FET and is of the order of few ohms to kilo ohms.
4. It has a positive temperature coefficient at high current level. It means that collector current increases with the increase in temperature. This characteristic leads the BJT to thermal breakdown.
5. It suffers from minority carrier storage effects and so has lower switching speed and cut-off frequencies than that of FET’s.
6. More noisier than a FET.
7. Difficult to fabricate as an integrated circuit (IC) occupies more space than that of FET.
8. High gain-bandwidth product
9. Cost is low.
S.No. BJT JFET MOS FET
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1 TypesNPN, PNP,
Bipolar
Nch JET, Pch JFET,
Unipolar
Enhancement & depletion type,
Unipolar
2 CurrentBoth majority
&minority charge carriers are used
Only majority charge carriers are used
Only majority charge carriers are used.
3Input
impedanceLow (k) High (100 M) Very high (1015 )
4 Control
Current controlled device input current
controls output current
Voltage controlled device. Input voltage
controls output current
Voltage controlled device.
5 Fabrication Difficult Easy Easy
6 HandlingEasy No, preached
requiredEasy
Difficult, special precautions to be taken
7Power
DissipationHigh Low Very low
8 Lifetime Less More Less
9Switching
speedLess High High
Biasing of FET
Source self-Bias circuit:
This configuration can be used to bias JFET pr depletion mode MOS FET.
- Voltage across RS is used to reverse bias the gate as voltage across RE
is used for self-bias of CE amplifier.
- Relation of drain current, VGS, Vp is given by IDS = IDSS (1 – VGS/VP) 2.
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- Since gate current in negligible, source resistance can be found as RS = Biasing against device variation: -
VGS = VGG – IDRS. (Gate current is very small & VRG is small)
- VGS is always negative- There may be a change in the drain current Id, when even a device is changed- If a device change results in increase in Id, it leads to more voltage drop across
RS and –VGS increases. So, Id will be reduced.- In this way the circuit takes care of device variations.
SCR (Silicon Controlled Rectifier)
Thyristor is a family of semiconductor devices i.e. PUT, RCT, GTO, SCR etc. The oldest member of this thyristor family is SCR (silicon controlled rectifier). Due to the vast use of SCR, the word thyristor has become synonymous with SCR. So here, the term thyristor is used for SCR. SCR is a four layer, three-junction, three-terminal, p-n-p-n semiconductor switching device. The three terminals are: anode, cathode and gate. Schematic diagram and circuit symbol for a thyristor are shown respectively in Figs. The terminal connected to outer p region is called anode (A), the terminal connected to outer n region is called cathode (K) and the terminal connected to inner p region is called gate (G).
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Two-Transistor Model of a Thyristor (SCR) The principle of thyristor operation can be explained with the use of its two-transistor model or two-transistor analogy. Fig. (a) shows the schematic diagram of a thyristor. From this figure, two-transistor model is obtained by bisecting the two middle layers, along the dotted line in two separate halves as shown in Fig. (b) In this figure, junctions J1-J2 and J2-J3 can be considered to constitute pnp and npn transistors separately. The circuit representation of the two-transistor model of a thyristor is shown in Fig. (c).
VI CHARACTERISTICS OF SCR
FORWARD CHARCTERISTICS
When anode is +ve w.r.t cathode the curve between V & I is called Forward characteristics. OABC is the forward characteristics of the SCR at Ig =0. if the supplied voltage is increased from zero point A is reached .SCR starts conducting voltage across SCR suddenly drops (dotted curve AB) most of supply voltage appears across RL
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REVERSE CHARCTERISTICS
When anode is –ve w.r.t.cathode the curve b/w V&I is known as reverse characteristics reverse voltage come across SCR when it is operated with ac supply reverse voltage is increased anode current remains small avalanche breakdown occurs and SCR starts conducting heavily is known as reverse breakdown voltage
ApplicationsSCR as a static contactor
SCR for power control
SCR for speed control of d.c.shunt motor
Over light detector
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UNIT-VIITransistor Biasing and Thermal Stabilization
SyllabusTransistor Biasing and Thermal Stabilization : Transistor Biasing and Thermal Stabilization: Operating point, Basic Stability, Collector to Base Bias, Self Bias, Stabilization against variations in VBE,, and β for the self bias circuit, Stabilization factors, (S, S', S'’), Bias Compensation, Thermistor and Sensitor compensation, Compensation against variation in VBE, Ico,, Thermal runaway, Thermal stability
Each of the two junctions of the BJT has a potential barrier across it that does not allow both type of charge carriers (holes or electrons) to cross the junction and hence, current does not flow through any of the junctions. This forces the BJT to be considered as an idle device and hence it does not act (work). In order to bring the BJT from idle to active state, appropriate external dc potential must be applied across both junctions to allow current carriers to cross the junctions.
The emitter serves as the supplier of current carriers (holes or electrons). The external dc voltage applied across Emitter-Base Junction (EBJ) must cancel the reverse bias (potential barrier) inherently present and must force the current carriers from emitter region to cross the EBJ and go to the collector region. This external dc potential applied across the EBJ is known as forward bias as it enhances the flow of current carriers across it. As soon as these charge carriers reach the collector region, the collector should collect them easily. So the collector terminal should be connected to dc voltage of the type that should attract these carriers. Thus, a p-type collector region must be connected to the negative terminal of the battery and an n-type collector region must be supplied with the positive terminal of the battery. This type of external dc voltage adds to the potential barrier across CBJ and such external dc potential applied across CBJ is called reverse bias that increases the depletion width also.
The external dc potential applied across the EBJ should always be forward bias and CBJ should always be reverse biased for normal operation of the BJT. The application of external dc voltage across the two-junctions of BJT is known as biasing.
b) Explain the reasons for keeping the operating point of a transistor as fixed.By now it is clear that the external dc potential must be applied across two-junctions to bring the transistor into the conduction region. The dc voltage across the collector emitter (VCE), the dc collector current (Ic) and the dc base current (IB) through the BJT define the quiescent Q-point that is decided by its uses. For example, the Q-point of the BJT must be selected on the two extremity points B and C in Fig. 1 along the dc load line on the output characteristics of the BJT if it is to be used as a switch. On the other hand for class-A amplification, the Q-point must be in the middle of the linear range of the output characteristics at point A in Fig. 1. This allows maximum fluctuations in the collector current and collector voltage without exceeding the dissipation power rating of the transistor so that the output
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waveform is just the amplified replica of the input signal. If care is not taken, either positive or negative half-cycle of the signal may be (output waveforms are just the amplified replica of the input) clipped off and distortion may occur. This is explained in Figs.2 and 3.
We conclude that once the quiescent point is selected, it should remain fixed otherwise transistor amplifier designed for amplification may start behaving as a switch. It may so happen that due to change in temperature, manufacturers’ spread in active parameters, variation in the voltages and tolerance of resistance, etc may act cumulative and shift the Q-point to B, i.e. from active region to saturation region. Hence, transistor changes its action as an amplifier to a switch. The stabilization of operating is most essential since the amplifier’s amplitude, phase and frequency responses are dependent on the Q-point. In Fig. 4 dotted lines indicate the change in collector current curve with increase in the temperature.
The Q - point can change with any one or many parameters together. Thus, in order to have a quantitative analysis of this change, the quiescent collector current must be related with all such types of parameters that bring in the change.
Figure 1: Selection of the best Q-point
Figure .2: Q-point near saturation
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Figure 3: Q-point near cut-off point
Figure 4: Variation of output characteristic with temperature
2. Draw a fixed bias circuit and derive an expression for the stability factor.The simplest biasing circuit with a fixed resistor connected between the base and the external dc supply voltage VCC can be seen in Fig. 5. For linear operation, the Q-point should be chosen such that VCC divided equally between CE and drop across its load resistance R( In order to find the quiescent collector current following points must be kept in mind:
• Form a close loop including the external battery and the EBJ as shown by dotted line in Fig. 5.
• Write the KVL equation around the input loop in Fig. 5 asVCC = RBIB + VBE --1
The dc equivalent circuit of the BJT is drawn in Fig. 6. From Fig. 7.6IC = βIB + (1+β)ICO --2
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Figure 5: Fixed bias
Figure 6: Equivalent circuit of fixed biasCombining Eqns. 1 and 2 yields
V CC=IC−(1+β) ICO
βRB+V BE
β (V CC−V BE )=RB IC−(1+β ) ICORB
IC=β (V CC−V BE )+(1+β ) ICORB
RB
---3
Equation 3 reveals that the quiescent collector current is a function of VBE , , ICO,VCC and RB. The biasing of the BJT should be such that IC = ICQ should not change irrespective of changes in these quantities either separte1y or collectively. The amount of change in due to change in any of the variables of Eqn. 3 is defined as the stability factor. Thus, stability factor is a measure of deviation in the quiescent collector
current for the corresponding deviation in VBE, , ICO,VCC and RB. Thus, stability factors against different variables are defined as
S=∂ IC∂ ICO
, S'=∂ IC∂V BE
, S ' '=∂ IC∂β
,S ' ' '=∂ IC∂V CC
, S ' ' ' '=∂ IC∂RB
--4
The VCC is supplied by a stabilized power supply and hence change in VCC is not considered. Selecting RB
of a precision type resistance, change in RB is normally not considered for the change in lC. For one particular transistor, unless unit replacement takes place change in IC due to change in β is assumed to be negligible. Thus, due to change in temperature usually ICO, and VBE change and the stability factors, for
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the moment are restricted to changes in Ico and VBE only. Stability factor S, for Fig. 5 can be obtained by differentiating Eqn. 3 with reference to particular variable such as
S=∂ IC∂ ICO
=(1+β) --5
It is clear that a small change in ICO, i.e ∂ ICO gets multiplied by (1+β) that becomes a significant quantity depending upon the value of the β. Thus, the small changes in the ICO bring large change in the Quiescent collector current IC and the Q-point gets shifted from point A to A1. The value of ICO negligibly small but (1 + β ) ICO is appreciable that brings significant change in the quiescent collector current. So stability of the bias point-A in Fig. 7 for this circuit is very poor as demonstrated by Eqn. 5 and Fig. 8 because I CO, increases with temperature. Thus, operating point-A of Fig. 5 is not stable and shifts as illustrated in Fig. 8 and can lead to the thermal runaway.
Figure 7: Shift of Q-point
Figure 8: Thermal runaway in fixed bias
We understand by now that the stability factor is a misnomer. As per the word meaning of stability factor, higher the value of the stability factor, more should be the stability of the quiescent point. But actually it is the reverse way. Lower the value of the stability factor, more stabilized is the Q-point.
The value of the stability factor falling in the range of 2 to 9 is supposed to be good. Higher than this value brings instability in the Q-point. The theoretical best value of stability factor should ideally be zero that is practically impossible because to set S = 0 either∂ IC = 0 or the change in ICO i.e. ∂ ICO=∝. For infinite∂ ICO, the appreciable change in 1 is inevitable. Hence, first statement is not valid and S, can not
be iero rather S > 1. Thus, the ideal maximum and minimum values of S could be S =1 and S = .
Advantages of fixed base bias
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• The biasing circuit is the simplest as only RB is used,• The bias conditions can be fixed easily.• No loading occurs as a large resistor is connected between the base-emitter junctions.Disadvantages of fixed base bias
• Very poor stabilization of the Q-point and• Chances of thermal runaway are high as stability factor is high.
3. Draw the collector to base bias circuit and derive the expression for the stability factor S.The collector to base type of biasing is also called the bias voltage feedback bias. If the base bias resistor RB of Fig. 5 is connected between the base and the collector as shown in Fig. 9, the resulting arrangement is called collector to base bias. A part of the output voltage is fed back to the input through resistance RB. The stability factor of Fig.9 can be shown to have improved to a certain extent w.r.t. that of Fig. 5.
The output loop equation for Fig. 9 can be written as
Figure 9: Collector to base bias
V CC=RC IC+V CE --6V CE=V CC−RC IC=RB IB+V BE --7
With increasing collector current IC (due to the rise in temperature). RCIC increases and hence VCE
decreases as VCC is constant. Hence, voltage drops across collector to emitter VCE = RBIB + VBE also decreases. Here VBE is assumed to be constant, so decreases the base current I, and hence IC = (VCC - VCE)/Rc also decreases. As soon as the base current is decreased collector current also decreases proportionately.
Thus, negative voltage feedback brings down the collector current back to the original value. On the contrary, decreasing collector current IC due to decrease of temperature decreases RCIC and hence, VCE
increases. So voltage drop across RB increases that forces the base current to increase to bring the collector current back to its original value. The relevant current and voltage relationships are obtained from Fig. 10 as
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Figure 7.10 Simplified collector-to-base bias
IC=β I B+(1+β) ICO
I B=ICβ+(1+β )ICO
β ---8
V CC=RC ( IC+ IB )+RB IB+V BE=RC IC+(RC+RB ) IB+V BE
V CC−V BE=RC IC+(RC+RB )ICβ−(RC+RB )
(1+ β) ICOβ
Hence,
IC=β (V CC−V BE )+(1+β )ICO (RC+RB )
RB+(1+β )RC--9
The stability factor for this circuit is
S=∂ IC∂ ICO
=(1+β)
1+βRC
RC+RB
--10
As the stability factor in Eqn. 10 is much less than the stability factor in Eqn. 5, the biasing circuit of Fig. 9 is much more stabilized than the circuit of Fig. 5. The process of checking the rising tendency in I C in the case of collector to base bias due to rise in temperature is shown in Fig. 11. The increase in temperature raises ICO or ICE that causes lC rise. The RCIC increases forcing VCE decrease, that means VBE + RBIB is decreased. Here VBE has been assumed to be constant. Hence decrease in this is caused by decrease in I B, only because RB is fixed. As IB decreases IC also decreases. Hence, increasing temperature does not allow lc to increase in this case. As VBE decreases with rising temperature, that brings the back to us original value again.
Figure 11: Collector-base bias checks thermal instability
Disadvantages of Collector to Base Bias
The collector voltage is 180° out of phase w.r.t. the base voltage. This 180° out of phase voltage from the collector point is fed back through the collector to base resistance RB to the base point. Hence, it
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cancels the input voltage by the fed back amount. Thus, the effective voltage at the base terminal in this configuration goes down and hence, gain of the amplifier also goes down.
3. Draw the circuit diagram of a Voltage Divider Emitter Bias (Self bias) and derive the stability factor sThe voltage divider emitter bias circuit shown in Fig. 12 is practically used in almost all general- purpose transistor amplifier biasing. The circuit is adjusted such that the bleeder current through R 2 is at least 10 IB So IB<< IR1 and IR2 and Thevenin’s theorem can he applied at the base of the transistor in Fig. 12.
Figure 12 Voltage divider emitter bias circuit
The Thevenin’s voltage VOC = VB can be obtained after opening at the base as in Fig. 13. Current IR1 = IR2 is obtained under the condition IR2 = 10 IB as
IR1=I R2=V CC
R1+R2,∧V OC=V B=
V CC R2
R1+R2--11
Thevenin’s theorem is used to find out the equivalent base voltage to forward bias the base-emitter junction and the effective internal resistance in series with the equivalent voltage of the equivalent source. Obtain the equivalent resistance by shorting all voltage sources and opening all current sources with their internal resistances intact as shown in Fig. 13.
Figure 13: Voltage divider emitter bias circuit.
ROC=RB=R1R2
R1+R2 --12
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The Thevenin’s equivalent voltage VOC = VB and ROC = RB is now connected to the base of transistor as shown 14.
Figure 14: Voltage divider emitter bias circuit
The dc equivalent circuit of BJT is drawn in Fig. 14 with its fundamental equations as
IC=β I B+(1+β) ICO
V B=RB I B+RE I E+V BE=RB IB+ ( IC+ IB ) RE+V BE
(RB+RE )IC−(1+β ) ICO
β+RE IC=V B−V BE
(RB+RE )( IC−(1+β ) ICO)+βRE IC=β (V ¿¿B−V BE)¿
Hence,
IC=β(V ¿¿B−V BE)+(1+β )ICO (RE+RB )
RB+(1+β )RE¿ --13
The stability factor for this circuit is
S=∂IC∂ ICO
=(1+ β)
1+βRE
RE+RB
--14
4. a) Explain bias compensation using sensistors.Temperature sensitive devices such as thermistor and sensistor can replace the existing resistor in a transistor circuit or can be added at an appropriate position in the circuit to compensate the variation of the operating point with respect to temperature. A thermistor for is a device whose resistance depends on temperature and decreases with increase in temperature. A thermistor is a device whose resistance increases with increase in temperature. A sensistor for has negative temperature coefficient, because its resistance is decreasing exponentially with increasing temperature. A sensistor has positive temperature coefficient, because its resistance increases exponentially with increasing temperature. Both of them are together called as varistors.
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The circuit shown in Fig. 17 employs a thermistor that is connected between the supply and the emitter of the transistor. The current in the emitter resistance RE is the sum of the current through RT and the emitter current. As the temperature increases, the value of R decreases and so it draws more current from this excess current flows in RE increase the voltage drop across it. This, in turn, decreases the voltage drop across the emitter junction since voltage across R2 is constant. As the emitter junction is forward biased, the decrease in voltage across this junction decreases the base current, thus reducing the collector current. With this type of feedback, the increase in the collector current due to the increase in the temperature is compensated to a large extent.
Figure 17
The compensation may also be achieved by placing a thermistor in parallel to R 2, In this case, the thermistor between VCC and emitter is not required. As the temperature increases, the effective resistance between base and ground decreases, which decreases the voltage across R2. Thus, the voltage across the forward-biased emitter junction decreases, decreasing the collector current.
The compensation of the variations in the operating point can also be achieved by the use of a sensistor, as shown in Fig. 18. The sensistor may be either placed in shunt with R1 or in shunt with RE .When the sensistor is placed in shunt with RE, the effective emitter resistance increases with increase in temperature, thus reducing the forward bias junction voltage. This reduces the collector current and compensation is achieved.
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Figure 18.
When the sensistor is across R1 increase in temperature leads to increase in effective value of R1, which decreases the current drawn by the resistor network, R1 and R2. The decrease in the current in R2 leads to decrease in emitter junction voltage, thus compensating the operating point variations.
b) Explain in detail about thermal runaway and thermal resistance.The effect of high temperature on a bipolar junction transistor is very serious, leading to permanent damage of the component if proper heat balance is not employed in the circuit. If the effect of temperature on the circuit is not properly compensated for, a closed loop is formed wherein temperature increases lo a very large extent, tending the dissipated heat to infinity ideally.
Whatever may be the reason, when ambient temperature of the transistor circuit increases, the reverse saturation current in the collector junction increases and this increases the collector current. Since the collector current flows in the reverse biased collector junction, whose voltage is a large value, the dissipation of power as heat in this junction is very large and tends to increase with rise in temperature. This, in turn, increases the temperature of the junction, which leads to increase of once again. This cycle of increase of temperature -ICO-IC-power dissipation-temperature forms a closed loop (as shown in Fig. 19) and thus the temperature at the collector junction of the transistor thus increases. This condition is impossible since the energy supplied by the battery VCC is limited, the heat dissipation in the component crosses the maximum value for which it is designed. At this juncture, the transistor wills not he able to tolerate the excess generated heat since it is not designed to dissipate the excess thermal energy
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effectively. This condition where the heat dissipation is slower compared to rate of heat generation leads to the burning of the transistor. This is known as thermal runaway.
Figure 19.
In the design procedure of any transistor circuit, caution is to be exercised that thermal runaway never occurs. This may be achieved by making rate of power dissipation in the collector more compared to rate of power generation in the same junction.
The maximum average power PD,max that a transistor can dissipate depends on the transistor construction and it may he in the range from few milliwatts to 200 W. The maximum power is limited by the temperature that the collector base junction can withstand. These values of maximum power dissipation depend upon the type of material and the type of the component for which it is designed. For a silicon transistor it is of the order of 150 0C to 225 0C and for a germanium transistor it is between 60 0C and 100 0C. Thermal resistance: From thermodynamics, heat flows from higher temperature to lower temperature and the rate of flow depends upon the type of media in which the heat is flowing. The constant of the media, which dictates the rate of flow of heat, can be defined as thermal resistance. This phenomena on of thermal resistance is governed by a law that can be given as
where Tj is junction temperature, TA is ambient (room) temperature, PD is dissipated power and Θ is thermal resistance. This equation is similar to that of Ohm’s law in electrical circuits. If T j - TA the temperature difference between two points, is similar to voltage drop between two points, electrical current is similar to power dissipation and so the electrical resistance is identical to thermal resistance. Thus, the electrical resistance and thermal resistance are the properties of the media. The value of the thermal resistance depends upon the size of the transistor, on convection or radiation to the surroundings on forced air cooling, and on thermal connection of the device to a metal chassis or a heat sink. Typical values of various transistor designs vary from 02 0C/W for high-power transistors with an efficient heat sink to 1000 0C/W for a low-power transistor in free air. The temperature rate at which power is dissipated under steady-state conditions is obtained by differentiating above equation with respect to Tj or
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The maximum collector power PC for safe operation of the transistor is specified at 25 C. For ambient temperatures above this value, PC must be decreased such that at extreme temperature, the transistor PC is reduced to zero.
Condition for thermal stability: In a transistor circuit care must be taken that thermal nina- way never occurs. To avoid thermal runaway, the rate of dissipation should be large compared to rate of generation at the collector junction. If this condition is satisfied, thermal runaway will never occur in a circuit and the circuit is in safe region of operation. if P C is the power generated in the collector junction of the transistor and PD is the power dissipated by a transistor, the condition for thermal runaway is
For a self-bias circuit, VCB = VCE - VBE since VBE is the forward bias voltage of the emitter junction. Therefore.
Applying KVL to output circuit,
The solution of above two equations
The Equation can be rewritten as
Since lC increases with temperature, ∂ IC∂T j
T is positive and so, ∂PC
∂ ICshould be less than 1 since Θ is
positive. Hence, to avoid thennal runaway it is necessary that
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From Eq. , the condition to avoid thermal runaway can be written as
if VCE > Vcc/2, it can be seen that , ∂PC
∂ IC is positive and there is a possibility of thermal runaway. So, the
designer of a transistor circuit should carefully design the circuit so that Eq. VCE > Vcc/2 is satisfied in a self-bias circuit always.
UNIT - VIII
SMALL SIGNAL LOW FREQUENCY TRANSISTOR MODELS
Small signal low frequency Transistor models: Two port devices and the Hybrid model, Transistor Hybrid model, Determination of h-parameters from characteristics, Measurement of h-parameters, Conversion formulas for the parameters of three transistor configurations, Analysis of a Transistor Amplifier circuit using h- parameters, Comparison of Transistor Amplifier configurations
There are three small signal models of a BJT in use:
(i) h-parameter model, (ii) hybrid-π model and (iii) re-model.
The h-parameter model is used extensively for transistor circuit ac analysis as h-parameters are usually specified by the manufacturers in the data sheets. However, it has the limitation that the h-parameters are specified by the manufacturer only at a typical operating point, whereas the circuit to be analyzed may be operating at a different operating point. Thus, the use of h-parameter model as an equivalent circuit of transistor does not provide exact analysis. On the other hand, the parameters of hybrid-π model or re-model can be determined at the given dc operating conditions and, therefore, are not limited by a single set of operating specifications provided by the manufacturer. Thus, the use of hybrid-π or re-model for ac analysis of transistor circuits provides more accurate analysis.
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All the three models are used extensively in literature and industry. We have, therefore, examined all the three small signal models of the BJT in this chapter.
Notation
Since the BJT (and also the diode) circuits require both dc and ac currents and voltages in analysis, it will be appropriate to follow a universally used notation given as:
IB or VB: denotes dc part of base current and base voltage
ib, or vb,: denotes ac part of base current and base voltage
Ib, or Vb,: denotes the rms values of base current and base voltage
iB or vB: denotes (ac + dc) values collectively, i.e., iB = IB + ib and vB = VB + vb
We use similar notations for quantities referring to emitter and collector.
The Hybrid h-parameter Model
The h-parameter model for a transistor is obtained by first describing the hybrid-h model for a general two-port system. Any two-port active device such as a transistor or transformer can be specified by input and output voltages and currents as shown in Fig. 6.1.
Fig. 6.1 Two-port system.
In Fig. 6.1, V1, I1, V2 and I2 are the rms (or effective) values of the ac voltages and currents. As we are doing ac analysis of the transistor, all the voltages and currents are ac signals only and can be represented either as v1, i1, v2 and i2 or by their rms values V1, I1, V2 and I2. Depending upon the device, two of these four quantities are selected as independent variables. For example, if the two-port device is a transformer then the input and output voltages (V1, and V2) are chosen as independent variables because this ratio is a constant and equal to the transformer turns ratio. For a transistor, input current I1 and output voltage V2 are usually chosen as independent variables. We may write, in general:
V1 = h11I1 + h12V2 --6.1
I2 = h21I1 + h22 V2 --6.2
The four parameters, h11, h12, h21, and h22 in Eqns. (6.1) and (6.2) have different dimensions and that is the reason that these parameters are also called hybrid (mixed) parameters or in brief
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h-parameters. It will further be seen that two of these parameters, h11 and h12 are short circuit parameters and the remaining two, that is h12 and h22 are open circuit parameters.
If V2 = 0 in Eq. (6.1) (i.e. output port is short circuited), solving for h11 gives
h11=V 1
I1¿V 2=0 --6.3
It is easily seen that the parameter h11 is an impedance parameter and has the units of ohms. Further, since /in is the ratio of input voltage and input current with output shorted, h^ is called the short circuit input impedance. The subscript 11 in h11 indicates that this parameter is determined by measuring quantities at the input terminals.
If, I1 is made equal to zero in Eq. (6.1) by opening the input terminals, we get
h12=V 1
V 2¿ I1=0 --6.4
The parameter h12 has no dimensions as it is the ratio of two voltages only. The subscript 12 in h12 indicates that the parameter is a transfer quantity and relates input and output quantities.
This parameter is called open circuit reverse transfer voltage ratio as it is the ratio of input voltage to output voltage.
Similarly, the parameters h12 and h22 are obtained from Eq. (6.2) and are defined as follows:
h21=I 2
I 1¿V 2=0 --6.5
This parameter is also dimensionless (like h12) and is referred to as short circuit current gain. The fourth parameter, h22 is given by
h22=I 2
V 2¿ I1=0 --6.6
The parameter h22 has the units of conductance and is called output conductance with input open circuited.
There is an alternative notation for the subscripts used with h which is more convenient and practical and is recommended by the IEEE standards:
h11 = Input resistance hi
h12 = Reverse transfer voltage ratio hr
h21 = Forward transfer current gain hf
h22 = Output conductance ho
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The terminal Eqs. (6.1) and (6.2) of the two-port device can be rewritten using the suggested practical notation as:
V1 = hiI1 + hrV2 --6.7
I2 = hfI1 + hoV2 --6.8
An ac equivalent circuit for the basic two-port device characterized by Eqs. (6.7) and (6.8) is shown in Fig. 6.2.
Fig. 6.2 ac equivalent circuit or h-model for a two-port device.
The device of our interest here is a transistor which can be used in three different configurations, i.e., CE, CC and CB. In order to identify the mode of operation of transistor, another subscript e, c or b is added in each of the h-parameters for CE, CC and CB, respectively.
Thus, the hybrid A-model of a transistor in CE configuration can be obtained by first writing the terminal equations using the graphical symbol shown in Fig. 6.3(a) as:
Vbe = hieIb + hreVce --6.9
Ic = hfeIb + hoeVce --6.10
All the voltages and currents in these equations are the rms values of the ac signals as per the notation used.
The h-parameter model drawn using Eqns. (6.9) and (6.10) is shown in Fig. 6.3(b).
Fig. 6.3 CE configuration (a) graphic symbol, (b) h-parameter model.
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In order to obtain hybrid h-model for any configuration, first draw the graphic symbol, indicate input and output voltages and currents, and write down the terminal equations. So, the terminal equations for a CB connected transistor [by using input quantities Veb, Ie and the output quantities Vcb, and Ic, as shown in graphic symbol Fig. 6.4(a)] can be written as:
Veb = hibIe + hrbVcb --6.11a
I2 = -Ic = hfbIe + hobVcb --6.11b
The corresponding h-model is also shown in Fig. 6.4(b). Note that the output current I2 in this case is equal to -Ic (since I2 has been assumed entering into the output port in the general analysis).
Fig. 6.4 CB configuration (a) graphic symbol (b) h-parameter model.
Similarly, we can drawn the h-model for a CC transistor from its graphic symbol shown in the Fig. 6.5, using the terminal equation given as
Vbe = hicIb + hrcVec --6.12a
I2 = -Ie = hfcIe + hocVec --6.12b
It is possible to calculate h-parameters for a given Q-point from the output and input characteristics of transistor by using the definitions of the parameters. Thus the parameters h ie, and hre can be determined from the input characteristics and the parameters hfe, and hoe is obtained from the output collector characteristics of a transistor in CE configuration.
Fig. 6.5 CC configuration (a) graphic symbol (b) hybrid h-model.
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The calculation of parameters hfe, and hoe, from the output characteristics is shown in Fig. 6.6(a). We want to determine the h parameters at the quiescent point of operation. The definitions of hfe, and hoe are given by
h fe=∂ iC∂ iB
=ΔiCΔiB
¿V CE=constant --6.13
and hoe=∂iC∂vCE
=ΔiCΔvCE
¿IB=constant --6.14
where the various voltages and currents represent the total values, that is, dc component plus ac component. Thus, iC = ic + ICQ and so on.
The symbol ∆ in Eqns. 6.13 and 6.14 refers to a small change of the quantity around the Q-point. So in Fig. 6.6(a)
h fe=iC 2−iC1
iB 2−iB1 --6.15
Fig. 6.6(a) Calculation of hfe and hoe from CE output characteristics
To determine the parameter hie and hre the Q-point is first located on the input characteristics as shown in Fig. 6.6(b). The parameter hie is calculated by finding the change in base current iB
for a small change in VBE as:
hie=∂ vBE∂iB
=Δ vBEΔiB
¿V CE=vCEQ --6.16
The value of hre can similarly be computed using its definition. For higher accuracy, the changes about the Q-point should be made as small as possible.
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Fig. 6.6(b) Computing hie and hre from the input characteristics.
There are two important facts which need to be mentioned about the A-parameters. Firstly, that the values of h-parameters depend upon the Q-point and secondly, h-parameters vary with temperature. Most of the transistor specification sheets provide curves giving the variation of h-parameters with the collector current and junction temperature.
It may further be emphasized that the h-parameter model of the transistor as its ac equivalent circuit is valid only for small input signals. The ac input signal should be small enough so that the variations of voltages/currents about the Q-point are sufficiently small. Then only the transistor parameters can be assumed to be constant over the signal excursion.
The use of h-parameters model as ac equivalent circuit of transistor has many advantages. The h-parameters are:
1. real numbers at audio frequencies (as all the internal capacitances of a transistor are sufficiently low and can be neglected at low frequencies)
2. easy to measure experimentally
3. can be computed from transistor static characteristics.
The manufacturers usually specify h-parameters in data sheets and this is one reason that h-parameter model is extensively used for circuit analysis and design. Table 6,1 gives the values of h-parameters of a typical transistor in CE, CC and CB configurations.
Table 6.1 Typical h-parameter values for a transistor (at IC = 1.0 mA, VCE=10V,f=1kHz)
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Some of the transistor manufacturers specify all the four CE h-parameters only, whereas others specify mixed parameters hfe, hib, hob and hrb. Given any four h-parameters, it is possible to compute the other parameters by the conversion formulas given in Table 6.2. These formulas can be easily verified by using the definition of the parameters and Kirchhoff’s laws. The exact conversion formulas are quite complicated and for all practical purposes, it is sufficient to use only the approximate conversion formulas of Table 6.2.
Table 6.2 Approximate Conversion Formulas for h-Parameters
2. Draw the circuit diagram of CE amlifiers using h-parameters equalent circuit obtain AI, Ri, AV and R0
A BJT can be used as an amplifier in three different configurations, i.e. CE, CC and CB. Whatever may be the type of amplifier, in general, there are four quantities of interest in any amplifier: AI, Ri, AV and R0, that is, current gain, input impedance, voltage gain and output impedance, respectively. It has been emphasized earlier that a transistor is biased in the active region using various biasing techniques so as to get a distortion free output signal. We are, however, interested in finding only the ac values of gains and impedances. Therefore, an ac equivalent circuit is obtained by replacing all the dc voltage supplies by short circuits. The dc levels are important for determining the Q-point and once the Q-point has been determined, the dc levels can simply be ignored. In addition, all the coupling capacitors and by-pass capacitors are usually chosen high and, therefore, have very low reactance at the signal frequency of interest. The coupling and by-pass capacitors can, therefore, be assumed to be short circuit.
The ac analysis of an amplifier can be done by replacing the transistor by any of the three models discussed. Whenever h-parameter model is used, one need not perform the DC analysis as h-parameters are usually specified and are taken from the data manuals.
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To summarize, the following steps should be followed for performing the ac analysis of transistor amplifier circuits:
1. Perform the dc analysis of the circuit to determine the dc quiescent collector current (ICQ). If h-parameter model is to be used then there is no need to perform the dc analysis.
2. Draw the ac equivalent circuit by
(i) replacing the transistor by the model to be used.
(ii) replacing dc voltage sources by a short circuit. Here it is assumed that all the dc sources are ideal. All dc current sources are to be replaced by open circuit. (assuming dc current sources ideal).
(iii) replacing all the coupling and by-pass capacitors by short circuits.
3. Analyze the resulting ac equivalent circuit using KCL and KVL for computing the desired quantities (i.e. AI, Ri, AV and R0).
Note that the procedure of analysis holds only for the small input signals. Hence it is called small signal analysis. The condition of small signal implies that the amplifier has almost linear behavior in operation. Once the amplifier is linear, we can obtain net overall values of various currents and voltages in the amplifier by the following two steps:
(i) first taking only dc current and voltage sources and ignoring 'all ac values (dc analysis)
(ii) then considering only ac currents and voltage signals and ignoring all dc values (ac analysis)
The net values of various currents and voltages will be the addition of respective values obtained in (i) and (ii) since we have assumed the linear operation of the amplifier circuit.
The above procedure will be illustrated by taking various examples for each of the models discussed earlier.
Amplifier Analysis using h-parameter Model
The analysis of various types of single stage (CE, CC, and CB) transistor amplifiers using h-model will be discussed. As stated earlier, the h-parameters are supplied by the manufacturer and assumed to be constant. Thus, the dc analysis is not carried out when analyzing the transistor circuits by using h-model.
Analysis of a CE amplifier: Figure 6.7shows the basic CE amplifier where no biasing circuit is included for simplicity. We have to determine:
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The resistance Rs in this figure is the internal resistance of the signal source Vs. Note that Vs and Rs represent the actual signal source or the Thevenin's equivalent of another circuit that feeds the common emitter amplifier. The output signal Vs is taken at the collector. In practical circuits, a load resistor RL shown dashed in Fig. 6.7 may be connected to the output terminals through the coupling capacitor C2. This load resistor RL will be in parallel to resistance RC and thus can be considered as a part of RC.
Fig. 6.7 The basic CE amplifier.
The ac equivalent circuit is obtained by replacing the transistor in Fig. 6.7 by its h-model, replacing capacitors C1and C2 and dc supply VCC by short circuits as shown in Fig. 6.8. All the voltages and currents shown are rms values of ac signals.
Fig. 6.8 AC equivalent circuit of the CE amplifier of Fig. 6.7
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Current gain AI
We first compute the current gain AI, given by the ratio of output load current and input current, as:
A I=I 0
I b=−I cI b
From the output circuit in Fig. 6.18, we may write
So I o=−(h fe I b+hoeR c I o)
Solving for AI, gives A I=I oI b=
−hfe1+hoeR c
Input resistance Ri:
The resistance seen looking into the input terminals or the base gives the input resistance of the amplifier, that is,
Ri=V b
I b
From the input circuit in Fig. 6.8
V b=hie Ib+hℜV ce
V ce=R c I o=A IRc I b
Putting values of Vce, we obtain
V b=hie Ib+hℜ A I Rc I b
Ri=V b
I b=h ie+hℜ A I Rc
Voltage gain, Av, and Avs
The voltage gain of an amplifier can be defined with or without source resistance Rs, taken into account. Thus,
AV=V o
V b
AVs=V o
V s
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In Fig. 6.8,
V o=Rc I o
and V b=R i I b
Therefore,
AV=V o
V b=Rc I oR i I b
=A I
I oIb
The overall voltage gain Avs is given by
AVs=V o
V s=V o
V b.V b
V s
The ratio Vb/Vs is obtain from the equivalent input circuit of the amplifier shown in Fig. 6.9.
Fig. 6.9 Equivalent input circuit for computing Vb/Vs
Using voltage divider rule, we get
V b
V s=
Rf
R s+Ri
Thus,
AVs=AV
R f
R s+R i
The overall voltage gain Avs, is of more importance and is usually much less than Av, on account of appreciable voltage drop of input signal across the source resistance Rs. For example, if Rs = Ri then
AVs=0.5 AV
It can be seen that half of the input signal voltage is lost as voltage drop across the source resistance Rs.
Current gain AIs
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If the input signal is a current source Is with resistance Rs which is the Norton’s equivalent of the voltage source as shown in Fig. 6.10 then the overall current gain AIs is given by
Fig. 6.10 Norton’s equivalent of voltage source
A Is=I oI s=¿
I oI b.I bI s
Using current divider rule in Fig. 6.10
I bI s=
R f
Rs+Ri IVs=A I
R f
Rs+Ri
Output resistances Ro and Ro’
The resistances Ro and Ro’ are the resistances seen at the output terminals of an amplifer without and with load RC taken into account, respectively. The output resistance Ro = If 1/Yo is determined by setting the input signal Vs = 0 (but taking Rs into account) and load resistance Rc = ∞ in Fig. 6.8. The resulting circuit shown in Fig. 6.11 is now driven by an external voltage source V2, and current I2 drawn by the circuit is determined so as to compute output resistance Ro.
Fig. 6.11 Equivalent circuit for computing Ro.
In Fig. 6.11 with Vs = 0, KVL for the input loop gives
R s I b+hie I b+hℜV 2=0(sinceV ce=V 2)
Simplifying
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I b=−hℜV 2
R s+hie
From the output circuit, we may write
I 2=h fe I b+hoeV 2¿
Putting the value of Ib, we get
Y o=hoe=−hfeV ℜ
Rs+hℜ
In this derivation, we have not taken load resistance RL into account. If RC is included then the output resistance Ro’ is given as:
Ro' =Rc∨¿ RL
All the formulas derived for a CE amplifier are summarized in Table 6.3.
The analysis above has been done for a CE amplifier. In a similar manner, one can perform the analysis for a CC or CB amplifier by using the h-model valid for the configuration. It can be seen that all the formulae given in Table 6.3 are valid for a CC or CB amplifier only if we change the subscript e to c for CC and e to b for CB, respectively for all the h-parameters used.
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