Xilinx 1998 Data Book (4/98) - University of WashingtonChapter 1 is a general overview of the Xilinx product line, and is recommended reading for designers who are new to the ﬁeld

TheProgrammableLogicData BookApril 1998

, XILINX, XACT, XC2064, XC3090, XC4005,XC-DS501, FPGA Architect, FPGA Foundry, NeoCAD,NeoCAD EPIC, NeoCAD PRISM, NeoROUTE, Plus Logic,Plustran, P+, Timing Wizard, and TRACE are registeredtrademarks of Xilinx, Inc.

, all XC-prefix product designations, XACTstep, XACT-step Advanced, XACTstep Foundry, XACT-Floorplanner,XACT-Performance, XAPP, XAM, X-BLOX, X-BLOX plus,XChecker, XDM, XDS, XEPLD, XPP, XSI, FoundationSeries, BITA, Configurable Logic Cell, CLC, Dual Block,FastCLK, FastCONNECT, FastFLASH, FastMap, Hard-Wire, LCA, Logic Cell, LogiCore, LogicProfessor, MicroVia,PLUSASM, PowerGuide, PowerMaze, Select-RAM,SMARTswitch, TrueMap, UIM, VectorMaze, VersaBlock,VersaRing, Spartan, Spartan-XL and ZERO+ are trade-marks of Xilinx, Inc.

The Programmable Logic Company and The Programma-ble Gate Array Company are service marks of Xilinx, Inc.

All other trademarks are the property of their respectiveowners.

Xilinx does not assume any liability arising out of the appli-cation or use of any product described or shown herein; nordoes it convey any license under its patents, copyrights, ormaskwork rights or any rights of others. Xilinx reserves theright to make changes, at any time, in order to improve reli-ability, function or design and to supply the best productpossible. Xilinx will not assume responsibility for the use ofany circuitry described herein other than circuitry entirelyembodied in its products. Xilinx devices and products areprotected under one or more of the following U.S. Patents:4,642,487; 4,695,740; 4,706,216; 4,713,557; 4,746,822;

4,750,155; 4,758,985; 4,820,937; 4,821,233; 4,835,418;4,853,626; 4,855,619; 4,855,669; 4,902,910; 4,940,909;4,967,107; 5,012,135; 5,023,606; 5,028,821; 5,047,710;5,068,603; 5,140,193; 5,148,390; 5,155,432; 5,166,858;5,224,056; 5,243,238; 5,245,277; 5,267,187; 5,291,079;5,295,090; 5,302,866; 5,319,252; 5,319,254; 5,321,704;5,329,174; 5,329,181; 5,331,220; 5,331,226; 5,332,929;5,337,255; 5,343,406; 5,349,248; 5,349,249; 5,349,250;5,349,691; 5,357,153; 5,360,747; 5,361,229; 5,362,999;5,365,125; 5,367,207; 5,386,154; 5,394,104; 5,399,924;5,399,925; 5,410,189; 5,410,194; 5,414,377; 5,422,833;5,426,378; 5,426,379; 5,430,687; 5,432,719; 5,448,181;5,448,493; 5,450,021; 5,450,022; 5,453,706; 5,466,117;5,469,003; 5,475,253; 5,477,414; 5,481,206; 5,483,478;5,486,707; 5,486,776; 5,488,316; 5,489,858; 5,489,866;5,491,353; 5,495,196; 5,498,979; 5,498,989; 5,499,192;5,500,608; 5,500,609; 5,502,000; 5,502,440; RE 34,363,RE 34,444, and RE 34,808. Other U.S. and foreign patentspending. Xilinx, Inc. does not represent that devices shownor products described herein are free from patent infringe-ment or from any other third party right. Xilinx assumes noobligation to correct any errors contained herein or toadvise any user of this text of any correction if such bemade. Xilinx will not assume any liability for the accuracy orcorrectness of any engineering or software support orassistance provided to a user.

Xilinx products are not intended for use in life support appli-ances, devices, or systems. Use of a Xilinx product in suchapplications without the written consent of the appropriateXilinx officer is prohibited.

Copyright 1998 Xilinx, Inc. All Rights Reserved.

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The Programmable LogicData Book

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On behalf of the employees of Xilinx, our sales representatives, our distributors, and ourmanufacturing partners, welcome to our 1998 Data Book, and thank you for your interest inXilinx products and services.

As the inventor of Field Programmable Gate Array technology and the world’s leadingsupplier of programmable logic, we would like to pledge our continuing commitment toproviding you, our users, with the best possible integrated circuit components, developmentsystems, and technical and sales support.

Over the past year, we have substantially enhanced our product line with the introduction ofthe XC4000XL, XC4000XV, and Spartan series of FPGAs, as well as XH3 FpgASICHardwire technology. We have continued to enhance our leading-edge products with newspeed grades and improved pricing. The Alliance and Foundation series products have seta new standard for functionality and ease-of-use in programmable logic developmentsystems. You can expect this pace of innovation to continue, and even increase, as wemaintain our leadership role in bringing leading-edge programmable logic solutions to themarket.

We look forward to satisfying all of your programmable logic needs.

Sincerely,

Wim Roelandts

Chief ExecutiveOfficer

1 Int roduction

2 Development System P roducts and CORE Solutions P roducts

3 CPLD Products

4 FPGA Products

5 SPROM Products

6 3V Products

7 HardWire FpgASIC P roducts

8 High-Reliability and QML Milita ry Products

9 Programming Suppo rt

10 Packages and Thermal Characteristics

11 Testing, Qualit y, and Reliability

12 Technical Suppo rt and Se rvices

13 Product Technical In formation

14 Index

Section Titles

Introduction

An Introduction to Xilinx Products . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1

Development System Products and CORE Solutions Products

Development Systems: Products Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1

Development Systems: Product Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3

CORE Solutions Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-13

CPLD Products

XC9500 Series Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1

XC9500 In-System Programmable CPLD Family. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-5

XC9536 In-System Programmable CPLD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-21


XC95108 In-System Programmable CPLD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-37




FPGA Products

XC4000E and XC4000X Series Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-1

XC4000E and XC4000X Series Field Programmable Gate Arrays . . . . . . . . . . . . . . . . . . 4-5

XC4000XV Family Field Programmable Gate Arrays . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-155

XC4000XLT Family Field Programmable Gate Arrays . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-175

Spartan and Spartan-XL Families Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-187

Spartan and Spartan-XL Families Field Programmable Gate Arrays . . . . . . . . . . . . . . . 4-189


XC5200 Series Field Programmable Gate Arrays . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-247

Table of Contents

XC3000 Series Table of Content s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-319

XC3000 Series Field Programmable Gate Arrays (XC3000A/L, XC3100A/L ). . . . . . . . . . 4-321

SPROM Products

XC1701L (3.3V), XC1701 (5.0V) and XC17512L (3.3V) Serial Configuration PROMs . . . 5-1

XC1700E Family of Serial Configuration PROMs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-11

Spartan and Spartan-XL Families of Serial Configuration PROM s . . . . . . . . . . . . . . . . . 5-23

3V Products

3.3 V and Mixed Voltage Compatible Product s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-1

HardWire FpgASIC Products

Xilinx HardWire™ FpgASIC Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-1

High-Reliability and QML Military Products

High-Reliability and QML Military Product s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-1

XC4000X Series High-Reliability Field Programmable Gate Arrays . . . . . . . . . . . . . . . . 8-7

XC4000E High-Reliability Series Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-9

XC4000E High-Reliability Field Programmable Gate Arrays . . . . . . . . . . . . . . . . . . . . . . 8-11

Programming Support

HW-130 Programmer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 -1

Packages and Thermal Characteristics

Packages and Thermal Characteristic s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-1

Package Drawings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-21

Testing, Quality, and Reliability

Quality Assurance and Reliability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-1

Technical Support and Services

Technical Support And Services . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12-1

Product Technical Information

XC3000, XC4000, and XC5200: A Technical Overview for the First-Time User . . . . . . . 13-5

Choosing a Xilinx Product Family . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13-7

I/O Characteristics of the ‘XL FPGAs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13-13

XC4000 Series Technical Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13-15

XC3000 Series Technical Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13-19

FPGA Configuration Guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13-31

Configuring Mixed FPGA Daisy Chains . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13-39

Configuration Issues: Power-up, Volatility, Security, Battery Back-up . . . . . . . . . . . . . 13-41

Dynamic Reconfiguration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13- 45

Metastable Recovery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13-47

Set-up and Hold Times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3-50

Overshoot and Undershoot. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13-51

Boundary Scan in XC4000 and XC5200 Series Devices . . . . . . . . . . . . . . . . . . . . . . . . . . 13-52

Index

Book Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14-1

1 Int roduction


3 CPLD Products

4 FPGA Products

5 SPROM Products

6 3V Products








14 Index

Int roduction

An Introduction to Xilinx ProductsAbout this Book . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1

Data Sheet Categories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1Data Book Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1

About the Company . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2Product Line Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2

Programmable Logic vs. Gate Arrays . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3Faster Design and Verification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3Design Changes without Penalty . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3Shortest Time-to-Market . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3

Component Products . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3Field Programmable Gate Arrays (FPGAs) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4Complex Programmable Logic Devices (CPLDs) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4HardWire devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4Serial PROMs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4High-Reliability Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-5

Development System Products. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-5Technical Support and Service . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-5XC3000 Series Product Selection Matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-6XC4000 Series Product Selection Matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-6Spartan Series Product Selection Matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-7XC5200 Series Product Selection Matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-7XC9500 Series Product Selection Matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-8

Introduction Table of Contents

About this BookThis Data Book provides a “snapshot in time” in its listing ofIC devices and development system software availablefrom Xilinx as of late 1997. New devices, speed grades,package types and development system products are con-tinually being added to the Xilinx product portfolio. Usersare encouraged to contact their local Xilinx sales represen-tative and consult the WebLINX World Wide Web site andthe quarterly XCELL newsletter for the latest informationregarding new product availability.

This book covers the current XC4000E/EX/XL, XC4000XV,XC4000XLT, Spartan, XC5200, XC3000A/L, XC3100A/L,XC9500, XC1700D/L and XC1701L.

The product specifications for several older Xilinx FPGAfamilies are not included in this Data Book. This does notimply that these products are no longer available. However,for new designs, users are encouraged to use the newerproducts described in this book, which offer better perfor-mance at lower cost than the older technologies. Productspecifications for the older products are available atWebLINX, the Xilinx site on the World Wide Web, orthrough your local Xilinx sales representative.

Data Sheet CategoriesIn order to provide the most up-to-date information, somecomponent products included in this book may not havebeen fully characterized at the time of publication. In thesecases, the AC and DC characteristics included in the datasheets will be marked as Advance or Preliminary informa-tion. (Not withstanding the definitions of such terms, allspecifications are subject to change without notice.) Thesedesignations have the following meaning:

• Advance — Initial estimates based on simulationand/or extrapolation from other speed grades, devices,or device families. Use as estimates, but not for finalproduction.

• Preliminary — Based on preliminary characterization.Changes are possible, but not expected.

• Final (unmarked) — Specifications not identified aseither Advance or Preliminary are to be consideredfinal.

Data Book ContentsChapter 1 is a general overview of the Xilinx product line,and is recommended reading for designers who are new tothe field of high-density programmable logic.

Chapter 2 contains a discussion of the overall designmethodology when using Xilinx programmable logic anddescriptions of Xilinx development system products. Thischapter is placed at the beginning of the book since thesedevelopment tools are needed to design with any of the Xil-inx programmable logic devices.

Chapter 3 contains the product descriptions for the XilinxComplex Programmable Logic Device (CPLD) products,including the XC9000 series.

Chapter 4 includes the product descriptions for the Xilinxstatic-memory-based Field Programmable Gate Array(FPGA) products, including the XC3000, XC4000, XC5000,and Spartan series.

Chapter 5 holds the product descriptions for the XC1701Land XC1700D families of Serial PROM devices. TheseSerial PROMs provide a convenient, low-cost means ofstoring configuration programs for the SRAM-basedFPGAs described in Chapter 4.

Chapter 6 is an overview of Xilinx components appropriatefor 3.3 V and mixed-voltage systems. This chapter will referyou back to the appropriate product descriptions in the ear-lier chapters.

Chapter 7 contains a brief overview of the HardWire prod-uct line. Detailed product specifications are available inseparate Xilinx data sheets.

Chapter 8 is an overview of Xilinx High-Reliability/Militaryproducts. Detailed product specifications are available inseparate Xilinx data sheets.

Chapter 9 describes the HW130 device programmer forthe XC170X series of Serial PROMs and the XC9500series of CPLDs.

Chapter 10 contains a description of all the physical pack-ages for the various IC products, including informationabout the thermal characteristics of those packages.

Chapter 11 discusses the testing, quality, and reliability ofXilinx component products.

Chapter 12 includes a listing of all the technical supportfacilities provided by Xilinx.

Chapter 13 contains additional information about Xilinxcomponents that is not provided in the product specifica-tions of the earlier chapters. This includes some additionalelectrical parameters that are not in the product specifica-tions because they are not part of the manufacturing testprogram for the particular device, but may be of interest tothe user. Also included in this chapter is a discussion of the

1

An Introduction to Xilinx Products

November 10, 1997 1 1*

November 10, 1997 1-1


JTAG boundary test scan logic found in several Xilinx com-ponent families.

The final two sections contain an index to the topicsincluded in this Data Book and a listing of Xilinx salesoffices, sales representatives, and distributors.

About the CompanyXilinx, Inc., offers the industry’s broadest selection of pro-grammable logic devices. With 1997 revenues of over $560million, Xilinx is the world’s largest supplier of programma-ble logic, and the market leader in Field ProgrammableGate Arrays (FPGAs).

Xilinx was founded in 1984, based on the revolutionary ideaof combining the logic density and versatility of gate arrayswith the time-to-market advantages and convenience ofuser-programmable standard parts. One year later, Xilinxintroduced the world’s first Field Programmable Gate Array.Since then, through a combination of architectural andmanufacturing process improvements, the company hascontinually increased device performance, in terms ofcapacity, speed, and ease-of-use, while lowering costs.

In 1992, Xilinx expanded its product line to includeadvanced Complex Programmable Logic Devices(CPLDs). For the user, CPLDs are an attractive comple-ment to FPGAs, offering simpler design software and morepredictable timing.

As the market leader in one of the fastest growing seg-ments of the semiconductor industry, Xilinx strategy is tofocus its resources on creating new ICs and developmentsystem software, providing world-class technical support,developing markets, and building a diverse customer baseacross a broad range of geographic and end-use applica-tion segments. The company has avoided the large capitalcommitment and overhead burden associated with soleownership and operation of a wafer fabrication facility.Instead, Xilinx has established alliances with severalhigh-volume, state-of-the-art CMOS IC manufacturers.Using standard, high-volume processes assures low man-ufacturing costs, produces programmable logic deviceswith well-established reliability, and provides for earlyaccess to advances in CMOS processing technology.

Xilinx headquarters are located in San Jose, California.The company markets its products worldwide through anetwork of direct sales offices, manufacturers’ representa-tives, and distributors (as listed in the back of this book).The company has representatives and distributors in over38 countries.

Product Line OverviewField Programmable Gate Arrays (FPGAs) and ComplexProgrammable Logic Devices (CPLDs) can be used in vir-tually any digital logic system. Over 50 million Xilinx compo-nents have been used in a wide variety of end-equipmentapplications, ranging from supercomputers to hand-held

1-2 November 10, 1997

instruments, from central office switches to centrifuges, andfrom missile guidance systems to guitar synthesizers.

Xilinx achieved its leading position through a continuingcommitment to provide a complete product solution. Thisencompasses a focus on all three critical areas of thehigh-density programmable solution “triangle”: components(silicon), software, and service (Figure 2).

Programmable Logic vs. Gate ArraysXilinx programmable logic devices provide the benefits ofhigh integration levels without the risks or expenses ofsemi-custom and custom IC development. Some of thebenefits of programmable logic versus mask-programmedgate arrays are briefly discussed below.

Faster Design and Verification

Xilinx FPGAs and CPLDs can be designed and verifiedquickly while the same process requires several weeks withgate arrays. There are no non-recurring engineering (NRE)costs, no test vectors to generate, and no delay while wait-ing for prototypes to be manufactured.

Design Changes without Penalty

Because the devices are software-configured anduser-programmed, modifications are much less risky andcan be made anytime - in a manner of minutes or hours, asopposed to the weeks it would take with a gate array. Thisresults in significant cost savings in design and production.

Shortest Time-to-Market

When designing with Xilinx programmable logic,time-to-market is measured in days or a few weeks, not themonths often required when using gate arrays. A study bymarket research firm McKinsey & Co. concluded that asix-month delay in getting to market can cost a product

one-third of its lifetime potential profit. With mask-pro-grammed gate arrays, design iterations can easily add thatmuch time, and more, to a product schedule.

Once the decision has been made to use Xilinx program-mable logic, a choice must be made from a number of prod-uct families, device options, and product types. Theinformation in the product selection matrices that follow canhelp guide that selection; detailed product specificationsare available in subsequent chapters of this book. Sincemany component products are available in common pack-ages with common footprints, designs often can bemigrated to higher or lower density devices, or even acrosssome product families, without any printed circuit boardchanges. Design ideas, represented in text or schematicformat, are converted into a configuration data file for anFPGA or CPLD device using the Xilinx XACTstep develop-ment software running on a PC or workstation.

Component ProductsXilinx offers the broadest line of programmable logicdevices available today, with hundreds of products featur-ing various combinations of architectures, logic densities,package types, and speed grades in commercial, industrial,and military grades. This breadth of product offeringsallows the selection of the programmable logic device thatis best suited for the target application.

Xilinx programmable logic offerings include several familiesof reprogrammable FPGAs and FLASH-memory-basedCPLDs (Figure 3). HardWire devices are mask-pro-grammed versions of the reprogrammable FPGAs, andprovide a transparent, no-risk migration path to lower-costdevices for high-volume, stable designs. Additionally, afamily of Serial PROM devices is available to store configu-ration programs for the reprogrammable FPGA devices.Many devices are available in military temperature range

• Optimized circuits/architectures

• Global world class sales/distribution support

• Global world class technical support: FAEs/support center/on-line/internet

• Global world class manufacturing: quality/capacity/delivery

• Powerful but easy

• Integrated across families

• Seamless integration into customer CAE system

• Highest performance/densities

• Deep submicron processes

• Unmatched quality and reliability

SO

FT

WA

RES

ILIC

ON

S E RV I C E

X5955

Figure 2: The Xilinx Programmable Solution Triangle

November 10, 1997 1-3


and/or MIL-STD-883B versions, for high-reliability and mili-tary applications.

Field Programmable Gate Arrays (FPGAs)

FPGA devices feature a gate-array-like architecture, with amatrix of logic cells surrounded by a periphery of I/O cells,as diagrammed in Figure 4. Segments of metal intercon-nect can be linked in an arbitrary manner by programmableswitches to form the desired signal nets between the cells.

FPGAs combine an abundance of logic gates, registers,and I/Os with fast system speed. Xilinx offers several fami-lies of reprogrammable, static-memory-based(SRAM-based) FPGAs, including the XC3000, XC4000,XC5000, and XC6000 series.

Complex Programmable Logic Devices (CPLDs)

Designers more comfortable with the speed, design sim-plicity, and predictability of PALs may prefer CPLD devices.Conceptually, CPLDs consist of multiple PAL-like functionblocks that can be interconnected through a switch matrix(Figure 5). The XC9000 CPLD series features 5V in-sys-tem programmable FLASH technology, and, like most ofthe FPGA families, includes built-in JTAG boundary scantest logic.

HardWire devices

HardWire devices are masked-programmed versions of theSRAM-based FPGAs. The HardWire products provide aneasy, transparent migration path to a cost-reduced devicewithout the engineering burden associated with conven-tional gate array re-design. The HardWire gate array isarchitecturally identical to its FPGA counterpart, but theprogrammable elements in the FPGA are replaced withfixed metal connections. The resulting die is considerablysmaller, with a correspondingly lower cost. Using propri-etary automatic test vector generation software and pat-ented test logic, Xilinx guarantees over 95% fault coverage,while eliminating the need for user-generated test vectors.The mask and test programs are generated automaticallyby Xilinx from the user’s existing FPGA design file.

Serial PROMs

The XC1700 family features one-time programmable serialPROMs ranging in density from about 18,000 bits to over260,000 bits. These serial PROMs are an easy-to-use,cost-effective method for storing configuration data for theSRAM-based FPGAs.

XilinxProduct Line

CPLDISP

PAL ArchitectureMedium Density

Simple Tools

Gate ArraysCustom

Highest DensityASIC Tools

FPGAProgrammable

Gate ArrayArchitectureHigh DensityASIC Tools

HardWire™CustomTransparent Conversion100% Tested

ASIC Alternatives

X5957

PAL DevicesProgrammable AND/OR ArchitectureLow DensitySimple Tools

Figure 3: Application-Specific IC Products

PROGRAMMABLEINTERCONNECT

LOGIC BLOCKS

I/O BLOCKS

X1153

Figure 4: FPGA Architecture

1-4 November 10, 1997

,

High-Reliability Devices

Xilinx was the first company to offer high-reliability FPGAsby introducing MIL-STD-883B qualified XC2000 andXC3000 series devices in 1989. MIL-STD-883B membersof the XC4000 FPGA series are currently available, andqualified versions of additional Xilinx families are in devel-opment. The product line also includes Standard Microcir-cuit Drawing (SMD) versions of several families. SomeXilinx devices are available in tested die form througharrangements with manufacturing partners.

Development System ProductsXilinx offers a complete software environment for the imple-mentation of logic designs in Xilinx programmable logicdevices. This environment combines powerful technologywith a flexible, easy-to-use graphical interface to help usersachieve the best possible designs, regardless of experi-ence level. The user has a wide range of choices betweena fully-automatic implementation and detailed involvementin the layout process. The development system provides allthe implementation tools required to design with Xilinx logicdevices, including the following:

• libraries and interfaces for popular schematic editors,logic synthesis tools, and simulators

• design manager/flow engine• module generator• map, place, and route compilation software• static timing analyzer• hardware debugger

Xilinx is committed to an “open system” approach tofront-end design creation, synthesis, and verification. Xilinxdevices are supported by the broadest number of EDA ven-dors and synthesis vendors in the industry. Supported plat-

forms include the ubiquitous PC and several popularworkstations.

Technical Support and ServiceProviding global, world-class manufacturing, technical sup-port, and sales/distribution support is an essential founda-tion of the Xilinx product strategy. Xilinx manufacturingfacilities have earned ISO9002 certification, and Xilinxquality and reliability achievements are among the world’sbest - not just for programmable logic suppliers, but amongall semiconductor companies. Comprehensive technicalsupport facilities include training courses, extensive prod-uct documentation and application notes, a quarterly tech-nical newsletter, the WebLINX World Wide Web site,technical support hotlines, and a cadre of Field ApplicationEngineers. Sales support is provided by a worldwide net-work of representatives and distributors.

X5956

FB FB

FB

FB

FB

FB

FB

FB

I/O I/OInterconnectMatrix

Figure 5: CPLD Architecture

November 10, 1997 1-5


XC3000 Series Product Selection MatrixD

EV

ICE

S

XC3000 Series

XC

3020

A/L

XC

3030

A/L

XC

3042

A/L

XC

3064

A/L

XC

3090

A/L

XC

3120

A

XC

3130

A

XC

3142

A

XC

3164

A

XC

3190

A

XC

3195

A

XC

3142

L

XC

3190

L

KE

YF

EA

TU

RE

S

Low Cost/Low Power High Performance

Low Voltage(3.3 V)High

Performance

DE

NS

ITY

Max Logic Gates (K) 1.5 2 3 4.5 6 1.5 2 3 4.5 6 7.5 3 6

Max RAM Bits N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A

Typical Gate Range (K) 1-1.5 1.5-2 2-3 3.5-4.5 5-6 1-1.5 1.5-2 2-3 3.5-4.5 5-6 6.5-7.5 2-3 5-6

CLBs 64 100 144 224 320 64 100 144 224 320 484 144 320

Flip-Flops 256 360 480 688 928 256 360 480 688 928 1320 480 928

FE

AT

UR

ES Output Drive (mA) 4 4 4 4 4 8 8 8 8 8 8 4 4

JTAG (IEEE 1149.1) N N N N N N N N N N N N N

Dedicated Arithmetic N N N N N N N N N N N N N

Quiescent Current (mA) 0.5/0.02 0.5/0.02 0.5/0.02 0.5/0.02 0.5/0.02 8 8 8 8 8 8 1.5 1.5

Fastest Speed Grade -6/-8 -6/-8 -6/-8 -6/-8 -6/-8 -09 -09 -09 -09 -09 -09 -2 -2

XC4000 Series Product Selection Matrix

DE

VIC

ES

XC4000 Series

XC

4003

E

XC

4005

E/X

L

XC

4006

E

XC

4008

E

XC

4010

E/X

L

XC

4013

E/X

L

XC

4020

E/X

L

XC

4025

E

XC

4028

EX

/XL

XC

4036

EX

/XL

XC

4044

XL

XC

4052

XL

XC

4062

XL

XC

4085

XL

KE

YF

EA

TU

RE

S

High DensityHigh Performance

Select-RAM™ Memory

DE

NS

ITY

System Gate Range* (Logic and RAM) (K) 2-5 3-9 4-12 6-15 7-20 10-30 13-40 15-45 18-50 22-65 27-80 33-100 40-130 55-180

Logic Cells 238 466 608 770 950 1368 1862 2432 2432 3078 3800 4598 5472 7448

Max Logic Gates, (no RAM) (K) 3 5 6 8 10 13 20 25 28 36 44 52 62 85

Max RAM Bits (no Logic) 3200 6272 8192 10368 12800 18432 25088 32768 32768 41472 51200 61952 73728 100352

CLBs 100 196 256 324 400 576 784 1024 1024 1296 1600 1936 2304 3136

Flip-Flops 360 616 768 936 1120 1536 2016 2560 2560 3168 3840 4576 5376 7168

FE

AT

UR

ES Output Drive (mA) 12 12 12 12 12 12 12 12 12 12 12 12 12 12

JTAG (IEEE 1149.1) Y Y Y Y Y Y Y Y Y Y Y Y Y Y

Dedicated Arithmetic Y Y Y Y Y Y Y Y Y Y Y Y Y Y

Quiescent Current (mA) 10 10 10 10 10 10 10 10 10 10 10 10 10 10

Fastest Speed Grade -1 -09 -1 -1 -09 -09 -09 -1 -09 -09 -09 -09 -09 -09

*Maximum System gates assume 20% of CLBs used as RAM

1-6 November 10, 1997

Spartan Series Product Selection Matrix

DE

VIC

ES

Spartan SeriesXCS05

XCS05-XLXCS10

XCS10-XLXCS20

XCS20-XLXCS30

XCS30-XLXCS40

XCS40-XL

KE

YF

EA

TU

RE

S High DensityHigh Performance

Select-RAM™ MemoryLow Cost

DE

NS

ITY

System Gate Range* (Logic and RAM) (K) 2-5 3-10 7-20 10-30 13-40

Logic Cells 238 466 950 1368 1862

Max Logic Gates, (no RAM) (K) 3 5 10 13 20

Max RAM Bits (no Logic) 3200 6272 12800 18432 25088

CLBs 100 196 400 576 784

Flip-Flops 360 616 1120 1536 2016

FE

AT

UR

ES

Output Drive (mA) 12 12 12 12 12

JTAG (IEEE 1149.1) Y Y Y Y Y

Dedicated Arithmetic Y Y Y Y Y

Quiescent Current (mA) 3 3 3 3 3

Fastest Speed Grade -4 -4 -4 -4 -4

*Maximum System gates assume 20% of CLBs used as RAM

XC5200 Series Product Selection Matrix

DE

VIC

ES

XC5200 Series XC5202 XC5204 XC5206 XC5210 XC5215

KE

YF

EA

TU

RE

S

High DensityLow Cost

DE

NS

ITY

Max Logic Gates (K) 3 6 10 16 23Max RAM Bits N/A N/A N/A N/A N/ATypical Gate Range (K) 2-3 4-6 6-10 10-16 15-23CLBs/Logic Cells 64 120 196 324 484Flip-Flops 256 480 784 1296 1936

FE

AT

UR

ES Output Drive (mA) 8 8 8 8 8

JTAG (IEEE 1149.1) Y Y Y Y YDedicated Arithmetic Y Y Y Y YQuiescent Current (mA) 15 15 15 15 15Fastest Speed Grade -3 -3 -3 -3 -3

November 10, 1997 1-7


XC9500 Series Product Selection MatrixD

EV

ICE

S

CPLD Families XC9536 XC9572 XC95108 XC95144 XC95216 XC95288

KE

YF

EA

TU

RE

S JTAG5 V ISP

3 V or 5 V I/O

DE

NS

ITY Gates (K) 0.8 1.6 2.4 3.2 4.8 6.4

Macrocells 36 72 108 144 216 288Flip-Flops 36 72 108 144 216 288

FE

AT

UR

ES Output Drive (mA) 24 24 24 24 24 24

JTAG (IEEE 1149.1) Y Y Y Y Y YDedicated Arithmetic N N N N N NQuiescent Current (mA) – – 140 – – –Fastest Speed Grade -5 -7 -7 -7 -10 -10

1-8 November 10, 1997

fq

1 Int roduction


3 CPLD Products

4 FPGA Products

5 SPROM Products

6 3V Products








14 Index

Development System P roducts andCORE Solutions P roducts

Development System Products and CORE Solutions Products

Development Systems: Products OverviewIntroduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1Product Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1

Flexible Configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1Foundation Series. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1Alliance Series . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1Alliance Series Options. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2Xilinx M1 Software Technology. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2Increased Design Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2M1 Technical Benefits. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2

Development Systems:Product DescriptionsDevelopment Systems Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3Foundation Series: Foundation Base System (PC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4Foundation Series: Foundation Base-Express System with VHDL/Verilog Synthesis (PC) . . . . . . . . . . 2-5Foundation Series: Foundation Standard System (PC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-6Foundation Series: Foundation Express System (PC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-7Alliance Series: Alliance Base (PC or Workstation) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-8Alliance Series: Alliance Standard (PC or Workstation) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-10Alliance Series Options (PC). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-12

CORE Solutions OverviewBackground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-13CORE Solutions Products. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-13CORE Solutions Data Book . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-13

Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-13LogiCORE Products . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-13

Xilinx CORE Generator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-14Xilinx PCI Solutions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-14Xilinx DSP Solutions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-14Acquiring LogiCORE Products . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-14

AllianceCORE Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-14AllianceCORE Criteria . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-15Acquiring AllianceCORE Products . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-15

Development System ProductsTable of Contents

IntroductionLeading-edge silicon products, state-of-the art softwaresolutions and world-class technical support make up thetotal solution delivered by Xilinx. The software componentof this solution is critical to the success of every designproject. Xilinx Software Solutions provide powerful toolswhich make designing with programmable logic simple.Push button design flows, integrated on-line help, multime-dia tutorials, plus high performance automatic and auto-interactive tools, help designers achieve optimum results.And the industry’s broadest array of programmable logictechnology and EDA integration options deliver unparal-leled design flexibility.

Product OverviewXilinx Software Solutions are available in two different prod-uct series making it easy for designers to choose the rightsystem for their needs. These two series support the indus-try’s broadest array of programmable logic IC families. Thisallows users to standardize their design tools for all pro-grammable logic applications and use these tools to realizethe benefits of the industry’s highest performance and den-sity FPGAs and CPLDs. It also makes it easy to migratedesigns to new technologies and re-use existing designs innew applications.

The Xilinx Foundation Series provides designers with acomplete, ready-to-use solution for programmable logicdesign.

The Xilinx Alliance Series provides designers powerfulintegration of Xilinx design tools with their existing EDAenvironment.

Flexible ConfigurationsXilinx Software Solutions are available in two device config-urations giving designers a cost-effective way to matchtheir tools to the design methodologies they require. Theseconfigurations are available for both the Foundation andAlliance Series.

• Base configurations provide push button design flowsand support a broad array of FPGA and CPLD devicestargeted for low density and high volume applications.

• Standard configurations combine push button flows withpowerful auto-interactive tools. These tools givedesigners more influence and control overimplementation while maintaining the benefits of designautomation. Standard configurations include support for

all Xilinx programmable logic devices, featuring theindustry’s largest FPGA devices.

Foundation SeriesThe Xilinx Foundation Series provides everything requiredto design a programmable logic device in an easy-to-useenvironment. This fully integrated tool set allows users toaccess design entry, synthesis, implementation and simu-lation tools in a ready-to-use package. Every step in thedesign process is accomplished using graphical tool bars,icons and pop-up menus supported by interactive tutorialsand comprehensive on-line help.

The Xilinx Foundation Series features support for stan-dards based HDL design. All configurations support thepopular ABEL language, with integrated compilers opti-mized for each target architecture. HDL configurationsinclude integrated VHDL/Verilog synthesis from Synopsyswith tutorials and graphical HDL design entry tools to turnnew users into experts quickly and easily.

HDL Configurations

HDL configurations of the Foundation Series contain inte-grated VHDL/Verilog synthesis and graphical interactiveHDL entry tools with the following features:

• On-line tutorial teaches the art of VHDL design.• Xilinx HDL Editor provides color coding, syntax

checking and single click error navigation making iteasy to create and debug VHDL, Verilog and ABELdesigns.

• Graphical State Machine editor makes the design ofsimple or complex state machines simple and intuitive.

• HDL Language Assistant provides libraries of commonfunctions with optimized VHDL, Verilog and ABEL code.

• FPGA and CPLD specific synthesis and optimizationfrom Synopsys tools produce high-utilization, high-performance results

Alliance SeriesThe Alliance Series provides powerful and integrateddesign tools for users who require a quality solution for theirchosen EDA design solution. With the Alliance Series,users can choose from a wide range of design techniquesincluding schematic capture, module-based design andHDL design solutions. With standard based design inter-faces including EDIF, VITAL, VHDL, Verilog and SDF, thisseries provides maximum flexibility, portability, mixed ven-dor support, and design reuse.

1

Development Systems: ProductsOverview

March 24, 1998 (Version 2.0) 1 2* Product Overview

March 24, 1998 (Version 2.0) 2-1

Development Systems: Products Overview

Quality integration with leading EDA vendors such asALDEC, Exemplar, Cadence, Mentor Graphics, ModelTechnology, OrCAD, Synopsys, Synplicity, Veribest andVIEWlogic provide tightly-coupled environments that makeit easy to move through the design process and through amixed EDA vendor flow. The EDA vendors are supportedthrough the Xilinx Alliance Program, insuring high qualitytools and accuracy of results. Information on Xilinx AllianceProgram vendors can be found on the Xilinx WEB pagewww.xilinx.com.

The Alliance Series includes an enhanced set of easy-to-use features including, design manager, flow engine, instal-lation, on-line documentation, and answer database. Inaddition, the Alliance Series includes a powerful and com-plete implementation toolset, LogiBLOX (next generationmodule generation), fully integrated EDA vendor support,and a powerful gate-level optimizer. Also included are newadvanced place and route software that has incrementaldesign capabilities and SMARTspecs (a robust timing con-straint language). Users can achieve up to 25% perfor-mance improvements with no additional elapse timethrough the use of the Alliance Series Turns Engine. TheTurns Engine uses networked workstations to run multipleplace and route passes for a single design. This feature isincluded with the Alliance Series BASE and Standard work-station development systems. The libraries and interfaceprovide Xilinx Unified Library schematic symbols, HDL syn-thesis libraries, VITAL(VHDL) and Verilog simulation mod-els with timing information and translators through astandard netlist format. All of these tools provide a com-plete spectrum of high density design methodologies fromfully-automatic to hand-crafted and close integration withXilinx LogiCores and AllianceCore partners.

Alliance Series OptionsVIEWlogic Workview Office Development System optionsas part of the Alliance Series are intended for users whowant the integration of a complete solution with the powerto access board and system level design tools. These prod-ucts include VIEWlogic Workview Office schematic captureand simulation tools.

Xilinx M1 Software TechnologyM1 technology represents Xilinx’s next generation softwaretechnology. This advanced technology developed as aresult of the Xilinx merger with NeoCAD Inc., enables digi-tal system designers to increase design performance,leverage standards-based, high-level design methodolo-gies and quickly receive new software features and devicesupport through Xilinx Foundation Series and AllianceSeries software solutions.

Increased Design PerformanceThe M1 technology provides dramatically improved designperformance through advanced place-and-route software

which delivers push-button design flows and incrementaldesign capabilities. These Xilinx-exclusive capabilitiesleverage results from previous design iterations to reduceruntimes and shorter design iterations to less than ten min-utes. As engineers design complex circuits incrementally,this technology allows them to work in their preferred meth-odology.

M1 Technology also delivers advanced timing driven place-and route capabilities to deliver maximum design perfor-mance through push-button flows.

M1 Technical Benefits

Maximum Design Performance

M1 technology enables the user to achieve maximumdesign performance by providing a unique combination ofadvanced algorithms and interactive tools. Designer pro-ductivity is greatly enhanced through use of simple, push-button flows and optional auto-interactive tools. Customertesting has shown that M1 technology used withXC4000XL/XV devices results in 70 percent shorter runtimes, up to a 25 percent performance improvement, andthe ability to place and route devices with up to 100 percentutilization with a push-button flow.

Modular Software System

The modular architecture of the Xilinx M1 technologyallows rapid delivery of incremental technologies, new fea-tures, device support, and versions of its leading softwareproduct families. New feature sets can now be releasedindependently resulting in users’ ability to quickly completedesigns without having to re-learn new tools as enhance-ments are made. The investment Xilinx has made in the M1technology ensures that the continuous delivery of innova-tive device architectures and improved software solutionscan be done more rapidly, and predictably than previoussoftware versions.

Methodology Flexibility

High-level design methodologies are becoming the meth-odology choice for the design of complex programmablelogic. M1 technology delivers programmable logic specifichigh-level flows. The flows provide high-quality, high perfor-mance optimized results, and afford fast, flexible designchanges and iterations to match the way engineers design.Designers employ a mixture of graphical and language-based design entry methods while providing an easy-to-learn environment for Hardware Description Language(HDL) based design. Xilinx recognizes that design environ-ments are variant and, therefore, has created a flexible sys-tem enabling the customer to choose the best methodologyfor their environment or design challenge.

2-2 March 24, 1998 (Version 2.0)

Development Systems DescriptionsIt’s simple to order a Xilinx Development System. Justchoose a Foundation or Alliance Series and a few options.Give your local Xilinx Sales Office a call for informationabout our evaluation kits.

Foundation Series• Foundation Base System (PC)• Foundation Base-Express System (PC)• Foundation Standard System (PC)• Foundation Express System (PC)

Alliance Series• Alliance Base (PC or Workstation)• Alliance Standard (PC or Workstation)

Alliance Series Options• VIEWlogic Workview Office Standard Development

System Options (PC)

1

Development Systems:Product Descriptions

November 25, 1997 (Version 2.0) 1 2*

November 25, 1997 (Version 2.0) 2-3

Development Systems: Product Descriptions

Foundation Series: Foundation Base System (PC)

OverviewThe Foundation Series provides a complete, ready-to-usedesign system for the design of Xilinx programmable logicdevices. The Foundation Base System provides designentry (schematic and Abel HDL), simulation, and deviceimplementation tools for a broad array of FPGA and CPLDdevices targeted for low density and high volume applica-tions.

System Features• Project manager• Schematic editor• Integrated HDL editor with support for the Abel 6 HDL• Functional and timing simulator• EDIF, VHDL (VITAL compliant), and Verilog / SDF

design interfaces• Device implementation software for Xilinx CPLDs and

FPGAs• Comprehensive on-line help, on-line documentation,

and software tutorials• Software maintenance, including hotline support and

software updates

Device Support• CPLDs:

- XC9500• FPGAs:

- XC4000E/X Up to XC4010E/X- Spartan- XC3x00A/L- XC5200 Up to XC5210 FPGAs

Required Hardware Environment• Windows 95 and Windows NT 4.0 compatible PCs• Minimum memory requirements: 32 MB RAM, 32-64

MB Virtual Memory• CD-ROM drive

Package Features - Foundation BaseSystem

FeatureFNDBAS

FNDSTD

FNDBSX

FNDEXP

CPLD Devices √ √ √ √FPGA Devices √1 √ √1 √Libraries and Interface √ √ √ √Schematic Editor √ √ √ √HDL Editor √ √ √ √Graphical State Editor √ √ √ √ABEL 6 Entry / Synthesis √ √ √ √VHDL Entry / Synthesis √ √Verilog Entry / Synthesis √ √Schematic-centric Synthesis √ √ √ √HDL-centric Synthesis √Simulator √ √ √ √Device Implementation √ √ √ √Maintenance2 √ √ √ √11/12/97

Notes: 1. Spartan, XC3x00A/X, XC4000E/X up toXC4010E/X, and XC5200 up to XC5210.

2. A period of maintenance is included with newdesign system licenses, after which annualmaintenance contracts may be purchased.Contact your Xilinx sales representative for moreinformation.

2-4 November 25, 1997 (Version 2.0)

Foundation Series: Foundation Base-Express System with VHDL/VerilogSynthesis (PC)

OverviewThe Foundation Series provides a complete, ready-to-usedesign system for the design of Xilinx programmable logicdevices. The Foundation Express System incorporatesadvanced synthesis technology from Synopsys, and pro-vides design entry (schematic and HDL), VHDL and Verilogsynthesis, simulation, and device implementation tools for abroad array of FPGA and CPLD devices targeted for lowdensity and high volume applications.

System Features• Project manager• Schematic editor• Integrated HDL editor with support for VHDL, Verilog,

and Abel 6 HDL• VHDL and Verilog synthesis, including compilation and

optimization• Functional and timing simulator• EDIF, VHDL (VITAL compliant), and Verilog / SDF




software updates


- XC9500• FPGAs:


Required Hardware Environment• Windows 95 and Windows NT 4.0 compatible PCs• Minimum memory requirements: 32 MB RAM, 32-64

MB Virtual Memory• CD-ROM drive

Package Features - FoundationBase-Express System

FeatureFNDBAS

FNDSTD

FNDBSX

FNDEXP


Notes: 1. Spartan, XC3x00A/L, XC4000E/X up toXC4010E/X, and XC5200 up to XC5210.




Foundation Series: Foundation Standard System (PC)

OverviewThe Foundation Series provides a complete, ready-to-usedesign system for the design of Xilinx programmable logicdevices. The Foundation Standard System provides designentry (schematic and Abel HDL), simulation, and deviceimplementation tools for all Xilinx CPLDs and XilinxFPGAs.

System Features• Project manager• Schematic editor• Integrated HDL editor with support for the Abel 6 HDL• Functional and timing simulator• EDIF, VHDL (VITAL compliant), and Verilog / SDF




software updates


- XC9500• FPGAs:

- XC4000E/X- Spartan- XC3x00A/L- XC5200

Required Hardware Environment• Windows 95 and Windows NT 4.0 compatible PCs• Minimum memory requirements

- Small Devices (< 10K gates): 32 MB RAM, 32-64MB Virtual Memory

- Medium Devices (10K to 30K gates): 64 MB RAM,64-128 MB Virtual Memory

- Large Devices (> 30K gates): 128 MB RAM, 128-256MB Virtual Memory

• CD-ROM drive


FeatureFNDBAS

FNDSTD

FNDBSX

FNDEXP





Foundation Series: Foundation Express System (PC)

OverviewThe Foundation Series provides a complete, ready-to-usedesign system for the design of Xilinx programmable logicdevices. The Foundation Express System incorporatesadvanced synthesis technology from Synopsys, and pro-vides design entry (schematic and HDL), VHDL and Verilogsynthesis, simulation, and device implementation tools forall Xilinx CPLDs and Xilinx FPGAs.

System Features• Project manager• Schematic editor• Integrated HDL editor with support for VHDL, Verilog,

and Abel 6 HDL• VHDL and Verilog synthesis, including compilation and

optimization• Functional and timing simulator• EDIF, VHDL (VITAL compliant), and Verilog / SDF




software updates


- XC9500• FPGAs:


Required Hardware Environment• Windows 95 and Windows NT 4.0 compatible PCs• Minimum memory requirements

- Small Devices (< 10K gates): 32 MB RAM, 32-64MB Virtual Memory

- Medium Devices (10K to 30K gates): 64 MB RAM,64-128 MB Virtual Memory

- Large Devices (> 30K gates): 128 MB RAM, 128-256MB Virtual Memory

• CD-ROM drive


FeatureFNDBAS

FNDSTD

FNDBSX

FNDEXP






Alliance Series: Alliance Base (PC or Workstation)

OverviewNext generation FPGA/CPLD design solutions leveraging“Open Systems” integration with premier EDA partners fordevices up to 10,000 gates.

Base System Features:• EDA Libraries & Interfaces• Design Manager and Flow Engine• LogiBLOX Module Generator• Gate Optimizer• Complete HDL design methodology support• Incremental design capabilities• Place and route utilizing SMARTspecs• Re-entrant router• Multi-pass PAR• Timing Analyzer• Standard netlist and backannotation (EDIF, SDF, VITAL

VHDL and Verilog)• Xchecker Hardware Debugger (workstation only)

Package Includes:• Alliance Quick Start Guide• Alliance Release Document• Answer Database• Core Technology CD• CAE Libraries CD• On-line Documentation CD with DynaText browser• Hardware Cable• Demoboard

Device Support:• CPLDs:

- XC9500• FPGAs:


Libraries and Interfaces

Cadence• Concept schematic libraries and Verilog-XL simulation

models

Mentor• Falcon Framework schematic capture library and

ModelSim simulation models• Leonardo synthesis libraries and interfaces are

available from Mentor or Exemplar Logic

Synopsys• HDL Design Solutions (VHDL and Verilog)• Design Compiler, FPGA Compiler II, FPGA Express,

VSS• Vital Simulation models• DesignWare arithmetic modules* No libraries required to support FPGA Express

VIEWlogic• Workview Office schematic capture library and

functional and timing simulation interface

Exemplar• Leonardo and Galileo synthesis libraries and interfaces

are available from Exemplar Logic

Synplicity• Synplify synthesis libraries and interfaces are available

from Synplicity

Model Technology• ModelSim, V-System HDL simulation libraries and

interface

Contact your local EDA sales office to purchase these EDAtools.

Support and Updates Include:• Answers Database - http://www.xilinx.com or Answers

electronic book included.• Hotline Telephone Support• Apps FAX and E-Mail• Online Documentation• World Wide Web Access• Technical Newletter• Extensive Application Notes• Software Updates (for in-maintenance customers)

- A period of maintenance is included with new designsystem licenses, after which annual maintenancecontracts may be purchased. Contact your Xilinxsales representative for more information


Required Hardware Environment (PC)• Fully IBM compatible PC486/Pentium

- NEC98 supported• Windows 95, Windows NT 4.0

- Chinese, Korean and Japanese versions• Minimum 300 Mbytes hard-disk space• CD-ROM drive• VGA display• Serial port mouse• One parallel and two serial ports• 32 MB RAM (Use additional RAM to increase

performance)• 32 MB - 64 MB Virtual Memory

Required Hardware Environment(Workstation)• Ultra Sparc (or equivalent)

- Sun OS 4.1.3 and 4.1.4- Solaris 2.5

• HP715 (or equivalent)- HP-UX 10.2

• RS6000- AIX 4.1.5 (no GUIs)

• 64 MB RAM (Use additional to increase performance)• 64MB min Swap Space• Color Monitor



Alliance Series: Alliance Standard (PC or Workstation)

OverviewNext generation FPGA/CPLD design solutions leveraging“Open Systems” integration with premier EDA partners forunlimited gate capacity.

Base System Features:• EDA Libraries & Interfaces• Design Manager and Flow Engine• LogiBLOX Module Generator• Gate Optimizer• Full HDL design methodology support• Incremental design capabilities• Place and route utilizing SMARTspecs• Re-entrant router• Multi-pass PAR• Timing Analyzer• Standard netlist and backannotation (EDIF, SDF, VITAL

VHDL and Verilog)• Xchecker Hardware Debugger (workstation only)

Package Includes:• Alliance Quick Start Guide• Alliance Release Document• Answer Database• Core Technology CD• CAE Libraries CD• On-line Documentation CD with DynaText browser• Hardware Cable• Demoboard

Device Support:• CPLDs:

- XC9500• FPGAs:


Libraries and Interfaces

Cadence• Concept schematic libraries and Verilog-XL simulation

models

Mentor• Falcon Framework schematic capture library and

ModelSim simulation models• Leonardo synthesis libraries and interfaces are

available from Mentor or Exemplar Logic

Synopsys• HDL Design Solutions (VHDL and Verilog)• Design Compiler, FPGA Compiler II, FPGA Express,

VSS• Vital Simulation models• DesignWare arithmetic modules* No libraries required to support FPGA Express

VIEWlogic• Workview Office schematic capture library and

functional and timing simulation interface

Exemplar• Leonardo and Galileo synthesis libraries and interfaces

are available from Exemplar Logic

Synplicity• Synplify synthesis libraries and interfaces are available

from Synplicity

Model Technology• ModelSim, V-System HDL simulation libraries and

interface

Contact your local EDA sales office to purchase these EDAtools.


electronic book included.• Hotline Telephone Support• Apps FAX and E-Mail• Online Documentation• World Wide Web Access• Technical Newletter• Extensive Application Notes• Software Updates (for in-maintenance customers)

- A period of maintenance is included with new designsystem licenses, after which annual maintenancecontracts may be purchased. Contact your Xilinxsales representative for more information


Required Hardware Environment (PC)• Fully IBM compatible PC486/Pentium

- NEC98 supported• Windows 95, Windows NT 4.0

- Chinese, Korean and Japanese versions• Minimum 300 Mbytes hard-disk space• CD-ROM drive• VGA display• Serial port mouse• One parallel and two serial ports• Small Devices: (8K or ) XC4036XL - XC4062XL- 128K RAM (Use additional RAM to increase

performance)- 128 - 256 MB Virtual Memory

Required Hardware Environment(Workstation)• Ultra Sparc (or equivalent)

- Sun OS 4.1.3 and 4.1.4- Solaris 2.5

• HP715 (or equivalent)- HP-UX 10.2

• RS6000- AIX 4.1.5 (no GUIs)

• Small Devices: (28K or ) XC4036XL - XC4062XL- 128 MB RAM (Use additional RAM to increase

performance)- 128 MB min Swap Space

• Color Monitor



Alliance Series Options (PC)

OverviewVIEWlogic Workview Office schematic capture and gatesimulator development system with libraries and interfacesfor Xilinx FPGAs and CPLDs.

Workview Office Standard Features:• Workview Office schematic editor• Workview Office gate simulator• Libraries and interfaces• Hotline support• Software maintenance for 90-days

Libraries Support:• CPLDs:

- XC9500• FPGAs:



electronic book included.• Hotline Telephone Support• Apps FAX and E-Mail• Software Updates (for in-maintenance customers)• Online Documentation• World Wide Web Access• Technical Newletter• Extensive Application Notes

Required Hardware Environment:• Fully IBM compatible PC486/Pentium• Windows 95, Windows NT 4.0

- Chinese, Korean and Japanese versions• Minimum 500 Mbytes hard-disk space• CD-ROM drive• VGA display• Serial port mouse• One parallel and two serial ports• 64 Mbytes RAM recommended (increase to improve

performance)


BackgroundThe ASIC core industry has been developing for over adecade. Today there exists a wealth of intellectual property(IP) that is readily available from numerous sources. Duringthis time, however, programmable logic did not have thedensity or the performance needed to accommodate largeIP cores.

Today, things have changed considerably. Xilinx is shippingFPGAs like the XL family that have usable densities up to125,000 gates. Now, not only is the use of pre-defined logicfunctions in programmable logic a possibility, it is becominga requirement to meet ever-shrinking product developmentcycles.

As a result, many ASIC core vendors and system designersare beginning to look at using cores for their programmablelogic designs. It is for this reason that Xilinx created theCORE Solutions portfolio of products.

CORE Solutions ProductsCORE Solutions products support four application areas.The application areas are as follows:

• Standard Bus Interfaces - such as PCI, PCMCIA,USB and Plug-and-Play ISA.

• DSP Functions - These range from small buildingblocks such adders, registers and multipliers, to largersystem-level functions such as FIR filters and Reed-Solomon coders.

• Telecom and Networking - building blocks for popularcommunications standards.

• Base-Level Functions - a broad category of functionsused across many application segments. These includethe every small parameterizable LogiBLOX macros upthrough larger functions such as UARTs and DMAcontrollers.

CORE Solutions Data BookThe goal of the CORE Solutions portfolio of products is toprovide cores with the shortest time-to-market and bestpossible device utilization the programmable logic industryhas to offer. Xilinx has published a brand new data bookfocused entirely on programmable logic cores and relatedproducts. Now there is one definitive sourcebook withdetailed descriptions of all Xilinx CORE Solutions.

When you receive your copy of the CORE Solutions DataBook, become familiar with the Product Listing by Applica-tion Segment Table, (reproduced at the end of this over-

view) which lists all of the functions available today. Thistable will be your best guide to locating a specific product. Ifyou don't see what you need, check the AllianceCOREPartner Profiles, Areas of Expertise section, for each of ourAllianceCORE partners. Our partners will be more thanwilling to discuss the possibility of producing a core specif-ically for your needs.

Data Book Contents

The contents of the data book are as follows:

• Introduction- Program Overview- Product Listing by Application Segment

• LogiCORE Products, sold and supported by Xilinx- Product Overview- PCI- DSP- CORE Generator products

• AllianceCORE Products, sold and supported by Xilinx'Partners- Program Overview- Products- AllianceCORE Partner Profiles

• LogiBLOX, GUI-based small function generator• Reference Designs• Sales Offices, Representatives and Distributors

Ordering InformationTo order a copy, request the CORE Solutions Data Bookfrom the Xilinx Literature Department. In the US call 1-800-231-3386. For international locations call 1-408-879-5017or you can send an E-mail request to:

[email protected].

An electronic version of the CORE Solutions Data Book(1.2M Adobe Acrobat .pdf format) can also be downloadedfrom:

www.xilinx.com/products/logicore/core_sol.pdf

LogiCORE ProductsLogiCORE products are sold, licensed and supported byXilinx. They are developed internally by Xilinx or jointly witha partner.

The cores that Xilinx provides as LogiCORE products typi-cally fall into one of two categories.The first are high-perfor-mance interface cores that require a thoroughunderstanding and control of the FPGA technology and

0

CORE Solutions Overview

September 5, 1997 (Version 1.0) 0 2* Product Overview

September 5, 1997 (Version 1.0) 2-13


implementation software in order to achieve the desiredperformance and complexity. An example of a core in thiscategory is the LogiCORE PCI interface.

The second category are cores that benefit from a veryspecialized implementation in the FPGA. An example is theLogiCORE DSP modules that are implemented using aunique algorithm, Distributed Arithmetic. This algorithm fitsthe lookup-table-based architecture of the FPGA. Theresult is outstanding performance and device utilization,often more than 10 times better than generic HDL descrip-tions.

Xilinx CORE GeneratorIn addition to actual cores, Xilinx is committed to developenabling design tools and methodologies to facilitate usageof cores with FPGAs. The first products available in this cat-egory are the web-based CORE Generator for PCI and theCORE Generator for DSP (available on CD). This innova-tive methodology for acquiring and using cores combinesthe benefits of

• a firm core with predictable performance, and• the flexibility of system level design, facilitated by

behavioral languages such as VHDL and Verilog.

In addition, because Xilinx is using the web as a distributionmechanism, you always have access to the latest versionsand enhancements of the cores at:

www.xilinx.com/products/logicore/logicore.htm

The LogiCORE products are customized to fit your specificapplication using an intuitive graphical user interface.Based on your inputs, the tool then generates a provencore with highly predictable timing that can be integratedusing any VHDL-, Verilog- or schematic-based design flow.As a result, you can integrate several individually provencores with given performance into one system on a singleFPGA. Because each core is already verified, the time-to-market benefits are maintained for high-complexity FPGAs.

Xilinx PCI SolutionsXilinx’ PCI solution includes devices, tools and coresneeded to build a cost-effective single-chip PCI system inrecord time.

• LogiCORE PCI - the only proven PCI core withpredictable timing

• XC4000E/XL - the industry’s fastest FPGAs that allowyou to integrate the PCI interface plus 5 to 60 thousandgates of user designed logic

• HardWire - an automatic migration path to a low-costchip for volume production

• CORE Generator - for easy configuration andintegration of the LogiCORE PCI module

• 3rd party Design Centers - with PCI expertise availablefor special applications and customization of the core

PCI is an extremely high-performance and complex specifi-cation that is challenging to meet in any technology. Tomeet the stringent PCI specification the core is carefullyhand-tuned for the targeted architecture. Placement androuting for the critical parts of the core is locked down toensure that timing can be met every time the core is used.

To achieve our goals, the LogiCORE development team isworking closely with both the IC and Software teams. As anexample of this teamwork, new methodologies for charac-terizing and modeling our FPGAs have been developed.The result is access to state of the art technology andexpertise, that allows you to complete your PCI applicationin record time.

Xilinx has sold over 250 licenses of the LogiCORE PCIinterface and has built up solid knowledge about PCI. Weare committed, and will continuously develop our PCI prod-ucts to remain state of the art.

Xilinx DSP SolutionsUsing an FPGA to implement high performance DSP func-tions often allows a radical performance advantage overfixed processors while maintaining maximum flexibility andthe shortest time-to-market. Until now, tools to automatethe design process have been lacking and most designshave been completed manually by experienced FPGAdesigners.

With the introduction of Xilinx’ CORE Generator for DSP,complex parameterized DSP building blocks can be imple-mented automatically with performance and density equalto or better than a hand-tuned implementation. LogiCOREDSP modules can be used with VHDL-, Verilog- or sche-matic based design methodologies.

Higher level DSP cores are available from our Alli-anceCORE partners.

Acquiring LogiCORE ProductsLogiCORE products are available from your local Xilinxsales representative similar to other Xilinx software prod-ucts. Xilinx and your local sales representative will also beyour primary source for support of the core, the devicesand the design tools.

You can also send email questions to:

[email protected].

AllianceCORE OverviewThe AllianceCORE program is a cooperative effort betweenXilinx and independent third-party core developers. It isdesigned to produce a broad selection of industry-standardsolutions dedicated for use in Xilinx programmable logic.

Xilinx takes an active role with its partners in the process ofproductizing AllianceCOREs. This is unique to the Alli-anceCORE program. Because the process is so involved,

2-14 September 5, 1997 (Version 1.0)

we work closely with our partners to select the right coresfirst. This naturally limits the number of partners we canwork with at any one time and subsequently the number ofavailable cores. At the same time it raises the quality andusability of the cores that are offered.

AllianceCORE CriteriaA core must meet a minimum set of criteria before it canreceive the AllianceCORE label.

Core Selection

The AllianceCORE program looks at cores from a practicalpoint of view. A programmable logic version of a core musthave value over an ASIC or standard product version of thesame function. It must be cost effective and make sense foruse in a programmable device in a production system. If acandidate core does not pass these simple tests, then itdoes not make sense to invest the effort to convert it to anAllianceCORE module.

Core Qualification

Generic, synthesizable cores offer maximum flexibility forusers with unique requirements. This is typically the formatfor cores provided to the ASIC market. With programmablelogic, however, this flexibility can come at the expense ofefficiency and performance. It can take a considerableamount of effort to get a specific core to synthesize in a waythat meets density and timing requirements. Time spenttrying to accomplish this can quickly reduce the time-to-market advantage of using programmable logic and coresin the first place.

Xilinx is not interested in promoting generic, synthesizablefunctions as AllianceCOREs. Instead, AllianceCOREs aregenerally provided as parameterizable black-boxes thatallow customization in critical areas. This guarantees thatthe implementation is optimized for density while still meet-ing performance, preserving the time-to-market value ofprogrammable logic. Flexibility is provided by allowing youto quickly implement your unique logic on the same device.Source code versions of the cores are also available fromthe partners at additional cost for those who need ultimateflexibility.

Announced AllianceCOREs have been implemented andverified in a Xilinx device. They are available immediatelyfor purchase in a Xilinx-specific format. Timing-criticalcores designed to adhere to an industry standard alsocome with appropriate constraints files in order to guaran-

tee functionality and compliance. AllianceCOREs origi-nated from either schematic or HDL entry tools.

Core Integration

AllianceCOREs are not just cores, they are complete solu-tions for system designs. While cores by themselves havevalue, in many cases it is often not enough to just supply ageneric core. You may need additional tools such as sys-tem software and prototyping equipment to help you rapidlyintegrate the core into your design, perform system debugin a real-world environment, and then quickly convert theprototype to a production unit. This is particularly true ofcomplex functions.

Many AllianceCORE functions are supported by Xilinx-based demonstration or prototyping boards. Some alsohave system simulation models or debug software. All ofthis allows you to evaluate and work with the functionbefore you have to layout your board. These tools are pro-vided by the AllianceCORE partner, usually at additionalcost. Descriptions of the support tools available for eachcore are included in the CORE Solutions Data Book.

Complete solutions like these help preserve the value ofusing programmable logic while minimizing the supportburden for the core provider.

Acquiring AllianceCORE ProductsAllianceCORE products are sold and serviced directly bythe AllianceCORE partners since they are the experts fortheir particular products. They are responsible for pricing,licensing terms, delivery and technical support. Contactinformation for each partner is included in the Alli-anceCORE Partner Profiles section of the CORE SolutionsData Book.

If you want additional information about the AllianceCOREprogram or are interested in becoming a partner, contactXilinx directly.

Xilinx, Inc.2100 Logic DriveSan Jose, CA 95124Attn: Mark Bowlby, AllianceCORE Product ManagerPhone: +1 408-879-5381Fax: +1 408-879-4780E-mail: [email protected]: www.xilinx.com/products/logicore

/alliance/tblpart.htm



Table 1: Product Listing by Application Segment

Check www.xilinx.com/products/logicore/tbls_cores.htm for the latest listing of available CoresFunction CORE Solution

Standard Bus InterfacesIIC Two-Wire Serial Interface AllianceCOREISA Plug and Play Interface Reference DesignISA Interface for JPEG Motion Codec Reference DesignPCI Master/Slave Interfaces 1.2.0 LogiCOREPCI Master/Slave Interfaces 2.0.0 LogiCOREPCMCIA Fax/Modem AllianceCOREPCMCIA Library AllianceCOREUSB - Low-Speed Function Controller AllianceCOREUSB - Full-Speed Function Controller AllianceCOREUSB - 3-Port Hub Controller AllianceCOREDSP Functions1’s Complement LogiCOREAccumulator, Scaled by 1/2 LogiCOREAdder, Registered LogiCOREAdder, Registered Loadable LogiCOREAdder, Registered Scaled LogiCOREAdder, Registered Serial LogiCOREAdders, Subtractors, Accumulators Reference DesignComb Filter LogiCORECorrelator, 1-D RAM Based LogiCORECorrelator, 1-D ROM Based LogiCOREDelay Element LogiCOREFIR Filter, 16-Tap, 8-Bit Reference DesignFIR Filter - Serial Distributed Arithmetic LogiCOREFIR Filter - Dual Channel Serial Distributor Arithmetic LogiCOREIntegrator LogiCOREMemory - 16-Word Deep Register Look-up Table LogiCOREMemory - 32-Word Deep Register Look-up Table LogiCOREMemory - 16-Word Deep Registered RAM LogiCOREMemory - 32-Word Deep Registered RAM LogiCOREMemory - Registered Synchronous RAM LogiCOREMemory - Registered ROM LogiCOREMultiplier, Constant Coefficient LogiCOREMultiplier, Constant Coefficient (pipelined) LogiCOREMultipliers, Parallel - Area Optimized LogiCOREMultipliers, Parallel - Performance Optimized LogiCOREParallel to Serial Converter LogiCOREReed-Solomon Decoder AllianceCOREReed-Solomon Encoder AllianceCORESDA FIR Control Logic LogiCORESine/Cosine LogiCORESquare Root LogiCORESubtracter, Registered LogiCORESubtracter, Registered Loadable LogiCORE


Time Skew Buffer - Non-Symmetric 16-Deep LogiCORETime Skew Buffer - Non-Symmetric 32-Deep LogiCORETime Skew Buffer - Symmetric 16-Deep LogiCORETransform, DFT LogiCORETransform, FFT LogiCOREBase-Level Functions16450 UART AllianceCORE16550A UART with RAM AllianceCORE8250 Asynchronous Communications AllianceCORE8254 Programmable Timer AllianceCOREM8255 Programmable Peripheral Interface AllianceCOREXF8255 Programmable Peripheral Interface AllianceCOREAccumulator LogiBLOXAdder/Subtracter LogiBLOXClock Divider LogiBLOXComparator LogiBLOXConstant LogiCOREConstant LogiBLOXCounter LogiBLOXCounter, Loadable Binary Reference DesignCounter, Ultra-Fast Synchronous Reference DesignCounter, Accelerating Loadable Reference DesignData Register LogiBLOXDecoder LogiBLOXFIFOs in XC4000 RAM Reference DesignFIFO, High-Performance RAM-Based Reference DesignFIFO, Register-Based Reference DesignFrequency/Phase Comparator for PLL Reference DesignGates, Simple LogiBLOXHarmonic Frequency Synthesizer and FSK Modulator Reference DesignInput/Output LogiBLOXMicrocontroller, Dynamic Reference DesignMemory (ROM, RAM, Synch-RAM, Dual Port RAM) LogiBLOXMultiplexer LogiBLOXMultiplexers, Barrel Shifters Reference DesignMultiplexer, Two Input LogiCOREMultiplexer, Three Input LogiCOREMultiplexer, Four Input LogiCOREPad LogiBLOXPulse-Width Modulation Reference DesignRegister LogiCORESerial Code Conversion between BCD and Binary Reference DesignShift Register LogiBLOXTristate LogiBLOX

Table 1: Product Listing by Application Segment (Continued)

Check www.xilinx.com/products/logicore/tbls_cores.htm for the latest listing of available CoresFunction CORE Solution


1 Int roduction


3 CPLD Products

4 FPGA Products

5 SPROM Products

6 3V Products








14 Index

CPLD Products

CPLD Products


XC9500 In-System Programmable CPLD Family. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-5


XC9572 In-System Programmable CPL

Documents

Xilinx 1998 Data Book (4/98) - University of WashingtonChapter 1 is a general overview of the Xilinx product line, and is recommended reading for designers who are new to the ﬁeld