(c) 2005 Xilinx, Inc. All Rights Reserved www.xilinx.com 11-800-255-7778

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Xilinx ISE 7 Software ManualsThese software manuals support the Xilinx® Integrated Software Environment (ISE) software. Click a manual title on the left to view a manual, or click a design step in the following figure to list the manuals associated with that step.

Note: To get started with the software, refer to the “Getting Started Manuals.” For information on graphical user interfaces (GUIs), see the Help provided with each GUI.

Note: Spartan-3L design elements are identical to Spartan-3 design elements. If you are designing a Spartan-3L device, refer to the Spartan-3 design elements in the Libraries Guide.

DesignSynthesis

Design Verification

BehavioralSimulation

FunctionalSimulation

Static TimingAnalysis

TimingSimulation

BackAnnotation

In-CircuitVerification

DesignImplementation

DesignEntry

Xilinx DeviceProgramming

(c) 2005 Xilinx, Inc. All Rights Reserved www.xilinx.com 21-800-255-7778

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Getting Started Manuals

Title Summary

ISE Quick Start Tutorial � Explains how to use VHDL and schematic design entry tools� Explains how to perform functional and timing simulation� Explains how to implement a sample design

(c) 2005 Xilinx, Inc. All Rights Reserved www.xilinx.com 31-800-255-7778

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Design Entry Manuals

Title Summary

ChipScope Documentation

Note: These documents are available on the Web. ChipScope Pro is one of the Optional Design Tools that can be purchased by clicking Online Store.

� Explains how to use the ChipScope™ Pro Core Generator™ tool to generate ChipScope Pro cores and add them to an FPGA design

� Explains how to use the ChipScope Pro Core Inserter tool to insert cores into a post-synthesis netlist without disturbing the HDL source code

� Explains how to use the ChipScope Pro Analyzer tool to perform in-circuit verification (also known as on-chip debugging), including how to view data and interact with ChipScope Pro cores, how to create bitstreams that are compatible with the ChipScope Pro JTAG download function, and how to download bitstreams to an FPGA using JTAG

Constraints Guide � Describes each Xilinx constraint, including supported architectures, applicable elements, propagation rules, and syntax examples

� Describes constraint types and constraint entry methods� Provides strategies for using timing constraints� Describes supported third party constraints

EDK Supplemental Information

Note: These documents are available on the Web.

� Describes how to get started with the Embedded Development Kit (EDK)� Includes information on the MicroBlaze™ and the IBM® PowerPC®

processors� Includes information on core templates and Xilinx® device drivers

Hardware User Guides

Note: These manuals are available on the Web.

� Describes the function and operation of Virtex™-II and Virtex-II Pro™ devices, including information on the RocketIO™ transceiver and IBM® PowerPC® processor

� Describes how to achieve maximum density and performance using the special features of the devices

� Includes information on FPGA configuration techniques and printed circuit board (PCB) design considerations

ISE Quick Start Tutorial � Explains how to use VHDL and schematic design entry tools� Explains how to perform functional and timing simulation� Explains how to implement a sample design

Libraries Guide � Includes Xilinx® Unified Library information arranged by slice count, supported architectures, and functional categories

� Describes each Xilinx design element, including supported architectures, usage information, syntax examples, and related constraints

� Includes Spartan-II/IIE/3, Virtex/E/II/II-Pro/II-ProX, XC9500, CoolRunner-II/XPLA3

Note: Spartan-3L design elements are identical to Spartan-3 design elements. If you are designing a Spartan-3L device, refer to the Spartan-3 design elements in the Libraries Guide.

(c) 2005 Xilinx, Inc. All Rights Reserved www.xilinx.com 41-800-255-7778

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Note: For more information, see the ISE Help provided with the Project Navigator GUI.

Spartan-3E Libraries Guide for HDL Designs

� Includes a general description of the Spartan-3™E architecture� Includes a list of all Spartan-3™E design elements that can be instantiated

using VHDL or Verilog code organized by functional categories� Includes examples of code that can be cut and pasted into a design using

a text editor

Spartan-3E Libraries Guide for Schematic Designs

� Includes a general description of the Spartan-3™E architecture� Includes a list of all of the Spartan-3™E design elements for which

schematic symbols are available, organized by their respective functional categories

Synthesis and Verification Design Guide

� Explains how to use HDLs to design FPGA devices with an emphasis on synthesis and simulation

� Contains generic examples for tools other than Synopsys® tools

Virtex-4 Libraries Guide for HDL Designs

� Includes a general description of the Virtex-4™ architecture� Includes a list of all Virtex-4™ design elements that can be instantiated

using VHDL or Verilog code organized by functional categories� Includes examples of code that can be cut and pasted into a design using

a text editor

Virtex-4 Libraries Guide for Schematic Designs

� Includes a general description of the Virtex-4™ architecture� Includes a list of all of the Virtex-4™ design elements for which schematic

symbols are available, organized by their respective functional categories

Title Summary

(c) 2005 Xilinx, Inc. All Rights Reserved www.xilinx.com 51-800-255-7778

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Design Synthesis Manuals

Title Summary

EDK Supplemental Information

Note: These documents are available on the Web.

� Describes how to get started with the Embedded Development Kit (EDK)� Includes information on the MicroBlaze™ and the IBM® PowerPC®

processors� Includes information on core templates and Xilinx® device drivers

ISE Quick Start Tutorial � Explains how to use VHDL and schematic design entry tools� Explains how to perform functional and timing simulation� Explains how to implement a sample design

Synthesis and Verification Design Guide

� Explains how to use HDLs to design FPGA devices with an emphasis on synthesis and simulation

� Contains generic examples for tools other than Synopsys® tools

Xilinx/Synopsys InterfaceGuide

� Describes the interface between Xilinx and Synopsys® Design Compiler®, FPGA Compiler, and FPGA Compiler II™

� Provides information for synthesizing and simulating designs

XST User Guide � Explains how to use Xilinx Synthesis Technology (XST) synthesis tool, and how it supports HDL languages, Xilinx® devices, and constraints

� Explains FPGA and CPLD optimization techniques� Describes how to run XST from the Project Navigator Process window

and command line

(c) 2005 Xilinx, Inc. All Rights Reserved www.xilinx.com 61-800-255-7778

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Design Implementation Manuals

Note: For information on GUIs, such as the Project Navigator, Constraints Editor, ECS, Floorplanner, FPGA Editor, iMPACT, PACE, Timing Analyzer, and XPower, see the Help provided with each tool.

Title Summary

Constraints Guide � Describes each Xilinx constraint, including supported architectures, applicable elements, propagation rules, and syntax examples

� Describes constraint types and constraint entry methods� Provides strategies for using timing constraints� Describes supported third party constraints

Development System Reference Guide

� Describes Xilinx™ design flows, including hierarchical design flows such as Incremental Design and Modular Design

� Describes FPGA and CPLD command line tools, including syntax, options, input files, and output files

Note: For information on design implementation, see the “NGDBuild,” “MAP,” “PAR,” and “BitGen” chapters for FPGAs, and see the “NGDBuild,” “CPLDFit,” and “HPrep6” chapters for CPLDs.

EDK Supplemental Information

Note: These documents are available on the Web.

� Describes how to get started with the Embedded Development Kit (EDK)� Includes information on the MicroBlaze™ and the IBM® PowerPC®

processors� Includes information on core templates and Xilinx® device drivers

ISE Quick Start Tutorial � Explains how to use VHDL and schematic design entry tools� Explains how to perform functional and timing simulation� Explains how to implement a sample design

(c) 2005 Xilinx, Inc. All Rights Reserved www.xilinx.com 71-800-255-7778

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Behavioral Simulation Manuals

Note: For more information, see the ISE Help available from the Project Navigator GUI.

Title Summary

EDK Supplemental Information

Note: These documents are available on the Web.

� Describes how to get started with the Embedded Development Kit (EDK)� Includes information on the MicroBlaze™ and the IBM® PowerPC®

processors� Includes information on core templates and Xilinx® device drivers

ISE Quick Start Tutorial � Explains how to use VHDL and schematic design entry tools� Explains how to perform functional and timing simulation� Explains how to implement a sample design

Synthesis and Verification Design Guide

� Explains how to use HDLs to design FPGA devices with an emphasis on synthesis and simulation

� Contains generic examples for tools other than Synopsys® tools

(c) 2005 Xilinx, Inc. All Rights Reserved www.xilinx.com 81-800-255-7778

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Functional Simulation Manuals

Note: For more information, see the ISE Help available from the Project Navigator GUI.

Title Summary

EDK Supplemental Information

Note: These documents are available on the Web.

� Describes how to get started with the Embedded Development Kit (EDK)� Includes information on the MicroBlaze™ and the IBM® PowerPC®

processors� Includes information on core templates and Xilinx® device drivers

ISE Quick Start Tutorial � Explains how to use VHDL and schematic design entry tools� Explains how to perform functional and timing simulation� Explains how to implement a sample design

Libraries Guide � Includes Xilinx® Unified Library information arranged by slice count, supported architectures, and functional categories

� Describes each Xilinx design element, including supported architectures, usage information, syntax examples, and related constraints

Synthesis and Verification Design Guide

� Explains how to use HDLs to design FPGA devices with an emphasis on synthesis and simulation

� Contains generic examples for tools other than Synopsys® tools

Spartan-3E Libraries Guide for HDL Designs

� Includes a general description of the Spartan-3™E architecture� Includes a list of all Spartan-3™E design elements that can be instantiated

using VHDL or Verilog code organized by functional categories� Includes examples of code that can be cut and pasted into a design using

a text editor

Spartan-3E Libraries Guide for Schematic Designs

� Includes a general description of the Spartan-3™E architecture� Includes a list of all of the Spartan-3™E design elements for which

schematic symbols are available, organized by their respective functional categories

Virtex-4 Libraries Guide for HDL Designs

� Includes a general description of the Virtex-4™ architecture� Includes a list of all Virtex-4™ design elements that can be instantiated

using VHDL or Verilog code organized by functional categories� Includes examples of code that can be cut and pasted into a design using

a text editor

Virtex-4 Libraries Guide for Schematic Designs

� Includes a general description of the Virtex-4™ architecture� Includes a list of all of the Virtex-4™ design elements for which schematic

symbols are available, organized by their respective functional categories

(c) 2005 Xilinx, Inc. All Rights Reserved www.xilinx.com 91-800-255-7778

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Static Timing Analysis Manuals

Note: For more information, see the Help provided with the Timing Analyzer GUI.

Title Summary

Development System Reference Guide

� Describes Xilinx® design flows, including hierarchical design flows such as Incremental Design and Modular Design

� Describes FPGA and CPLD command line tools, including syntax, options, input files, and output files

Note: For information on static timing analysis, see the “TRACE” chapter for FPGAs, and see the “TAEngine” chapter for CPLDs. Also, see the “NetGen” chapter.

(c) 2005 Xilinx, Inc. All Rights Reserved www.xilinx.com 101-800-255-7778

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Timing Simulation Manuals

Note: For more information, see the ISE Help provided with the Project Navigator GUI.

Title Summary

Development System Reference Guide

� Describes Xilinx® design flows, including hierarchical design flows such as Incremental Design and Modular Design

� Describes FPGA and CPLD command line tools, including syntax, options, input files, and output files

Note: See the “NetGen” chapter for information on timing simulation.

EDK Supplemental Information

Note: These documents are available on the Web.

� Describes how to get started with the Embedded Development Kit (EDK)� Includes information on the MicroBlaze™ and the IBM® PowerPC®

processors� Includes information on core templates and Xilinx® device drivers

ISE Quick Start Tutorial � Explains how to use VHDL and schematic design entry tools� Explains how to perform functional and timing simulation� Explains how to implement a sample design

Libraries Guide � Includes Xilinx® Unified Library information arranged by slice count, supported architectures, and functional categories

� Describes each Xilinx design element, including supported architectures, usage information, syntax examples, and related constraints

Spartan-3E Libraries Guide for HDL Designs

� Includes a general description of the Spartan-3™E architecture� Includes a list of all Spartan-3™E design elements that can be instantiated

using VHDL or Verilog code organized by functional categories� Includes examples of code that can be cut and pasted into a design using

a text editor

Spartan-3E Libraries Guide for Schematic Designs

� Includes a general description of the Spartan-3™E architecture� Includes a list of all of the Spartan-3™E design elements for which

schematic symbols are available, organized by their respective functional categories

Virtex-4 Libraries Guide for HDL Designs

� Includes a general description of the Virtex-4™ architecture� Includes a list of all Virtex-4™ design elements that can be instantiated

using VHDL or Verilog code organized by functional categories� Includes examples of code that can be cut and pasted into a design using

a text editor

Virtex-4 Libraries Guide for Schematic Designs

� Includes a general description of the Virtex-4™ architecture� Includes a list of all of the Virtex-4™ design elements for which schematic

symbols are available, organized by their respective functional categories

(c) 2005 Xilinx, Inc. All Rights Reserved www.xilinx.com 111-800-255-7778

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In-Circuit Verification Manuals

Title Summary

ChipScope Documentation

Note: These documents are available on the Web. ChipScope Pro is one of the Optional Design Tools that can be purchased by clicking Online Store.

� Explains how to use the ChipScope™ Pro Core Generator™ tool to generate ChipScope Pro cores and add them to an FPGA design

� Explains how to use the ChipScope Pro Core Inserter tool to insert cores into a post-synthesis netlist without disturbing the HDL source code

� Explains how to use the ChipScope Pro Analyzer tool to perform in-circuit verification (also known as on-chip debugging), including how to view data and interact with ChipScope Pro cores, how to create bitstreams that are compatible with the ChipScope Pro JTAG download function, and how to download bitstreams to an FPGA using JTAG

(c) 2005 Xilinx, Inc. All Rights Reserved www.xilinx.com 121-800-255-7778

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Back Annotation Manuals

Title Summary

Development System Reference Guide

� Describes Xilinx™ design flows, including hierarchical design flows such as Incremental Design and Modular Design

� Describes FPGA and CPLD command line tools, including syntax, options, input files, and output files

Note: See the “NetGen” chapter for information on back annotation.

EDK Supplemental Information

Note: These documents are available on the Web.

� Describes how to get started with the Embedded Development Kit (EDK)� Includes information on the MicroBlaze™ and the IBM® PowerPC®

processors� Includes information on core templates and Xilinx® device drivers

(c) 2005 Xilinx, Inc. All Rights Reserved www.xilinx.com 13UG000 (v3.4.1) February 25, 2003 1-800-255-7778

Xilinx Device Programming ManualsR

Xilinx Device Programming Manuals

Title Summary

ChipScope Documentation

Note: These documents are available on the Web. ChipScope Pro is one of the Optional Design Tools that can be purchased by clicking Online Store.

� Explains how to use the ChipScope™ Pro Core Generator™ tool to generate ChipScope Pro cores and add them to an FPGA design

� Explains how to use the ChipScope Pro Core Inserter tool to insert cores into a post-synthesis netlist without disturbing the HDL source code

� Explains how to use the ChipScope Pro Analyzer tool to perform in-circuit verification (also known as on-chip debugging), including how to view data and interact with ChipScope Pro cores, how to create bitstreams that are compatible with the ChipScope Pro JTAG download function, and how to download bitstreams to an FPGA using JTAG

Data Sheets

Note: These documents are available on the Web.

� Describes the Xilinx® device families� Provides device ordering information� Includes detailed functional descriptions, electrical and performance

characteristics, and pinout and package information

EDK Supplemental Information

Note: These documents are available on the Web.

� Describes how to get started with the Embedded Development Kit (EDK)� Includes information on the MicroBlaze™ and the IBM® PowerPC®

processors� Includes information on core templates and Xilinx® device drivers

Hardware User Guides

Note: These documents are available on the Web.

� Describes the function and operation of Virtex™-II and Virtex-II Pro™ devices, including information on the RocketIO™ transceiver and IBM® PowerPC® processor

� Describes how to achieve maximum density and performance using the special features of the devices

� Includes information on FPGA configuration techniques and printed circuit board (PCB) design considerations