XPower for CoolRunner™ XPLA3 CPLDs

XPower forCoolRunner™ XPLA3

CPLDs

Quick Start Training

Overview• Design power considerations• Power consumption basics of CMOS devices• Calculating power in CoolRunner XPLA3 CPLDs• Assumptions for XPLA3 CPLDs in XPower• CoolRunner XPLA3 power model in XPower• Rank of power consuming nets in XPLA3 CPLDs• Activity rates• Data entry methods• Improving accuracy of XPLA3 power estimation• Macrocell configuration examples


Objectives• Power consumption in CoolRunner XPLA3 CPLDs• Assumptions for XPLA3 CPLDs in XPower• Applying the CoolRunner XPLA3 power model to a

design• The highest power consuming nets in XPLA3 CPLDs• Types of activity rates • Types of Data Entry Methods• Improving accuracy of XPLA3 power estimation• Applying different macrocell configurations to XPower• XAPP360


Power Considerations• Power Supply requirements

– Batteries– DC/DC converters– AC power source– Power supply voltage

• Thermal requirements– Package types– Enclosed environments– Industrial applications

• CoolRunner XPLA3 CPLDs– Low Power– Low Junction Temperature– Very predictable power consumption– Fast

• XAPP360– http://www.xilinx.com/xapp/xapp360.pdf


Power in a CMOS Device• Total Current is composed of two types of

current– Static– Dynamic

• Static Current– Leakage current in the turned off transistor channel– Ideally zero– Fixed component of Total Current

• Dynamic Current– Switching of the CMOS gate when in the linear region

causing transition current• Transition time is very fast• Relatively small component

– Charge/Discharge of capacitive poly gate in subsequent logic element

– XPower combines transition current with capacitive current in the power model


Calculating Power for CoolRunner

• Calculating Dynamic Current is a overwhelmingly tedious task• XPower is necessary for this calculation• Dynamic Current equation

• Total Current equation

• Total Power equation

fVCIDynamic

StaticDynamicTotal III

StaticTotal IfVCI

VIP TotalTotal


XPower Assumptions for XPLA3

• Voltage– Within published operating limits– Constant (no spikes or dips)– User must enter appropriate value

• Timing and frequency– Within published operating limits– Operation above limits yields inaccurate power calculations

• Input transition times– 800 ps– Correlated in lab at 800 ps– Actual transitions slower than 800 ps will:

• Increase actual power consumption• Cause XPower data to appear lower than actual

• Lumped capacitance– Logic elements (Product Terms, etc.)– Used to create a power model


XPLA3 Power Model• Simplified model of the CoolRunner XPLA3 architecture• Somewhat encoded net names

– FB1_PT12• Product Term #12 in Function Block #1

– FB1_3_Q• Q Flip Flop output of Macrocell #3 in Function Block #1

– FB4_12_I• Input net of Macrocell #12 in Function Block #4


XPLA3 Power Model• Nets adjustable by the user

– I - Input– Q - Flip flop output– D - Flip flop input from OR term– N - ZIA feedback– P - ZIA feedback– PT - Product Term output

• Nets NOT adjustable by the user– ZIA - Interconnect Array– OR - Output of OR term– UCT - Universal Control Term– FF - Macrocell control inputs


XPLA3 Power Consumption• Nets in order of power consumption

– External Capacitance - Very High– O - High– UCT - High - Larger with high density devices– I - High - Larger with high density devices– P - Medium - Somewhat larger with high density devices– N - Medium - Somewhat larger with high density devices– ZIA - Medium– PT - Low– OR - Low– FF - Low– Q - Very Low– D - Very Low


Activity Rate• Absolute Frequency

– Frequency of a net in units of MHz– All nets (except Q) in CoolRunner XPLA3

CPLDs are specified with absolute frequency

• Toggle Rate– A percentage of the clock frequency

• Entered as a percentage value• Displayed as MHz based on clock frequency• 100% toggle rate yields 1/2 frequency of the

clock– Q nets in XPLA3 CPLDs

• Based on global clocks only• When using product term clocks or UCT

clocks, give data in absolute frequency– Great for “What if?” scenarios


Data Entry Methods• Data entry by hand

– Most accurate, but most tedious method– Requires very detailed knowledge of XPLA3 architecture– Must specify activity rates for all nets– Depending on the design, it may be nearly impossible to

determine activity rates for all nets• Estimate Activity Rates tool

– Algorithm estimates absolute frequencies of nets not yet set by the user

– Does not estimate toggle rates– Alleviates the tedium, but is less accurate than data entry by

hand– Must enter all absolute frequencies for primary I/Os by hand– Must enter all toggle rates by hand including buried registers


Data Entry Methods (cont.)

• Simulation with ModelSim XE– Easiest method– Value Change Dump (VCD) file contains frequency

data– Simulate for sufficient length of time– Currently, only top level nets are contained in VCD file– Hand edit remaining primary I/Os and registers

including buried registers– Use Estimate Activity Rates tool


Estimate Activity Rates Tool

• Sets absolute frequencies only• Automatically set nets

– UCT– O– I– P– N– ZIA– PT– OR– FF– D

• Nets not automatically set– External Capacitance– Q


Improving Accuracy• External capacitance loads

– Loads connected to the I/O pin• Printed circuit board trace capacitance• Capacitive load of external devices

– Current is derived from Vcc and GND pins to charge and discharge this load

– Large source of power consumption• Dramatic effect on power consumption• Reduce external loads to reduce power consumption

– For accurate power estimates• Provide accurate capacitance value to XPower• Provide accurate absolute frequency of external load


Improving Accuracy (cont.)• Macrocell configurations

– Users are not exposed to product term numbers– ZIA is modeled as a non-inverting buffer– Macrocells have many configurations, but are

understandable– This information is most useful for

• Data entry by hand method• Double checking the Estimate Activity Rates tool

– Proper activity rate information is necessary in the macrocell• Improves accuracy• Source of all net activity rates


Combinatorial Output Macrocell

• Set activity rates of these nets– N - Absolute Frequency– P - Absolute Frequency– O - Absolute Frequency

• Set by XPower automatically• Based on I/O pin activity rate

– D - Absolute Frequency• Set by Estimate Activity Rates

tool• Based on activity rate of OR

term


Registered Output Macrocell

• Set activity rates of these nets– Q - Toggle Rate– N - Absolute Frequency– P - Absolute Frequency– O - Absolute Frequency

• Set by XPower automatically• Based on I/O pin activity rate

– D - Absolute Frequency• Set by Estimate Activity Rates

tool• Based on activity rate of OR term

– FF - Absolute Frequency• Set by XPower automatically


Summary• XPower is a necessity for

– Low power designs– Designs with a thermal budget– Battery operated designs

• XPower support for CoolRunner XPLA3 available now– Xpower support for CoolRunner-II coming in ISE v6.1i

• Simulation with ModelSim XE– Easiest method– Reduces the chance of data entry error– Provides accurate activity rate information– Requires user to modify fewer nets in XPower

• CoolRunner CPLDs– Lowest power CPLD in the industry– Excellent for handheld, battery powered designs– XPower makes it easier to show customers power savings using their designs

Documents

XPower for CoolRunner™ XPLA3 CPLDs