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X86 ALP & Components of CPU
A. SahuCSE, IIT Guwahati
Please be updated with http://jatinga.iitg.ernet.in/~asahu/cs222/
Outline • X86: CISC
–Registers, Addressing–Assembly Language Programming–NASM Simulator, GCC/C inline Assembly
• Components of CPU–Register, Multiplexor, Decoder, IM/DM–Adder, substractor, Varity of Adder –Multiplier : Serial, Parallel–ALU and Floating Point
Flow of Our Course Understanding of Overall Computer
yUnderstanding of an existing processor architecture
and Analysis
Understanding of CISC to RISCUnderstanding of CISC to RISC
Assembly language program : MIPS and X86 Assembly language program : MIPS and X86
Components of processor : Reg, Mux. ALU, Mem, Adder
Processor Design : Data Path and Control Path Processor Design : Data Path and Control Path
Processor Design : Analysis and ImprovementProcessor Design : Analysis and Improvement
X86 Assembly Program
• AX ‐ accumulator reg• BX ‐ base address reg• CX ‐ count reg• DX ‐ data reg
AH ALBHBH BLBLCH CLDH DLSI (Source Idx )SI (Source Idx )DI (Dest. Idx)
31 15 7 0EAXEBXEBXECXEDXESIESIEDI
• SI ‐ source index reg• DI ‐ dest index reg• BP ‐ base pointer. • SP ‐ stack pointer.
DI (Dest. Idx)BP (Base Ptr )SP (Stack Ptr)
CS (Code Seg Reg)DS (Data Seg Reg )DS (Data Seg Reg )ES (Extra Seg Reg )SS (Stack Seg Reg)
IP (Intr Ptr)
Z (Flag Reg)
EDIEBPESP
ECSEDSEDSEESESS
EIP
EZ
X86 Compatibility • 8085 (8 bit) == > 8086 (16 bit) == > i386 (32 bit) or ia32== > x86‐64 (64 bit) or ia64
• AX (AH+AL) : 16 bit • EAX 32 bit • RAX 64 bitRAX 64 bit
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Register • General registers
– EAX, EBX, ECX, EDX– Acc, Base Ptr for Memory, Ctr and Interrupt, Data
• Segment registers– CS DS ES FS GS SSCS, DS, ES FS GS, SS– Code, Data, Extra (far,near,VideoMem), Stack
• Index and pointers– ESI EDI EBP EIP ESP
• Indicator– EFLAGS
Index and Ptr Register• ES:EDI EDI DI : Destination index register
– Used for string, memory array copying and setting and for far pointer addressing with ES
• DS:ESI, EDI SI : Source index register – Used for string and memory array copyingSS EBP EBP BP S k B i i• SS:EBP EBP BP : Stack Base pointer register– Holds the base address of the stack
• SS:ESP ESP SP : Stack pointer register– Holds the top address of the stack
• CS:EIP EIP IP : Index Pointer– Holds the offset of the next instruction, It can only be read
Memory Model: Segment Definition• .model small
– Most widely used memory model.– The code must fit in 64k.– The data must fit in 64k.
• .model medium– The code can exceed 64k.– The data must fit in 64k.
• .model compact– The code must fit in 64k.– The data can exceed 64k.
• .medium and .compact are opposites.
hellodat SEGMENT BYTE 'DATA' ;Define the data segmentdos_pr EQU 9 ;define a constant via EQUstrng DB 'Hello World',13,10,'$‘; Define char stringhellodat ENDS
hellodat SEGMENT ;define a segmentdos_print EQU 9 ;define a constantstrng DB 'Hello World',13,10,'$' ;Define char stringhellodat ENDS
.data dos_print EQU 9 ;define a constantstrng DB 'Hello World',13,10,'$' ;Define char string
Data Allocation Directives• db : define byte dw: def. word (2 bytes) • dd: def double word (4) dq : def quad word (8) • equ : equate assign numeric expr to a name
.data db A 100 dup (?) ; define 100 bytes, with no initial values for bytes
db “Hello” ; define 5 bytes, ASCII equivalent of “Hello”.
dd PtrArray 4 dup (?) ;array[0..3] of dword
maxint equ 32767 ; define maxint=32767
count equ 10 * 20 ; calculate a value (200)
• Assemby code: Loop– Loop simply decreases CX and checks if CX != 0, if so, a Jump to the specified memory location
MOV CX,100_LABEL: INC AX
– LOOPNZ : LOOPs when the zero flag is not setLOOP _LABEL
MOV CX,10_CMPLOOP:DEC AX
CMP AX,3LOOPNE CMPLOOP
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• Assemby code: Nested Loop: One CX register
mov cx, 8Loop1: push cx
mov cx 4mov cx, 4Loop2: stmts
loop Loop2pop cxstmtsloop Loop1
• Arithmetic– ADD, SUB, MUL, DIV– ADD AX, 5 AX = 0003 AX = 0008
• Logic– AND, OR, XOR, NOT– AND CH, DL CH = 11111111 DL = 00000010 CH=AND CH, DL CH 11111111 DL 00000010 CH 00000010
• Bit manipulation– SHL/SHR – SHL AL, 1 AL= 101101010 01101010 ;(SHL by 1)
• Comparisons and jumps– JMP, CMP, Jxx, CALL, RET
W = X + Y * Z
mov ax, y ;Must compute Y*Z first sinceimul z ; multiplication has a higheradd ax, x ; precedence than addition.mov w, ax
• Register MOV AX, BX ; AX BX
• Immediate MOV AX, 3CH ; AX 3CH
i• Direct MOV [2000], AX ; 0(DSx10h+2000) AX
• Reg indirectMOV [BX], AX ; 0(DSx10h+BX) AX
• Base+IndxMOV [BX+SI], AX ;0(DSx10h+BX+SI) AX
• Reg RelativeMOV [BX+4], AX ;0(DSx10h+BX+4) AX
B R l i I d• Base Relative + IndexMOV ARRAY[BX+SI], AX
;0(DSx10h+ARRAY+BX+SI) AX• Scaled index
MOV [BX+2 x SI], AX ; 0(DSx10h+BX x 2+SI) AX
• Memory address written as– SEGMENT:OFFSET– Dereference offset with square brackets CS:[C494]
• DS is implicit: [1337] is same as DS:[1337]p [ ] [ ]
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• Input a single char from KBD and echo– Registers used: AH = 1, AL = the character inputted from keyboard.
– Ex: MOV AH,1INT 21H
• Outputs a string of data, terminated by a $– Registers used: AH = 9, DX = the offset address of the data to be displayed.
– Ex: MOV AH,09MOV DX,OFFSET MESS1INT 21H
• Terminates a process– Registers used: AH = 4CH, AL = binary return code.– Ex: MOV AH,4CH
INT 21H
• putchar( ‘a‘ ) ; mov dl, ‘a‘ ;dl = ‘a‘mov ah, 2h ;character output subprogramint 21h ; call ms‐dos output character
• c = getchar() ;
mov ah, 1h ; keyboard input subprogramint 21h ; char input, char is stored in almov c, al ; copy character from al to c
.model small
.stack 100h ; reserve 256 bytes of stack space
.data
.codemain proc
call print40Dotsmov ax,4c00h ; Halt for DOS routine (Exit Program)int 21h
i dmain endpend mainprint40Dots proc near ; print 40H dots
mov al, ' . 'mov cx, 40mov ah, 2h
PSLoop: int 21Hloop PSLoopret
PrintSpaces endp
• MACRONAME MACRO {ARG}• Examples
ADDITION MACRO X, Y, ZPUSH AXMOV AX,X PUSH AXADD AX,YMOV Z,AXPOP AXENDM
• Call macro and expand– ADDITION A1, A2, A3
MOV AX,A1ADD AX,A2MOV A3,AXPOP AX
.model small
.data N EQU X
.code
SUM_OF_N proc near cmp bx, 00jz BX_Opush bx
main procmov bx, Ncall SUM_OF_Nmov ax,4c00Hint 21hmain endp
end main
push bxdec bxcall SUM_OF_Npop bx
BX_O: add ax, bxret
endp
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NASM • The Netwide ASseMbler• Free BSD : Free Berkley Software Distribution• Linux/Unix Version • 16/32/64 bit X86• 16/32/64 bit X86 • Inter operatable with Liux GCC compiler
NASM Hello World SECTION .data ; data section
msg: db "Hello World",10 ; the string to print, 10=crlen: equ $‐msg ; "$" means "here"
; len is a value, not an addressSECTION .text ; code section
global main ; make label available to linker
main: ; standard gcc entry pointmain: ; standard gcc entry pointmov edx, len ; arg3, length of string to printmov ecx, msg ; arg2, pointer to stringmov ebx, 1 ; arg1, where to write, screenmov eax, 4 ; write sysout command to int 80 hexint 0x80 ; interrupt 80 hex, call kernel
mov ebx, 0 ; exit code, 0=normalmov eax, 1 ; exit command to kernelint 0x80 ; interrupt 80 hex, call kernel
NASM‐Hello World • Compilation and linking Assemble:$nasm ‐f elf ‐l hello.lst hello.asmlink: $gcc ‐o hello hello.orun: $./helloOutput: Hello World
NASM Tutorial and hello World Example Available in Course website
http://jatinga.iitg.ernet.in/~asahu/cs222/
GCC inline assembly syntax #include <stdio.h>
intmain() {/* Add 10 and 20 and store result into register %eax*/__asm__ ( "movl $10, %eax;"
"movl $20, %ebx;""addl %ebx, %eax;"
);}
GCC inline assembly syntax asm("assembly code");
O r __asm__ ("assembly code");
Example (" l % b % ")asm("movl %ebx, %eax");
/* moves the ontents of ebx register to eax */__asm__("movb %ch, (%ebx)");
/* moves the byte from ch to the memory pointed by ebx */
Extended Assembly we can also specify the operands. It allows us to specify the input registers, output registers and a list of clobbered registers.
asm ( "assembly code": output operands /* optional */: input operands /* optional */: list of clobbered registers /* optional
*/);
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Extended Assembly int arg1, arg2, add ;__asm__ ( "addl %%ebx, %%eax;"
: "=a" (add): "a" (arg1), "b" (arg2)
);
Here "add" is the output operand referred to by register eax. And arg1 and arg2 are input operands referred to by registers eax and ebxrespectively. eax=arg1; ebx=arg2; eax=eax+ebx; add=eax;
);
#include <stdio.h>intmain() {int arg1, arg2, add, printf( "Enter two integer numbers : " );scanf( "%d%d", &arg1, &arg2 );/* Perform Addition*/
Extended Assembly
__asm__ ( "addl %%ebx, %%eax;" : "=a" (add) : "a" (arg1) , "b" (arg2)
);
printf( "%d + %d = %d\n", arg1, arg2, add );return 0 ;
}
Other Examples and Tutorial
GCC inline assembly tutorial and some examples are Available in Course website
http://jatinga.iitg.ernet.in/~asahu/cs222/
Flow of Our Course Understanding of Overall Computer
yUnderstanding of an existing processor architecture
and Analysis
Understanding of CISC to RISCUnderstanding of CISC to RISC
Assembly language program : MIPS and X86 Assembly language program : MIPS and X86
Components of processor : Reg, Mux. ALU, Mem, Adder
Processor Design : Data Path and Control Path Processor Design : Data Path and Control Path
Processor Design : Analysis and ImprovementProcessor Design : Analysis and Improvement
Components of CPU
Division into Data path and Control
DATA PATH
CONTROLLER
controlsignals
statussignals
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Building block types
Two types of functional units:• Elements that operate on data values (combinational)– Output is function of current inputOutput is function of current input– No memory
• Elements that contain state (sequential)– Output is function of current and previous inputs– State = memory
Building block types
Two types of functional units:• Elements that operate on data values (combinational)– Output is function of current inputOutput is function of current input– No memory
• Elements that contain state (sequential)– Output is function of current and previous inputs– State = memory
Combinational circuit examples
• Gates: and, or, nand, nor, xor, inverter• Multiplexer• Decoder• Decoder• Adder, subtractor, comparator• ALU• Array multipliers
Sequential circuit examples
• Flip‐flops• CountersR i• Registers
• Register files• Memories
Clocked vs. unclocked circuit
• Clocked state element– State changes only with clock edge
• Unclocked state elementSt t h ith h i th– State changes can occur with changes in other inputs
cycle timerising edge
falling edge
Unclocked state elements
QR Q
C
_Q
SD
_Q
D
C
Q
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Clocked State ElementsQQ
_Q
Q
_Q
Dlatch
D
C
Dlatch
DD
C
CC
D
C
Q
Clock and timingsD
C
Set-up time Hold time
State Element
2
State Element
1
Combinational Logic
Clock Cycle
Components for MIPS subset• Register• Adder• ALU• Multiplexer• Multiplexer• Register file• Program memory• Data memory• Bit manipulation components