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PROJECT REPORT(Project Term January-May 2012)
Bidirectional Visitor counter
Submitted by Under the Guidance of
(Name of Student) (Name of faculty coordinator with designation)
Registration Number :.. Department of Programme & Section Lovely School / Institute of ..
Lovely Professional University, Phagwara
January to May 2012
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ABSTRACT
A counter that can change its state in either direction, under control of an updownselector input, is known as an updown counter. The circuit given here can count
numbers from 0 to 9999 in up and down modes depending upon the state of theselector. It can be used to count the number of persons entering a hall in the up modeat entrance gate. In the down mode, it can count the number of persons leaving the hallby decrementing the count at exit gate. It can also be used at gates of parking areasand other public places.
This circuit divided in three parts: sensor, controller and counter display. The sensor
would observe an interruption and provide an input to the controller which would run the
counter in up/down mode depending upon the selector setting. The same count is
displayed on a LCD through the controller.
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1. Introduction
This project titled Microcontroller based Bidirectional Visitor
counter is designed and presented in order to count the visitors of an auditorium, hall,
offices, malls, sports venue, etc. The system counts both the entering and exiting visitor
of the auditorium or hall or other place, where it is placed. Depending upon the
interrupt from the sensors, the system identifies the entry and exit of the visitor. On the
successful implementation of the system, it displays the number of visitor present in the
auditorium or hall. This system can be economically implemented in all the places where
the visitors have to be counted and controlled. Since counting the visitors helps to
maximize the efficiency and effectiveness of employees, floor area and sales potential of
an organization, etc.
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2.1 Block Diagram
Sensor arrangement at the way
Sensors
Logic
Control
Circuit
Micro-controller
AT89C52
Display
Power
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Enter
Exit
IR TX1
IR TX2 RX2
RX1
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2.2 Description
I. Sensors
The block shows the sensor arrangement at the entrance cum exit passage. Here a pair
of IR transmitter receiver is used as sensor. Photo transistors are used as IR receiver, since it has
sensitivity to receive IR rays.
IR Transmitter:
Infrared(IR) radiation iselectromagnetic radiationof awavelengthlonger than that of
visible light,but shorter than that ofmicrowaves.The name means "belowred"(from theLatininfra,
"below"), red being thecolorof visiblelightwith the longest wavelength. Infrared radiation has
wavelengths between about 750nmand 1mm,spanning fiveorders of magnitude.A longer wavelength
means it has a lowerfrequencythan red, hence "below". Objects generally emit infrared radiation
across a spectrum of wavelengths, but only a specific region of the spectrum is of interest because
sensors are usually designed only to collect radiation within a specific bandwidth.
Remote controls and IrDA devices use infrared light-emitting diodes (LEDs) to emit
infrared radiation which is focused by a plastic lens into a narrow beam. The receiver uses a silicon
photodiode to convert the infrared radiation to an electric current. It responds only to the rapidly
pulsing signal created by the transmitter, and filters out slowly changing infrared radiation from ambient
light. IR does not penetrate walls and so does not interfere with other devices in adjoining rooms.
Photo-transistors:
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Phototransistors are examples of photodiode-amplifier combinations integrated within
a single silicon ship. These combinations are put together in order to overcome the major fault of
photodiodes: unity gain. Many applications demand a greater output signal from photodiode can
always be amplified through use of an external op-amp or other circuitry, this approach is often not as
practical or as cost effective as the use of phototransistors.
The phototransistor can be viewed as a photodiode whose output photocurrent is fed into the base of a
conventional small signal transistor. While not required for operation of the device as a photo detector,
a base connection is often provided allowing the designer the option of using base current to bias the
transistor. The typical gain of a phototransistor can range from 100 to over 1500.
Symbol and typical view of photo-transistor:
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Features:
Low-cost visible and near-IR photo detector.
Available with gains from 100 to over 1500.
Moderately fast response times.
Available in a wide range of packages including epoxy-coated, transfer-molded,
cast, hermetic, and in chip form.
Usable with almost any visible or near-infrared light source such as IREDs; neon;
fluorescent, incandescent bulbs; lasers; flame sources; sunlight; etc.
Same general electrical characteristics as familiar signal transistors.
II. Logic control circuit
Here the logic control circuit consists of two circuits, a op-amp comparator and
a flip-flop circuit.
Comparators:
A comparatoris a device which compares twovoltagesorcurrentsand switches
its output to indicate which is larger. A standardop-ampoperating without negative feedback is used as
a comparator. When the non-inverting input (V+) is at a higher voltage than the inverting input (V-), the
high gain of the op-amp causes it to output the most positive voltage it can. When the non-inverting
input (V+) drops below the inverting input (V-), the op-amp outputs the most negative voltage it can.
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Since the output voltage is limited by the supply voltage. Here the operational amplifier LM 324 is used
as comparator.
Inputs Output
- > + Negative
+ > - Floating
Pin Diagram of LM324:
General description on LM324:
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The LM324 consists of four independent, high-gain, internally frequency-compensated
operational amplifiers designed specially to operate from a single power supply over a wide range of
voltages.
In linear mode, the input common-mode voltage range includes ground and the outputvoltage can also swing to ground, even though operated from only a single power supply voltage. The
unity gain crossover frequency and the input bias current are temperature-compensated.
Features:
Internally frequency-compensated for unity gain
Large DC voltage gain: 100 dB
Wide bandwidth (unity gain): 1 MHz (temperature-compensated) Wide power supply range Single supply:
3VDCto 30VDCor dual supplies: +/-1.5VDC to +/-15VDC.
Very low supply current drain: essentially independent of supply voltage (1mW/op amp at +5
VDC)
Low input biasing current: 45nADC(temperature-compensated)
Low input offset voltage: 2 mVDCand offset current: 5nADC
Differential input voltage range equal to the power supply voltage
Large output voltage: 0VDCto VCC1.5 VDCswing
Typical Applications:
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Flip-flop:
A flip-flop is a kind ofbistablemultivibrator,anelectronic circuitwhich has two
stable states and thereby is capable of serving as onebitofmemory.Today, the term flip-flop has come
to generally denote non-transparent (clocked or edge-triggered) devices, while the simpler transparent
ones are often referred to as latches. A flip-flop is controlled by (usually) one or two control signals
and/or a gate orclock signal.Theoutputoften includes thecomplementas well as the normal output.
As flip-flops are implemented electronically, they requirepowerandgroundconnections.
JK Flip-flop:
The JK flip-flop augments the behavior of the SR flip-flop by interpreting the S =
R = 1 condition as a "flip" or toggle command. Specifically, the combination J = 1, K = 0 is a command to
set the flip-flop; the combination J = 0, K = 1 is a command to reset the flip-flop; and the combination J =
K = 1 is a command to toggle the flip-flop, i.e., change its output to the logical complement of its current
value. Setting J = K = 0 does NOT result in a D flip-flop, but rather, will hold the current state. To
synthesize a D flip-flop, simply set K equal to the complement of J. The JK flip-flop is therefore a
universal flip-flop, because it can be configured to work as an SR flip-flop, a D flip-flop or a T flip-flop.
Symbol for JK flip-flop:
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A circuit symbol for a JK flip-flop, where > is the clock input, J and K are data
inputs, Q is the stored data output, and Q' is the inverse of Q.
Equation and Truth table:
The characteristic equation of the JK flip-flop is:
And the corresponding truth table is:
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J K Qnext Comments
0 0 Hold State
0 1 0 Reset
1 0 1 Set
1 1 Toggle
Pin Diagram of Dual JK flip-flop IC 74LS76:
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III. Microcontroller AT89C52
The AT89C52 is a low-power, high-performance CMOS 8-bit microcomputer
with 8Kbytes of Flash programmable and erasable read only memory (PEROM). The device is
manufactured using Atmels high-density nonvolatile memory technology and is compatible with the
industry-standard 80C51 and 80C52 instruction set and pin out. The on-chip Flash allows the program
memory to be reprogrammed in-system or by a conventional nonvolatile memory programmer. By
combining a versatile 8-bit CPU with Flash on a monolithic chip, the Atmel AT89C52 is a powerful
microcomputer which provides a highly-flexible and cost-effective solution to many embedded control
applications.
Features:
Compatible with MCS-51 Products
8K Bytes of In-System Reprogrammable Flash Memory
Endurance: 1,000 Write/Erase Cycles
Fully Static Operation: 0 Hz to 24 MHz
Three-level Program Memory Lock
256 x 8-bit Internal RAM
32 Programmable I/O Lines
Three 16-bit Timer/Counters
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Eight Interrupt Sources
Programmable Serial Channel
Low-power Idle and Power-down Modes
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Pin configuration of Microcontroller AT89C52:
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Block Diagram of Atmel 89C52 Microcontroller
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Pin Description of Microcontroller AT89C52:
Port 0:
Port 0 is an 8-bit open drain bi-directional I/O port. As an output port, each pin can sink
eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high impedance inputs.
Port 0 can also be configured to be the multiplexed low order address/data bus during accesses to
external program and data memory. In this mode, P0 has internal pull-ups.
Port 0 also receives the code bytes during Flash programming and outputs the code bytes during
program verification. External pull-ups are required during program verification.
Port 1:
Port 1 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 1 output buffers
can sink/source four TTL inputs. When 1s are written to Port 1 pins, they are pulled high by
the internal pull-ups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled
low will source current (IIL) because of the internal pull-ups.
In addition, P1.0 and P1.1 can be configured to be the timer/counter 2 external count input
(P1.0/T2) and the timer/counter 2 trigger input (P1.1/T2EX), respectively, as
shown in the following table.
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Port 1 also receives the low-order address bytes during Flash programming and verification.
Port 2:
Port 2 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 2 output buffers
can sink/source four TTL inputs. When 1s are written to Port 2 pins, they are pulled high by
the internal pull-ups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled
low will source current (IIL) because of the internal pull-ups. Port 2 emits the high-order address byte
during fetches from external program memory and during accesses to external data memory that uses
16-bit addresses (MOVX @ DPTR). In this application, Port 2 uses strong internal pull-ups when emitting
1s. During accesses to external data memory that use 8-bit addresses (MOVX @ RI), Port 2
emits the contents of the P2 Special Function Register. Port 2 also receives the high-order address bits
and some control signals during Flash programming and verification.
Port 3:
Port 3 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 3 output buffers
can sink/source four TTL inputs. When 1s are written to Port 3 pins, they are pulled high by
the internal pull-ups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled
low will source current (IIL) because of the pull-ups. Port 3 also serves the functions of various special
features of the AT89C51, as shown in the following table. Port 3 also receives some control signals for
Flash programming and verification.
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RST:
Reset input. A high on this pin for two machine cycles while the oscillator is running
resets the device.
ALE/PROG:
Address Latch Enable is an output pulse for latching the low byte of the address during accesses
to external memory. This pin is also the program pulse input (PROG) during Flash programming. In
normal operation, ALE is emitted at a constant rate of 1/6 the oscillator frequency
and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped
during each access to external data memory. If desired, ALE operation can be disabled by setting bit 0 of
SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the
pin is
weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external
execution mode.
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PSEN:
Program Store Enable is the read strobe to external program memory. When the AT89C52 is
executing code from external program memory, PSEN is activated twice each machine cycle, except that
two PSEN activations are skipped during each access to external data memory.
EA/VPP:
External Access Enable. EA must be strapped to GND in order to enable the device to fetch code
from external program memory locations starting at 0000H up to FFFFH. Note, however, that if lock bit 1
is programmed, EA will be internally latched on reset. EA should be strapped to VCC for internal
program executions. This pin also receives the 12-volt programming enable voltage
(VPP) during Flash programming when 12-volt programming is selected.
XTAL1:
Input to the inverting oscillator amplifier and input to the internal clock operating circuit.
XTAL2:
Output from the inverting oscillator amplifier.
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Data Memory:
The AT89C52 implements 256 bytes of on-chip RAM. The upper 128 bytes occupy a
parallel address space to the Special Function Registers. That means the upper 128 bytes have the same
addresses as the SFR space but are physically separate from SFR space. When an instruction accesses an
internal location above address 7FH, the address mode used in the instruction specifies whether the
CPU accesses the upper 128 bytes of RAM or the SFR space. Instructions that use direct addressing
access SFR space.
Interrupts:
The AT89C52 has a total of six interrupt vectors: two external interrupts (INT0 and INT1), three
timer interrupts (Timers 0, 1, and 2), and the serial port interrupt. These interrupts are all shown in
Figure below. Each of these interrupt sources can be individually enabled or disabled by setting or
clearing a bit in Special Function Register IE. IE also contains a global disable bit, EA, which disables all
interrupts at once. Note that Table shows that bit position IE.6 is unimplemented.
Interrupt Enable (IE) Register
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In the AT89C51, bit position IE.5 is also unimplemented. Timer 2 interrupt is generated
by the logical OR of bits TF2 and EXF2 in register T2CON. Neither of these flags is cleared by hardware
when the service routine is vectored to. In fact, the service routine may have to determine whether it
was TF2 or EXF2 that generated the interrupt, and that bit will have to be cleared in software. The Timer
0 and Timer 1 flags, TF0 and TF1, are set at S5P2 of the cycle in which the timers overflow. The values
are then polled by the circuitry in the next cycle. However, the Timer 2 flag, TF2, is set at S2P2 and is
polled in the same cycle in which the timer overflows.
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Interrupt Sources
Oscillator Characteristics:
XTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier thatcan be configured for use as an on-chip oscillator, as shown in Figure below. Either a quartz crystal or
ceramic resonator may be used. To drive the device from an external clock source, XTAL2 should be left
unconnected while XTAL1 is driven. There are no requirements on the duty cycle of the external clock
signal, since the input to the internal clocking circuitry is through a divide-by-two flip-flop, but minimum
and maximum voltage high and low time specifications must be observed.
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Oscillator Connections
Programming the Flash:
The AT89C52 is normally shipped with the on-chip Flash memory array in the erased
state (that is, contents = FFH) and ready to be programmed. The programming interface accepts either a
high-voltage (12-volt) or a low-voltage (VCC) program enable signal. The Low-voltage programming
mode provides a convenient way to program the AT89C52 inside the users system, while the high-
voltage programming mode is compatible with conventional third party Flash or EPROM programmers.
The AT89C52 is shipped with either the high-voltage or low-voltage programming mode enabled. The
respective top-side marking and device signature codes are listed in the following table.
The AT89C52 code memory array is programmed byte-by-byte in either programming
mode. To program any nonblank byte in the on-chip Flash Memory, the entire memory must be erased
using the Chip Erase Mode.
Programming Algorithm:
Before programming the AT89C52, the address, data and control signals should be set
up according to the Flash programming mode. To program the AT89C52, take the following steps.
1. Input the desired memory location on the address lines.
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2. Input the appropriate data byte on the data lines.
3. Activate the correct combination of control signals.
4. Raise EA/VPP to 12V for the high-voltage programming mode.
5. Pulse ALE/PROG once to program a byte in the Flash array or the lock bits. The byte-write
cycle is self-timed and typically takes no more than 1.5 ms. Repeat steps 1 through 5, changing
the address and data for the entire array or until the end of the object file is reached.
Data Polling:
The AT89C52 features Data Polling to indicate the end of a write cycle. During a write
cycle, an attempted read of the last byte written will result in the complement of the written data on
PO.7. Once the write cycle has been completed, true data is valid on all outputs, and the next cycle may
begin. Data Polling may begin any time after a write cycle has been initiated.
Ready/Busy:
The progress of byte programming can also be monitored by the RDY/BSY output signal.
P3.4 is pulled low after ALE goes high during programming to indicate BUSY. P3.4 is pulled high again
when programming is done to indicate READY.
Program Verify:
If lock bits LB1 and LB2 have not been programmed, the programmed code data can be
read back via the address and data lines for verification. The lock bits cannot be verified directly.
Verification of the lock bits is achieved by observing that their features are enabled.
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Chip Erase:
The entire Flash array is erased electrically by using the proper combination of control
signals and by holding ALE/PROG low for 10 ms. The code array is written with all 1s. The chip erase
operation must be executed before the code memory can be reprogrammed.
Programming Interface:
Every code byte in the Flash array can be written, and the entire array can be erased, byusing the appropriate combination of control signals. The write operation cycle is self timed and once
initiated, will automatically time itself to completion.
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IV. Display
The circuit comprises three seven segment displays to represent the number of visitors present.
Seven segment display:
A typical 7-segmentLEDdisplay component, with decimal point.
A seven segment display, as its name indicates, is composed of seven elements. Individually on
or off, they can be combined to produce simplified representations of theHindu-Arabic numerals.Often
the seven segments are arranged in an oblique, oritalic,arrangement, which aids readability.
The individual segments of a seven-segment display.
In a simple LED package, each LED is typically connected with one terminal to its own pin on the
outside of the package and the other LED terminal connected in common with all other LEDs in the
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device and brought out to a shared pin. This shared pin will then make up all of the cathodes (negative
terminals) OR all of the anodes (positive terminals) of the LEDs in the device; and so will be either a
"Common Cathode" or "Common Anode" device depending how it is constructed. Hence a 7 segment
plus DP package will only require nine pins to be present and connected.
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V. Power supply
The entire circuit is powered up by a power supply circuit, which is shown
above. The circuit comprises following components,
1. Step-down transformer of 9V/500mA
2. Bridge rectifier
3. A Positive 5 V regulator IC
4. Filter capacitors.
The AC supply of 220V is step-downed to 9V by the step-down transformer. And
the 9v is now given to bridge rectifier to convert the AC source to DC source. The bridge rectifier consists
of four diodes, which two of them comprises forward bias and other two of them reverse bias during the
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positive half cycle of AC voltage. And vice versa during the negative half cycle of the AC source. After
rectification, the 9v DC is given to regulator IC 7805. The positive voltage regulator IC 7805, provides a
constant 5v DC to the load. Since the output may be pulsated DC, the filters circuit filters the AC
components present in the output to provide a pure DC.
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3.1 Schematic Diagram of Bidirectional Visitor Counter
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3.2 Circuit Operation
The circuit shows the microcontroller based bidirectional visitor counter, wherein the
transmitter and the receiver form the IR detection circuit. Control logic is built around transistors,
operational amplifier LM324 (IC1) and flip-flop (IC2).
The IR transmitter-receiver setup at the entrance-cum-exit of the passage is shown at
the block diagram. Two similar sections detect interruption of the IR beam and generate clock pulse for
the microcontroller. The microcontroller controls counting and displays the number of persons present
inside the hall. When nobody is passing through the entry/exit point, the IR beam continuously falls on
phototransistor T1. Phototransistor T1 conducts and the high voltage as its emitter drives transistor T3
into saturation, which makes pin 3 of comparator N1 low and finally output pin 1 of comparator N1 is
high.
Now if someone inters the place, first the IR beam from IR TX1 is interrupted and then
the IR beam from IR TX1 is interrupted, phototransistor T1 and transistor T3 cut-off and pin 3 of
comparator N1 goes high. The low output (pin1) of comparator N1 provides negative trigger pulse to
pin 1 of J-K flip-flop IC(A). At this moment, the high input at J and K pins of flip -flop IC2(A) toggles its
output to low. On the other hand, the low input at J and K pins of IC2(B) due to clock pin 1 of IC2(A)
and J input (pin 9) and K input (pin 12) of IC2(B) are connected to pin1 of comparator N1. the
negative-going pulse is applied to clock pin 6 of IC2(B) when the person interrupts the IR beam from IR
TX2. There is no change in the output of IC2(B) flip-flop. This triggers the external interrupt INT0 (pin
12) of microcontroller AT89C52.
The AT89C52 us an 8-bit microcontroller with 8 kb of flash based program memory, 256
bytes of RAM, 32 input/output lines, three 16 bits timers/counters, on-chip oscillator and clock circuitry.
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A 12MHz crystal is used fro providing clock. Ports 0, 1 and 2 are configured for 7-segment displays.
Port-0 pin is externally pulled up with 10-kilo-ohm resistor network RNW1 because port-0 is an 8-bit,
open-drain, bidirectional, input/output (I/O) port. Port-1 and port-2 are 8-bit bidirectional I/O ports
with internal pull-ups (no need of external pull-ups).
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Port pins 3.0 and 3.1 are configured to provide the set pulse to J-K flip-flops IC2(A) and
IC2(B), respectively. External interrupts INT0 and INT1 Receive the interrupt the IR beams. Resistor R9
and capacitor C5 provide power-on-reset pulse to the microcontroller. Switch S1 is used for manualreset.
When the microcontroller is reset, the flip-flops are brought in set state through the
microcontroller at software run time by making their set pin high for a moment. The value of the
counter increments by 1 when the interrupt service routine for INT0 is executed. The output of the
corresponding J-K flip-flop is set to high again by making its set input pin low through the
microcontroller is configured as a negative-edge-triggered interrupt sensor.
Similarly, if somebody exits the place, first the IR beam from IR TX2 is interrupted and
then the IR beam from IR TX1. When the beam from IR Tx2 is interrupted, output pin 7 of comparator
N2 goes low. This provides clock pulse to pin 6 of J-K flip-flop IC2(B).
At this moment, the high input at J and K pins of flip-flop IC2(B) toggles its output to
low. ON the other hand, the low input at J and K pins of IC2(A) flip-flop. This triggers the external
interrupt INT1 (pin 13) of microcontroller AT89C52. The value of the counter decrements by 1 when
interrupt service routing for INT1 is executed. The output of the corresponding J-K flip-flop is set to
high again by making its set input pin low through the microcontroller.
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4.1 Algorithm
Algorithm:
Step 1 : Start the process
Step 2 : Select ports 0, 1, 2 as output ports for displaying the count value in
7-segment display
Step 3 : Select port 3 also as output port for providing set pulse to flip-flop
Step 4: When external interrupt INT0 occurred, increment the count by 1.
Step 5 : When external interrupt INT1 occurred, decrement the count by 1.
Step 6 : Continue the process, whenever the interruption occurs.
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4.2 Flow chart
Flow chart:START
Ext-interrupt
occurred!
INT0 orINT1
Send data to display the count in 7-
segment via the ports 0, 1, 2
Select Ports 0, 1, 2 as output
orts for 7-se ment dis la
Select Port 3 as output port
for providing set- pulse to
flip-flop
Increment the Decrement the
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4.3 Program Coding
The program coding for this bidirectional visitor counter circuit is written in C language
and is compiled using C51 Keil compiler.
Program:
#include
int i=0,j,k,l,m,a[ ]=[63,6,91,79,102,109,125,7,127,111];
void enter (void) interrupt 0
{
i++;
if(i>999) i=999;
P3_1=0;
for(m=0;m
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void main()
{
IE = 1333;
TCON = 5;
P3_0=1;
P3_1=1;
i=0;
while(1)
{
j=i%10;
k=i/10;
l=i/100;
k=k-l*10;
P2=a[j];
P0=a[k];
P1=a[l];
}
}
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5.1 PCB Design and Fabrication
PCB Design:
Using the Protel schematics software, designed this PCB.
Protel for windows PCB 1.5 capabilities:
Protel for windows PCB is a complete PCB layout environment with many attractive
features for productive design work. You can use Protel for windows PCB as a stand-alone manual
board layout. When combined with the schematics capture package, Protel for windows PCB becomes
the backbone of fully automated, end to end design system that features a high degree of design
automation and integration. However you use Protel for windows PCB, you will appreciate its helps of
use and the high degree of flexibility built into this proven PCB design system.
PCB generates through hole and design and SND design of up to sixteen signal layers,
plus four mid layer power planes and four mechanical drawing layers. Board size can be as big as 100
inches (or 81 cm) square. Placement accuracy is to 1/1,000,000 inch (.001 mil or .00025 mm).
Metric/imperial grid system allows you to work accurately in both measurement system and the gird can
be toggled Between metric and imperial modes as you design by pressing Q.
A PCB design is a series of layers which correspond to the individual tools used to
create the board such as the top and bottom signal layers independently and some operations, such as
track placement and layers dependentyou must first select the layers and then place the track. PCB
print/plot options also reflect this requirement for layered design.
PCB design differs from other drawing tasks in its requirements for extreme precision.
As a result, PCB is more of a placing environmentthan a freehand drawing environment. Another
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fundamental difference is connectivityPCBs ability to recognize connection between track segments,
tracks and component pads, etc. for example, PCB allows you to move a component without breaking its
track to pad connections. You will be using connectivity on several levels as you design with PCB.
PCB fabrication :
The proposed PCB has been carefully designed by considering all the aspects
such as the overall circuit functionality, size requirements, electromagnetic interface, etc. once the PCB
pattern is photographed and reproduce on clear plastic sheet. The plastic sheet is placed over a copper
glass epoxy or phenolic board, the assembly is injected to undergo a photochemical process and the
resulting copper coated board consists of printed tracks which interconnect the components as per the
schematic design. The basic material used for making printed circuit board is copper clad phenolic resin
laminate. For general use, fuse boards are single sided.
The procedure for making PCB is as follows,
The board has to be cut to the required size and the copper surface has to be
cleaned.
The drawing of the circuit through which conduction takes place is made on the
copper surface using resist inks.
Then the uncovered copper areas are etched away in chemical bath.
The resist ink is removed to expose copper conducting areas.
Degreasing and cleaning the board are necessary to ensure that the areas take
solder readily.
Layout starts with an experimental design of components position and connections
are required.
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Connections on a PCB should cross and sketching is usually done when components
positions are to be altered. Tracking of the PCB plane has to be made after having
arrived at a suitable layout.
The copper surface should be cleaned and dried before sketching the circuit in the
board.
After tracking the pattern on the copper surface, this pattern then painted with
resist marker pen. It is allowed to dry for about 15 minutes.
The board is then transferred to an etching bath. This consists of a solution of ferric
chloride kept in a plastic tray.
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The board is placed in the path such that the copper surface is kept facing upwards.
This process is to be continued until all the tracks of copper have disappeared from
the surface.
After etching, the board is removed and washed under running water to remove
traces of chemicals.
Finally it is dried with soft cloth. The rest should be done is drilling.
The points to be considered while drilling are,
Drilling should carryout such that the copper side is upper most. The use of a sharp
drill is a must.
A hard material under the board prevents the points of the drill from tearing up a
lump out of the back of the board, when the drill breaks through.
To prevent the drill running of its correct position while drilling, the point to be
drilled has to be spotted with the center punch.
Vertical drill stand is best suited for drilling PCBs. This should ensure square holes.
Due to small size drill is used breakage rate can be high.
The original tracking will be helpful for making the components positions on the
plan side of the board, which acts a guide for components assembly.
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5.2 PCB Layout
PCB Layout for Bidirectional Visitor Counting Circuit:
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6. Conclusion
Thus the project entitled Bidirectional Visitor Counter helps to measure
the visitor entering and exiting a particular passage or way. The circuit counts both
entering and exiting visitors and displays the number of visitors present inside the hall.
Visitor counting is not limited to the entry/exit point of a company but has a wide range
of applications that provide information to management on the volume and flow of
people throughout a location. the visitor helps to maximize the efficiency and
effectiveness of employees, floor area and sales potential of an organization.
Future prospects
The circuit may also be enhanced with a wide counting range of above
three digits by modifying software section of the system. It can also be enhanced for
long and accurate sensing range using a laser torch instead of IR transmission circuit.
Thus the circuit can be used to monitor visitor flow in effective manner, where the
visitors have to counted and controlled.