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Presented by
SHANTANU(ee1200232)
Basic Differential Pair (Qualitative analysis)
Date 08/03/2016 Reference : Design of Analog CMOS Integrated Circuits by Behzad Razavi
Electronic device used to amplify the difference between two signal and suppress common voltage (if any) between two i.e. V0 = A(V2 -V1)
However if signal have different common level or if parameters of transistor used are different then output gets modified to
V0 = A2V2-A1V1 = Ad(V1 + V2)/2 + Ac(V2-V1) Most widely used building block in analog integrated circuit as it is main
component of opamp
Can also be operated as single input differential output , single input single output , double input single output
Differential Pair
1
Coupling between wires having analog and digital signal(clock) respectively
Noise Corrupted biasing voltage
Why Differential Pair
08/03/2016 2
Sensitivity towards the CM level of input signal
For lower CM level the circuit may turn off for smaller values of V1/V2
Change in CM level of signal changes bias currents as well as transconductance(gm) and hence gain of circuit
Differential pair operation
3
Thus Its important to make sure that output should have minimum dependence on input CM level
Ensures that sum of two currents remains same independent of CM level
Cont…
4
Disadvantages
Increased area : Circuit occupies twice as much area as single ended operation
Increased cost, power consumption
However practically it has been observed that numerous advantages of differential operation overweigh its cons.
5
The main advantage of using MOSFETs for a differential pair compared to BJTs is the nearly infinite input impedance, while the disadvantage is generally lower differential gain
BJT Vs MOSFET Differential Pair
6
Study of variation of output w.r.t. input signal
Qualitative analysis
1 2 1 2
2 1 2
1 2 1 2
2 1 2
1 2 1 2
1 2 1
1,
2
,2 23
,
in in
D ss DD DD SS D
in in
ss ssD DD D
in in
D ss DD DD SS D
Case V V M off M onI I V V and V V I RCase V V M onM on
I II V V V R
Case V V M on M offI I V V and V V I R
7
From the previous slide we can see the output voltages are well defined within limit as well independent of input CM levelSmall signal gain is maximum at Vin1 =Vin2 i.e. circuit becomes more non linear as input voltage swing increases.
8
As we know adding current source to common emitter node suppress the effect of variation in CM level on operation of M1,M2 and output level
But for proper operation of device it have certain limitCurrent through M3 should be constantCase 1- When Vin is low => No current in circuitCase 2- When Vin > Vgs1 + (Vgs3 - Vth)Case 3- When Vin > VDD – RD(ISS/2) + Vth
CM level variation
9
THANK YOU