DESIGN AND SIMULATION OF DIFFERENT 8-BIT MULTIPLIERS USING VERILOG CODE

DESIGN AND SIMULATION OF DIFFERENT 8-BIT MULTIPLIERS USING VERILOG

CODE

BY

P. SAIKIRAN(12631A0469)M.SOUJANYA(12631A0488)S.VEERANNA(12631A04A7)N. SRINATH(12631A0496)

Under the Guidance of S. BALAIAH,M.Tech,(Ph.D)

Asso. Professor

1 Sri Venkateswara Engineering College

Sri Venkateswara Engineering College

Reasons for choosing this projectObjective of this project is to find a good multiplier to provide a

physically compact high speed and low power consumption unit.

Being a core part of arithmetic processing unit multipliers are in

extremely high demand on its speed and low power

consumption.

Multipliers play an important role in today’s digital signal

processing and various other applications.

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AIM

The main aim of this project is to design and simulation of

different 8-bit multipliers using VERILOG code

Considering their advantages and disadvantages these are

compared on the basis of area, speed and delay.

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ADDERS

In electronics, an adder is a digital circuit that performs

addition of two or more numbers.

Adders can be constructed for many numerical

representations, such as Binary-coded decimal or excess-3

Adders are different types in generally

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HALF ADDERThe half adder adds two single binary digits A and B.

It has two outputs, sum (S) and carry (C).

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FULL ADDERA full adder adds three one-bit numbers, often written as A, B,

and Cin.

A and B are the operands, and Cin is a bit carried in from the

previous less significant stage.

6Sri Venkateswara Engineering College


RIPPLE CARRY ADDER

• It is possible to create a logical circuit using multiple full adders to

add N-bit numbers.

• Each full adder inputs a Cin, which is the Cout of the previous adder.

This kind of adder is called a ripple-carry adder,

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CARRY SAVE ADDER

• If an adding circuit is to compute the sum of three or more numbers it

can be advantageous to not propagate the carry result.

• Instead, three input adders are used, generating two results a sum and a

carry.

• It is connected in vertically.

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MULTIPLICATIONMultiplication is a mathematical operation that at its

simplest is an abbreviated process of adding an integer

a specified number of times.

Multiplication of two k bit number needed multi

operand addition process that can be realized in k

cycles of shifting and addition with hardware,

firmware or software.

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MULTIPLICATION ALGORITHMIf the LSB of Multiplier is ‘1’, then add the multiplicand

into an accumulator.Shift the multiplier one bit to the right and multiplicand one

bit to the left.Stop when all bits of the multiplier are zero.

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CLASSIFICATION OF MULTIPLIERS

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USED MULTIPLIERS IN OUR PROJECT

Four multipliers used in our project:

Array multiplier

Wallace tree multiplier

Baugh wooley multiplier

Vedic multiplier

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ARRAY MULTIPLIER

An array multiplier is a digital combinational circuit

that is used for the multiplication of two binary

numbers by employing an array of full adders and half

adders.

Array multiplier is well known due to its regular structure.

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BLOCK DIAGRAM OF ARRAY MULTIPLIER



WALLACE TREE MULTIPLIER

The Wallace tree multiplier is considerably faster than a

simple array multiplier because its height is logarithmic in

word size, not linear.

As a result, Wallace trees are often avoided by designers,

while design complexity is a concern to them.

The Wallace tree multiplier is a high speed multiplier.

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BLOCK DIAGRAM OF WALLACE TREE MULTIPLIER



BAUGH WOOLEY MULTIPLIER

It is used for signed numbers multiplication

Baugh Wooley technique was developed to design direct

multipliers for two's complement numbers

When multiplying two's complement numbers directly,

each of the partial products to be added is a signed number.

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BLOCK DIAGRAM OF BAUGH WOOLEY MULTIPLIER



VEDIC MULTIPLIER

The multiplier is based on an algorithm URDHVA

TIRYAKBHYAM (Vertical & Crosswise) of ancient Indian

Vedic Mathematics.

URDHVA TIRYAKBHYAM SUTRA is a general

multiplication formula applicable to all cases of

multiplication.

It literally means “Vertically and crosswise”.

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BLOCK DIAGRAM OF VEDIC MULTIPLIER


MULTIPLICATION OF TWO NUMBERS

using vedic multiplier



LANGUAGE USED IN OUR PROJECT

Verilog :

It is a hardware description language (HDL) used to model

electronic systems. It is most commonly used in the design and

verification of digital circuits at the register-transfer

level of abstraction.

There are different types of level of abstractions like date flow,

behavioral, etc.

In our project use dataflow modeling.

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COMPARISON OF MULTIPLIERS

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SOFTWARE TOOLS USED IN OUR PROJECT

Simulation: Xilinx ISE 14.7

Synthesis: Xilinx ISE 14.7

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APPLICATIONS

It is used in DSP applications.

It is used for filters and Fourier transforms.

These multipliers tend to consume most power in DSP

computations.

Is also used in ALU.

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ADVANTAGES

Reduced wire length.

High clock rate.

Small area.

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DISADVANTAGES

Reducing delay needs additional circuitry which

increases the chip area

Complexity of the circuit increases to reduce the

critical path of the propagation delay time

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FUTURE SCOPE

As an attempt to develop arithmetic algorithm and

architecture level optimization techniques for low-power

multiplier design, the research presented in this

dissertation has achieved good results and demonstrated

the efficiency of high level optimization techniques.

However, there are limitations in our work and several

future research directions are possible.

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CONCLUSIONAfter putting lot of hard efforts, we learnt that Baugh

Wooley multiplier is superior in all respect like speed, delay,

area, complexity, power consumption.

However Array Multiplier requires more power consumption

Delay for Array multiplier is larger than Wallace Tree

Multiplier.

Hence for low power requirement and for less delay

requirement Baugh Wooley multiplier is suggested.

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BIBLOGRAPHY

References websites:

www.slideshare.com

en.wikipedia.org

Reference books:

Khatibzadeh and K. Raahemifar, “A study &

comparison of full adder cells based on the standard

static logic,”

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THANK YOU

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Quires..?

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