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EMI Analyst™
EMI ANALYST™ Software SuiteI n t u i ti v e A c c u r a t e E ff e c ti v e
How to use IBIS files in EMI Analyst™IBIS – Input/Output Buffer Information Specification
EMI Analyst™
What is an IBIS File?• IBIS is a standard for describing the analog behavior of digital device buffers
using plain ASCII text.• IBIS files are not really models, they contain data used for modeling. IBIS is really a
specification.• Simulation tools interpret IBIS specifications to implement their own models and
algorithms.• IBIS defines component properties in terms of behavior instead of circuitry.
• Spice models are limited to small signals.• IBIS covers entire operating range, plus clamping of over- and under voltage
transients, making it possible to model ringing that overshoots or undershoots.
• IBIS does not reflect the product’s interior logic and interactions, only the behavior of the circuits connected to the device pins.
EMI Analyst™
What Is Needed for an EMI Analyst™ Model?For example, LVDS circuit
Outputs DO+/DO-• Output Impedance
• Cpin, Rpin, Lpin• C_comp• Rout
• Rise/Fall Time Waveforms• Rising waveform• Falling waveform
Inputs RI+/RI-• Input Impedance
• Cpin, Rpin, Lpin• C_comp• Rin
EMI Analyst™
IBIS Output and Input ModelsVDD
Output +
Output -
GND
Input/Enable
Pins
Rising Ramp(V-t)
Pullup(V-I)
PowerClamp(V-I)
GroundClamp(V-I)
Pull-Down(V-I)
FallingRamp(V-t)
InternalLogic
VDD
Out Pin
GND
C_comp
C_comp
Lpin Rpin Cpin
Lpin Rpin Cpin
Lpin Rpin Cpin
PowerClamp(V-I)
GroundClamp(V-I)
InternalLogic
VDD
In Pin
GND
C_comp
C_comp
LpinRpinCpin
LpinRpinCpin
LpinRpinCpin
VDD
Input +
GND
OutputPin
Input -
EMI Analyst™
Pin Parasitics – Rpin, Lpin, Cpin• Outputs
• Inputs
Out PinC_comp
Lpin Rpin Cpin
C_comp
LpinRpinCpin
In Pin
EMI Analyst™
Output Model Input ModelDO+, DO- RI+, RI-
EMI Analyst™
LVDS Waveform Specs• Constant current: 4.0 mA nom.• Some mfg. use 3.5 mA
• Char. Z: 100 ohms nom.• Output voltage: ±400 mV nom.• Offset voltage: 1.2V (Vref)• VOH = 1.4V, VOL = 1.0V
• Rcvr input threshold voltage: ±100 mV nom.• Rcvr max. CM voltage: ±1V min.
EMI Analyst™
Output Impedance and Input ImpedanceOutput Z from datasheet
Rout = 58 ohms (350 mV / 6 mA)?
Input Z from datasheet
Rin = 2.4 Mohm (2.4V / 1uA)? = 240 kohm (2.4V / 10 uA)?
Input and output impedance change dynamically with signal amplitudeFrom IBIS model, output impedance is about 230 ohms in operating range
EMI Analyst™
Pullup CurveI-V curve for VOH
Rising Ramp(V-t)
Pullup(V-I)
PowerClamp(V-I)
GroundClamp(V-I)
Pull-Down(V-I)
FallingRamp(V-t)
InternalLogic
VDD
Out Pin
GND
C_comp
C_comp
Lpin Rpin Cpin
Lpin Rpin Cpin
Lpin Rpin Cpin
EMI Analyst™
Pulldown CurveI-V curve for VOL
Rising Ramp(V-t)
Pullup(V-I)
PowerClamp(V-I)
GroundClamp(V-I)
Pull-Down(V-I)
FallingRamp(V-t)
InternalLogic
VDD
Out Pin
GND
C_comp
C_comp
Lpin Rpin Cpin
Lpin Rpin Cpin
Lpin Rpin Cpin
EMI Analyst™
Output Model – Power ClampI-V curve when output pin is pulled above VCC
Rising Ramp(V-t)
Pullup(V-I)
PowerClamp(V-I)
GroundClamp(V-I)
Pull-Down(V-I)
FallingRamp(V-t)
InternalLogic
VDD
Out Pin
GND
C_comp
C_comp
Lpin Rpin Cpin
Lpin Rpin Cpin
Lpin Rpin Cpin
EMI Analyst™
Rising Ramp(V-t)
Pullup(V-I)
PowerClamp(V-I)
GroundClamp(V-I)
Pull-Down(V-I)
FallingRamp(V-t)
InternalLogic
VDD
Out Pin
GND
C_comp
C_comp
Lpin Rpin Cpin
Lpin Rpin Cpin
Lpin Rpin Cpin
Output Model – Ground ClampI-V curve when output pin is pulled below GND
EMI Analyst™
Output Model – Rising Waveform20% - 80% (1.08V – 1.32V): 700 ps
Rising Ramp(V-t)
Pullup(V-I)
PowerClamp(V-I)
GroundClamp(V-I)
Pull-Down(V-I)
FallingRamp(V-t)
InternalLogic
VDD
Out Pin
GND
C_comp
C_comp
Lpin Rpin Cpin
Lpin Rpin Cpin
Lpin Rpin Cpin
EMI Analyst™
Output Model – Falling Waveform80% - 20% (1.32V – 1.08V): 390 nsec
Rising Ramp(V-t)
Pullup(V-I)
PowerClamp(V-I)
GroundClamp(V-I)
Pull-Down(V-I)
FallingRamp(V-t)
InternalLogic
VDD
Out Pin
GND
C_comp
C_comp
Lpin Rpin Cpin
Lpin Rpin Cpin
Lpin Rpin Cpin
EMI Analyst™
DM Waveform from IBIS FileCreate data file from IBIS values and import into EMI Analyst™ Source form.
EMI Analyst™
Input Model – Power ClampI-V curve when input pin is pulled above VCC
EMI Analyst™
Input Model – Ground ClampI-V curve when input pin is pulled below GND
EMI Analyst™
LVDS Circuit and Equivalent ModelLVDS Circuit Model
Equivalent Circuit from IBIS File and Datasheet
DO+
DO-
RI+
RI-
100
Ω
50m1.05193n
0.16890p
58
50m1.05308n
0.16861p
58
DO+
DO-
RI+
RI-
100
Ω
50m 1.05193n
0.16890p
240k
50m 1.64135n
0.37335p
240k
4.13p
4.13p
3.56P
3.56P
Z0 = 100 Ω
1p
EMI Analyst™
Predicted Radiated Emissions for Shielded LVDS Cable with no Common Mode Voltage
EMI Analyst™
References• The IBIS model, Part 1: A conduit into signal-integrity analysis
http://www.ti.com/lit/an/slyt390/slyt390.pdf• The IBIS model, Part 2: Determining the total quality of an IBIS model
http://www.ti.com/lit/an/slyt400/slyt400.pdf• The IBIS model, Part 3: Using IBIS models to investigate signal-integrity issues
http://www.ti.com/lit/an/slyt413/slyt413.pdf• IBIS reader: https://www.mentor.com/pcb/downloads/visual_ibis_editor/