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Table of Contents Preface 9 . Introduction 11 Goals of This Book 11 Target Audience 11 What to Expect 12 Typeface Conventions 13 2. Verilog HDL 15 Overview 15 Data Types and Their Use 15 Bit Widths and Labeling 17 Logical Operations 18 Arithmetic Operations 22 Conditional Statements 23 Case Statements 25 Procedural Statements 27 Design Hierarchy 31 The Power of `define 33 Conditional Compilation 36 Aggregating Files with `include 38 3. Verilog Coding Style 41 Importance of Coding Style 41 Files Versus Modules 41 Indentation 42 Naming Conventions 43 Inputs, Outputs and Variables 44 Comments and More Comments 46 Overall Design Organization 49

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Page 1: Contents microprocessordesignusingverilog hdl

Table of Contents

Preface 9

�. Introduction 11

Goals of This Book 11

Target Audience 11

What to Expect 12

Typeface Conventions 13

2. Verilog HDL 15

Overview 15

Data Types and Their Use 15

Bit Widths and Labeling 17

Logical Operations 18

Arithmetic Operations 22

Conditional Statements 23

Case Statements 25

Procedural Statements 27

Design Hierarchy 31

The Power of `define 33

Conditional Compilation 36

Aggregating Files with `include 38

3. Verilog Coding Style 41

Importance of Coding Style 41

Files Versus Modules 41

Indentation 42

Naming Conventions 43

Inputs, Outputs and Variables 44

Comments and More Comments 46

Overall Design Organization 49

Page 2: Contents microprocessordesignusingverilog hdl

�. Initial Design Work 53

Introduction 53

Instruction Set Architecture 53

External Bus Interface 72

Machine Cycle 77

�. Microarchitecture 79

Introduction 79

Organizing the Design Spreadsheet 79

The Operation Worksheet 80

The Internal Code Worksheet 99

The Big Picture 103

Machine Cycle details 106

The Next State Worksheet 110

When to Add a Worksheet 122

The Tran Stat Worksheet 124

The Address Bus Worksheet 126

The Pre-address Worksheet 126

The Load PC Worksheet 128

The DinDout Worksheet 132

The ALU Op, ALU A, and ALU B Worksheets 136 The Register Wr Worksheet 166

The S flag Worksheet 172

The Z flag Worksheet 173

The H flag Worksheet 174

The PV flag Worksheet 177

The N flag Worksheet 181

The C flag Worksheet 184

The T flag Worksheet 186

The Special Case Worksheet 188

�. Writing the Verilog 191

Introduction 191

Thedefines.vfile 192

Thehierarchy.vfile 207

The machine.v module 208

The extint.v module 211

The aluamux.v module 215

The alubmux.v module 219

Contents

Page 3: Contents microprocessordesignusingverilog hdl

The alu_math.v module 222

The alu_log.v module 226

The alu_shft.v module 228

The aluout.v module 231

The datapath.v module 235

The control.v module 256

The y80_top.v module 293

�. Debug, Verification and Testing 295

Introduction 295

Debug Requirements 295

VerificationRequirements 296

Testing Requirements 298

The Testbench 299

8. It’s Finally Done. Now what? 319

Introduction 319

The Details 319

Enhancements 320

Index 322

Appendix 328

Figures 328

Listings 332

Tables 335

Resources/Bibliography 337

Contents