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The COREMA system allow for non-destructive resistivity testing of semi-insulating wafers made with materials such as SiC, GaN, GaAs and CdZnTe. The range is 1E5- 1E12 ohm-cm.
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Page 2
SemiMap Objective
To provide innovative analytic tools for
• absolute
• rapid
• laterally resolved
• nondestructive
• precise
• low cost
evaluation of the electrical properties of compound semiconductor substrates for
• production control
• material development
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Worldwide Representation
Europe US and East Asia Japan
SemiMap Scientific InstrumentsTullastr. 6779108 Freiburg GermanyPhone: *49(0)761 5577878Fax: *49(0)761 5577 879
Hologenix, Inc.5932 Bolsa Avenue Suite 104Huntington Beach CA 92649 USAPhone: (714) 903-5999 Fax: (714) 903-5959
Moritani & Co.,Ltd.1-4-22 YaesuChuo-KuTokyo 103-8680JapanPhone: 81-3-3278-6163Fax: [email protected]
Page 4
SemiMap pre-History
1989 Start of research activity at FhG-IAF to evaluate high resistivity semiconductors with contactless capacitive techniques (TDCM)
1991 Basic paper by Stibal, Windscheif and Jantz; Delivery of prototype wafer topography system to Wacker Chemitronic, later transferred to Freiberger Compound Materials (FCM)
1992 - 97 Multi- purpose application of TDCM for in-house research and material control; extensive presentation and publication activity; development of commercial system
1998 Representation in US/Japan/Asia by Hologenix Inc., Los Angeles
1998-2003 Sale of COREMA-WT systems to industry and academia in Europe, US and Japan
since 1990 Strong involvement in DIN/SEMI compound semiconductor standardization activities
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SemiMap History
April 2003 Foundation of Semimap Scientific Instruments GmbH, transfer of technical know how and fabrication from FhG/IAF to SemiMap
July 2003 First SemiMap COREMA-WT sale, development and market introduction of COREMA-RM
2004 Extension of material analysis to SiC, InP, GaN, Cd(Zn)Te, FZ-Si
2005 Development and market introduction of CORTEMA-VT/ER
2006 Cooperation with Moritani & Co Ltd. Tokyo, JapanDevelopment of procedures to analyse locally inhomogeneous material
2007 Participation in SiC resistivity Round Robin, Presentations at ICSCRM in Otsu, Japan
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Basics of COntactless REsistivity MApping (I)
Rs = d/A
Cs = 0 A/d
RsCs= 0
dA
Semi-insulating semiconductor
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Basics of COntactless REsistivity MApping (II)
Capacitive probe
chuck
waferguard
electrode
1 mm
measured volume
air gap
Equivalent circuit
= Rs(Cs+Ca)
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Basics of COntactless REsistivity MApping (III)
Equivalent circuit
U
= Rs (Cs+Ca)
Charge transient after voltage step application
0
¥
tt0
Q
Q
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Basics of COntactless REsistivity MApping (IV)
Evaluation of electrical material properties
Resistivity = Q0 (Q 0) -1
Mobility µ = 1/B [ (B) / (0) - 1] ½
Activation energy Ea = (kT1T2)/(T2-T1) * ln [(T1) / (T2)]
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SemiMap Product Line
COREMA-WT Contactless mapping of wafers up to 200 mm ø1mm resolution; resistivity range 1x105 to 1x1012 cm, automated measurement routines, statistical analysis.
COREMA-RM Contactless evaluation of the carrier mobility (>1000 cm2/Vs) manual wafer shifting for selection of measurement spot.
COREMA-VT Measurement of resistivity at variable temperature up to 400 oC, evaluation of carrier activation energy via Arrhenius plot
COREMA-ER Measurement of sheet resistance (>105 of epitaxial buffer layers
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Technical Details (I) COREMA - WT
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Technical Details (II) COREMA - WT
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Technical Details (III) COREMA - WT
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Technical Details (I) COREMA - RM
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Permanent Magnet System Design
Arrangement of Magnets Horizontal Field Component
0 5 10 15 20 25 300
2
4
6
8
10
1 mm
Ma
gn
etic
Fie
ld B
(1
0-1T
)
Horizontal Distance (mm)
M
M
B
Technical Details (II) COREMA-RM
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Technical Details (III) COREMA-RM
Magnetic Field
Ch
arg
e Q
(a.
u.)
Tim e t0 B B0
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Technical Details (IV) COREMA-RM
• Probe diameter 1 mm
• Sample diameter 10 mm – 100 mm
• Manual loading
• Free choice of measurement position
• Mobility > 1000 cm2/Vs
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Technical Details (V) COREMA-RM
ISSUE CONVENTIONAL HALL COREMA - RM
Wafer cutting necessary nondestructive
Ohmic contacts needed, critical obsolete
Sample preparation ~ 15 min none
Sample insertion and measurement time
~ 10 min ~ 30 s
Repeatability ~ 5% < 1%
Evaluation of SI material
difficult easy
Applicability general SI material onlyµ > 1000 cm2/Vs
Acceptance standard method new method
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Technical Details (I) COREMA-VT
Substrate
Heated SupportSensor
Charge Amplifier
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Technical Details (II) COREMA-VT
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Technical Details (III) COREMA-VT
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Technical Details (IV) COREMA - VT
System designed to evaluate resistivity at Variable Temperature
• Temperature range 300 K – 673 K (RT – 400 C)
• Resistivity range 2 x 10 5 – 2 x 10 11 Ωcm
• High temperature capacitive probe design
• Probe diameter 8 mm
• Sample diameter 10 mm – 100 mm
• Manual loading
• Free choice of measurement position
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Technical Details (I) COREMA-ER
Buffer layers on semi-insulating substrates are analysed with a COREMA-VT harware system using a modified measurement and evaluation procedure. The epilayer resistance is obtained using a calibration factor depending on the design and size of the sensor. The epilayer resistivity is calulated using the layer thickness.
Epilayer
Substrate
SupportSensor
Charge Amplifier
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COREMA-ER (II) Applicability
The procedure is designed to measure thin epitaxial layers with intermediate resistivity, grown on high resistivity substrates.
The most important application presently appears to be the control and analysis of GaN buffer layers on SiC or Sapphire.
The procedure is not applicable to evaluate conducting layers, as used in active devices (e.g. HEMTs).
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COREMA-ER (III) Measurement Range
Presently layers with a resistance from 1x 105 Ω to 1x 1011 Ω can be measured.
Consequently, for a typical layer thickness of 1 µm, the measurable resistivity range is 10 Ωcm to 107 Ωcm. The range shifts to lower (higher) resistivity for thinner (thicker) layers.
As a side condition, the substrate resistance must be large compared to the layer resistance. For a 1µm layer this means that the substrate resistivity must exceed the layer resistivity by a factor of about 104. This condition can be relaxed if the substrate resistance is known and taken into account in the analysis.
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Resistivity Topography GaAs Substrate Production Control
150 mm GaAs wafer
Mean: 3.96x107 cm
Stdv: 4.3 %
Radial variation
Fourfold symmetry
Dislocation network
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Resistivity Topography Repeatability test
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Resistivity Topography GaAs Substrate Production Control
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Resistivity Topography InP Substrate Production Control
100 mm InP wafer
1.5 x105 - 4.7 x107 cm
Mean: 1.6 x107 cm
Stdv: 31%
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Resistivity Topography SiC Substrate Production Control
2“ SiC wafer
2.1 x1011 - 4.1 x1011 cm
Mean: 2.8 x1011 cm
Stdv: 15%
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Resistivity Topography Exploratory SiC Material Development
2“ SiC wafer
1.1 x106 – 1.0 x 1011 cm
Blue areaBlue area below 105 cm
Pink areaPink area above 1012 cm
Rapid order-of-magnitude fluctuations
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Resistivity Topography Strongly and locally inhomogeneous SiC material
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Identification and evaluation of locally inhomogeneous matertial using analysis of charge transients
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0.0 0.5 1.0 1.5 2.0 2.5 3.00.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
(d)
Data: S061045POS0_BModel: ExpAssoc Chi^2 = 4.7769E-6R^2 = 0.9993 y0 0.46455 ±0.00089A1 0.28620 ±0.00168t1 0.16342 ±0.00161A2 0.18017 ±0.00085t2 1.47382 ±0.04228
y = y0 + A1*(1 - exp(-x/t1)) + A2*(1 - exp(-x/t2))
Sig
na
l (V
)
Time (sec)
Bi-exponential fit
cm
cm
11
2
111
1086.3
1014.1
Page 35
Resistivity Topography Analysis of Persistent Photoconductivity
Mean: 1.12 x1010 cm Mean: 1.65 x1011 cm
Resistivity after 3h storage in darkness Resistivity after 48h storage in darkness
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Resistivity Topography CdTe sample
Page 37
Magnetic Field Dependence of Resistivity
Drude formula:
(B) = (0) [1 + (µB)2] –1
Expected dependence:
(B) = (0) [1 + (µB)2]
Expected dependence:
(B) = (0) [1 + (µB)2]
0.0 0.2 0.4 0.6 0.8 1.080
85
90
95
100
105
110
115
120
125
130
135
Tim
e C
on
sta
nt
(µ
s)
Magnetic Field B (Tesla)
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Comparison of mobility data
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Mobility Measurement Plan
Mobility evaluation using a customer specified
measurement plan
150 mm GaAs wafer
Page 40
High Temperature Resistivity Measurement
2“ SiC wafer
Temperature range
40 – 200 0C
Resistivity range 3x105 – 1x1010 Ωcm
Not semi-insulating at 300 0C
Ea = (kT1T2)/(T2-T1) * ln [(T1) / (T2)]
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High Temperature Resistivity Measurement
2“ SiC wafer
Temperature range
260 – 340 0C
Resistivity range
5.6 x109 – 1.8x1011 Ωcm
Semi-insulating at 300 0C
Page 42
Lateral dependence of activation energy
2.5 2.6 2.7 2.8 2.9 3.0 3.1 3.2 3.3106
107
108
109
1010
1011
1012
Rh
o (
Oh
m*c
m)
1/Temperature (1000/K)
Position 1: Ea = 805 eV
Position 2: Ea = 830 eV
120 100 80 60 40Temperature (°C)
Page 43
Arrhenius Plot of exploratory Wafer
1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4107
108
109
1010
1011
Rh
o (
Oh
m*c
m)
1/Temperature (1000/K)
350 300 250 200 150 100 50
Ea = 950 meV
Ea = 250 meV
Temperature (°C)
Page 44
High Temperature Resistivity Measurement
2“ SiC wafer
Temperature range 92 – 256 0C
Resistivity range 9.0 x108 – 2.3x1010 Ωcm
High resistivity, but small activation energy
Exhibits strong persistent photoconductivity
Page 45
Persistent Photoconductivity Heating Curve
1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4107
108
109
1010
1011
Rho
(O
hm*c
m)
1/Temperature (1000/K)
350 300 250 200 150 100 50
Heating
Temperature (°C)
Page 46
Evaluation of GaN epitaxial layers
Epilayer thickness
(µm)
ResistanceSemiMap
(Ω square)
Resistivity SemiMap
(Ω cm)
Resistance Lehighton(Ω square)
2 6.05 E6 1.2 E 3 beyond limit
2 5.0 E4 (at lower limit) 1.0 E 1 5 E4 (at upper limit)
2 1.0 E11(at upper limit) 2.0 E 7 beyond limit
Page 47
Summary
• COREMA-WT resistivity topography is used extensively by industry and academia labs for routine wafer quality control and exploratory material analysis of GaAs, InP, SiC, CdT and GaN wafers.
• COREMA-RM evaluates the mobility of GaAs and InP wafers, based on magnetoresistance, completely replacing the standard Hall technique
• COREMA-VT measures resistivity at variable temperature up to 650K to confirm high temperature specifications, to evaluate locally the activation energy and to study persistent conductivity.
• COREMA-ER measures the resistance of epitaxial buffer layers in the range 1E5 to 1E11 Ohm.
