ECE 420-Embedded DSP Laboratory

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ECE 420- Embedded DSP LaboratoryLecture 1 โ€“ Course Overview & Audio Processing

Thomas MoonJanuary 27, 2020

D S Pigital ignal rocessing

-signal processing done by โ€œcomputerโ€

Signalsspeech/acoustic signalsmotion signals

images videos

Signals

RF signals

seismic signals stock prices

Extract useful information from the signal

filtering

low-pass filter

high-pass filter

Signal Processing

transforming

Signal Processing

Fourier Transform (FT) Wavelet Transform

modulation & demodulation

Signal Processing

frequency conversion

0 ๐‘“#โˆ’๐‘“#

0 ๐ตโˆ’๐ต

Baseband

Passband

โˆ’3 +3+1โˆ’1

โˆ’3

+3

+1

โˆ’1

๐ผ

๐‘„

16 QAM signal

Digital Signal Processingsampling

t

ADC DAC

t

โ€ข โ€ข โ€ข

Analog Digital Analog

Why DSP?

โ€ข Digital circuits are less sensitive to external parameters (temperature, aging, etc).

โ€ข Easy to adjust system characteristics (ex: changing filter response).

โ€ข Digital signal can be stored almost indefinitely.

โ€ข More suitable to process low-frequency signals.

Why DSP?

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In this course:โ€ข Implement the fundamental DSP concepts from

ECE 310.โ€ข Learn to prototype & implement real-time DSP

systems.

Embedded Digital Signal Processing

10

How we learn:โ€ข Work with hardware.โ€ข Run practical experiment.

But, we will not build real-time DSP systems from scratch. ร  Not a circuit course!

Embedded Digital Signal Processing

11

We will use Android Tablet!

โ€ข CPU: 2.2 GHz ARM Cortex A15โ€ข GPU: 192 core Keplerโ€ข RAM: 2 GBโ€ข Display: 8-inch 1920x1200 multi-touch Full-HD displayโ€ข Motion sensors: 3-axis gyro, 3-axis accelerometer, 3-axis compassโ€ข Cameras: Front 5MP HDR, Back 5MP auto-focus HDRโ€ข Stereo speakers & microphone

NVIDIA SHIELD Tablets

โ€ข CPU: 2.2 GHz ARM Cortex A15โ€ข GPU: 192 core Keplerโ€ข RAM: 2 GBโ€ข Display: 8-inch 1920x1200 multi-touch Full-HD displayโ€ข Motion sensors: 3-axis gyro, 3-axis accelerometer, 3-axis compassโ€ข Cameras: Front 5MP HDR, Back 5MP auto-focus HDRโ€ข Stereo speakers & microphone

NVIDIA SHIELD Tablets

YOU are responsible for the tablets.Please, use it carefully!

Software Tools You Need

PyCharm & Jupyterโ€ข run python script for simulation.

Android Studioโ€ข Upload algorithms into

Android platform.

1. Develop & Test DSP algorithms in high-level languages (Python or MATLAB)

โ€ข More rapid developmentโ€ข Test/training signals available โ€ข Provide a reference against embedded

implementation

2. Port tested algorithms into embedded platform

Basic Practice in Developing DSP Software

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prelab + lab (1/2)

lab (2/2)

โ€ข Webpage: https://courses.engr.illinois.edu/ece420/sp2020

โ€ข Lectures: Mondays 2:00-2:50PM, 4070 ECEBโ€ข Learn theory/concept for the associated labโ€ข Come to lecture and ask questions

โ€ข Labs: 5072 ECEBโ€ข ABA: 2:00-3:50 Tueโ€ข ABC: 2:00-3:50 Wedโ€ข ABD: 2:00-3:50 Thuโ€ข ABE: 2:00-3:50 Fri

โ€ข TAsโ€ข Dimitrios Gotsisโ€ข Spencer Markowitz

Course Info

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โ€ข Prerequisite: ECE 310(We assume you know basic DSP concepts!)

Course Timeline

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Backgroundfor Labs

Special Topics/ Guest Lectures

Final Quiz

Structured Labs

Assigned Project

Final Project Demo

Final Project

Lecture Labst = 0

t = End of Semester

โ€ข First half: 7 Structured Labs

โ€ข Embedded DSP development frameworkโ€ข High-level (Python) ร  Embedded (Android with Java/C)

โ€ข Different signal modalities and interfaces: IMU, audio, visual

โ€ข Basic DSP algorithmsโ€ข Digital filtering (lab2)โ€ข Spectral analysis (lab3)โ€ข Auto-correlation analysis: pitch detection/correction (lab4,5)โ€ข Image and multidimensional signal processing (lab6,7)

Course Overview

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โ€ข First half: 7 Structured Labs - Format

โ€ข Prelab [Individual]โ€ข Complete individually prior to lab, submit to TA

โ€ข Quiz [Individual]โ€ข Overview of concepts from previous lecture & lab

โ€ข Demo [Group]โ€ข Demonstrate work from previous week to TA, answer questions

โ€ข Lab work [Group]

Please refer to โ€œSubmission Instructionโ€ page for details.

Course Overview

โ€ข Second half: โ€˜Student Choiceโ€™ Group Projects (subj. to approval)

โ€ข Start with an Assigned Project Labโ€ข Explore implementation of a DSP algorithm from the literatureโ€ข In Python, 2-week durationโ€ข Jumping off point for the Final Project

โ€ข Final projectโ€ข Proposal and Design Reviewโ€ข Deliverable, 2 weekly milestones, validation and test planโ€ข Final Project Demo and Presentationโ€ข Final Report (and optional Video)

โ€ข Recommended not to wait until week 7 to start exploring options

Course Overview

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โ€ข Gradingโ€ข Structured Labs โ€“ 40%โ€ข Assigned Project Lab โ€“ 15%โ€ข Final Project โ€“ 40%โ€ข Final Quiz โ€“ 5%

โ€ข We use Gradescope for grading. If you are not invited, please contact us.

โ€ข Office hourโ€ข TA Dimitrios Gotsis: Thursday 1-2pm, Friday 11am-2pm.โ€ข Piazza

Course Overview

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โ€ข Goal: 1. Sample audio signals,2. Perform digital-filtering (notch filter),3. Generate a filtered sound.

Lab2 โ€“ Audio Filtering

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Sampling Digital Filtering+

Sampling

23

Ts

ADC

๐‘ฅ- ๐‘ก ๐‘ฅ[๐‘›]๐‘ฅ ๐‘› = ๐‘ฅ-(๐‘›๐‘‡5)

How/when can we reconstruct ๐‘ฅ- ๐‘กperfectly from ๐‘ฅ[๐‘›]?

๐‘›๐‘ก

Ts

DAC

๐‘ฅ[๐‘›]

๐‘›

๐‘ฅ- ๐‘ก๐‘ก

24

๐‘‹- ๐‘—ฮฉ = :;<

<๐‘ฅ- ๐‘ก ๐‘’;>?@๐‘‘๐‘ก

0 ๐ตโˆ’๐ต

๐‘‹- ๐‘—ฮฉ

ฮฉ = 2๐œ‹๐‘“

To avoid the overlap, ๐ต < EFG

(or ๐‘“ < HIFG

)

Nyquist rate : ๐นK =HFG> 2๐‘“

CTFT

๐‘‹ ๐‘—๐œ” =N;<

<

๐‘ฅ ๐‘› ๐‘’;>OP

0 ๐ต๐‘‡5โˆ’๐ต๐‘‡5

๐‘‹ ๐‘—๐œ”

๐œ”2๐œ‹โˆ’2๐œ‹

๐œ‹

1. Scale by Ts

2. Periodic by 2๐œ‹

โ€ข โ€ข โ€ขโ€ข โ€ข โ€ข

DTFT

Audio Signal

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0๐ต = 2๐œ‹ Q 20๐‘˜๐ป๐‘ง

โˆ’๐ต

๐‘‹- ๐‘—ฮฉ

ฮฉ = 2๐œ‹๐‘“

Highest frequency audible by humans

Hence, the sampling rate we need is HFG> 2 Q 20๐‘˜๐ป๐‘ง = 40๐‘˜๐ป๐‘ง

We will use 48kHz sampling rate.

๐‘‹- ๐‘—ฮฉ = :;<

<๐‘ฅ- ๐‘ก ๐‘’;>?@๐‘‘๐‘ก

0 ๐ตโˆ’๐ต

๐‘‹- ๐‘—ฮฉ

ฮฉ = 2๐œ‹๐‘“

CTFT

โˆ’๐ต๐‘‡5 ๐œ”2๐œ‹โˆ’2๐œ‹

๐‘‹ ๐‘—๐œ” =N;<

<

๐‘ฅ ๐‘› ๐‘’;>OP

0 ๐ต๐‘‡5

๐‘‹ ๐‘—๐œ”๐œ‹

โ€ข โ€ข โ€ขโ€ข โ€ข โ€ข

DTFT

0

๐‘‹[๐‘˜]

๐‘‹[๐‘˜] = NPVW

X;H

๐‘ฅ ๐‘› ๐‘’;>IEYP/X

DFT

๐‘ โˆ’ 1

CTFT vs DTFT vs DFT

0 ๐ตโˆ’๐ต

๐‘‹- ๐‘—ฮฉ

ฮฉ = 2๐œ‹๐‘“

0 ๐ต๐‘‡5โˆ’๐ต๐‘‡5

๐‘‹ ๐‘—๐œ”

๐œ”2๐œ‹โˆ’2๐œ‹

๐œ‹

โ€ข โ€ข โ€ขโ€ข โ€ข โ€ข

CTFT

DTFT

0

๐‘‹[๐‘˜] DFT

๐‘ โˆ’ 1

Relation

3rd DFT bin

๐œ”?

๐‘“?

Given ๐‘‡5, ๐‘

0 ๐ตโˆ’๐ต

๐‘‹- ๐‘—ฮฉ

ฮฉ = 2๐œ‹๐‘“

0 ๐ต๐‘‡5โˆ’๐ต๐‘‡5

๐‘‹ ๐‘—๐œ”

๐œ”2๐œ‹โˆ’2๐œ‹

๐œ‹

โ€ข โ€ข โ€ขโ€ข โ€ข โ€ข

CTFT

DTFT

0

๐‘‹[๐‘˜] DFT

๐‘ โˆ’ 1

Relation

k?

๐œ”?

10.3๐‘˜๐ป๐‘ง

Given ๐‘‡5, ๐‘

0 ๐ตโˆ’๐ต

๐‘‹- ๐‘—ฮฉ

ฮฉ = 2๐œ‹๐‘“

0 ๐ต๐‘‡5โˆ’๐ต๐‘‡5

๐‘‹ ๐‘—๐œ”

๐œ”2๐œ‹โˆ’2๐œ‹

๐œ‹

โ€ข โ€ข โ€ขโ€ข โ€ข โ€ข

CTFT

DTFT

0

๐‘‹[๐‘˜] DFT

๐‘ โˆ’ 1

Relation

2๐œ‹๐‘“๐‘‡ = ๐œ”

๐‘“๐น5=

๐œ”2๐œ‹

๐œ”2๐œ‹

=๐‘˜๐‘

๐‘“๐น5=

๐œ”2๐œ‹

=๐‘˜๐‘

Digital Filter

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+

+

+

๐‘ฅ[๐‘›] ๐‘ฆ[๐‘›]

๐‘;H

๐‘;H

๐‘;H

๐‘;H

๐‘W

๐‘H

๐‘I

โˆ’๐‘ŽH

โˆ’๐‘ŽI

โ€ข โ€ข โ€ข

โ€ข โ€ข โ€ข

๐‘ฆ ๐‘› = ๐‘W๐‘ฅ ๐‘› + ๐‘H ๐‘› โˆ’ 1 +โ‹ฏ+ ๐‘c๐‘ฅ ๐‘› โˆ’ ๐พ โˆ’ (๐‘ŽH๐‘ฆ ๐‘› โˆ’ 1 +โ‹ฏ+ ๐‘Že๐‘ฆ ๐‘› โˆ’ ๐ฟ )

โ€ข L = 0, FIRโ€ข L > 0, IIR

Examples of Filters

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Low-pass High-pass

Band-stop Band-pass

Ramp

โ€ข Large N (filter order)โ˜บ Close to desired responseโ˜บ Sharper transitionโ˜บ Less ripplesโ˜น More

computation/memoryโ˜น Longer delay

Filter Design Spec

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โ€ข FIR vs IIRโ˜บ Stableโ˜บ Linear phaseโ˜น Worse magnitude

response with same order

โ€ข In lab2, we will implement the convolution using a circular buffer and process sample-by-sample.

Convolution

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๐‘ฆ ๐‘› = NYV;<

<

โ„Ž ๐‘˜ ๐‘ฅ[๐‘› โˆ’ ๐‘˜]

๐‘ฆ ๐‘› = NYVW

c

โ„Ž ๐‘˜ ๐‘ฅ[๐‘› โˆ’ ๐‘˜] FIR filter (causal)

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