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Lettershttps://doi.org/10.1038/s41565-020-0727-0
Room-temperature valleytronic transistorLingfei Li1,2,5, Lei Shao3,5, Xiaowei Liu4, Anyuan Gao4, Hao Wang 3, Binjie Zheng1, Guozhi Hou1, Khurram Shehzad 2, Linwei Yu 1, Feng Miao 4, Yi Shi 1, Yang Xu 2 ✉ and Xiaomu Wang 1 ✉
1School of Electronic Science and Engineering, Nanjing University, Nanjing, China. 2Colleges of ISEE and Microelectronics, ZJU-Hangzhou Global Scientific and Technological Innovation Center, ZJU-UIUC Institute, State Key Labs of Silicon Materials and Modern Optical Instruments, Zhejiang University, Hangzhou, China. 3Beijing Computational Science Research Centre, Beijing, China. 4School of Physics, Nanjing University, Nanjing, China. 5These authors contributed equally: Lingfei Li, Lei Shao. ✉e-mail: yangxu-isee@zju.edu.cn; xiaomu.wang@nju.edu.cn
SUPPLEMENTARY INFORMATION
In the format provided by the authors and unedited.
NAtuRe NANotecHNoLoGY | www.nature.com/naturenanotechnology
1
Supplementary Materials for
Room-temperature Valleytronic Transistor
Lingfei Li, Lei Shao, Xiaowei Liu, Anyuan Gao, Hao Wang, Binjie Zheng, Guozhi Hou,
Khurram Shehzad, Linwei Yu, Feng Miao, Yi Shi, Yang Xu, Xiaomu Wang
1
Supplementary Text
1. Optical chirality for antenna/electrode coupling.
The coupling between nano-antenna/electrode system determines the final circular dichroism
(CD) spectra. We have plotted the distribution of local optical chirality at the plane of MoS2 under
the experimental condition: an 1550-nm laser polarized along the vertical direction (y axis) is
employed for illumination and the nanoantennae are placed close to the Au electrodes in different
manners, as suggested by the scanning electron microscope images in Figure 2c in the main text.
Figure S1 shows the local optical chirality map for different antenna orientations. Larger absolute
average values of optical chirality enhancement 𝐶̅ are observed in two configurations: “head (or
end) to electrode” and “tail (or tip) to electrode”, and they are of different signs. This is because
the chirality “hot spots” locate mainly at “head” and “tail” ends and the different coupling
configuration will change the local chirality largely. The “head (or end) to electrode” and “tail (or
tip) to electrode” configurations dominate the value of 𝐶̅ at different electrodes separately. Adding
the other two configurations into consideration will not change the main result. Noticing that, in
the calculation, we have considered the contribution from all parts of the nano-antenna. The sign
of 𝐶̅ is determined by which end is nearer (e.g. in the head to electrode configuration, “head” is
always nearer to the electrode than the “tail”). As Figure S1 shows, the “head (or end) to electrode”
configuration gives a negative 𝐶̅ = −0.4558 (gap = 10 nm) while all other coupling configurations
give positive 𝐶̅ values. Among them, the “tail (or tip) to electrode” configuration presents much
larger 𝐶̅ (= 0.6139, Figure S1).
2
Moreover, we also plot the CD spectra obtained as the difference between the RCP and LCP
absorption spectra for the nanoantennae coupled with the electrode (Figure S2). The calculated
circular dichroism spectra exhibit results in consistence with the local optical chirality analysis.
Accordingly, the “head (or end) to electrode” configuration gives major absorption by the antenna
at 1550-nm RCP illumination while the “tail (or tip) to electrode” configuration gives major
absorption by the antenna at LCP.
We also consider the effect of gap distance. The value of 𝐶̅ and the absorption difference
between RCP and LCP at 1550 nm depends on the gap distance, but its sign is unchanged when
the gap is not too large. This observation is consistent with the experimental results. In this scenario,
the alignment method presents equidirectional net optical chirality although the absolute value
may change from sample to sample.
2. Hot carrier injection and band filter effect.
We use an infrared laser with photon energy deeply below the band gap of MoS2. As a result,
photo-carriers in equilibrium states cannot be injected into MoS2 due to the large energy barrier
between its band edges and the photo-excitation carriers, as illustrated in the top panel of the Fig.
2a. On the other hand, the hot carriers obey a modified Fermi-Dirac distribution f(E)=1/(exp(-(E-
EF)/kTc)+1), in which a higher carrier equivalent temperature Tc replaces the lattice temperature
(in equilibrium condition, the electron temperature equals to lattice temperature). As shown in the
bottom panel of Fig. 2a, in this scenario a portion of energetic carriers in prolonged thermal tail of
3
f(E) has enough energy to eject into MoS2. The carrier equivalent temperature of hot carriers is
approximately proportional to the absorption coefficient. Surface plasmonic resonance tightly
confines electromagnetic field of incident light, resulting in an enhanced absorption coefficient
and therefore an elevated carrier equivalent temperature.
In addition, because the incident photon energy is lower than the bandgap of MoS2, only
energetic carriers in prolonged thermal tail of f(E) with excess energy higher than the band edges
can be ejected into the MoS2. The injected carrier density (equals the integration of the high energy
tail of f(E) product the density of states) exponentially increases with the temperature. Or in other
words, the band edge of MoS2 efficiently filters out the carrier injection from the valley with lower
absorption rate. Accordingly, the valley contrasting carriers in MoS2 are largely magnified
compared with the helical contrasting absorption of plasmonic antennae.
3. Generation of valley polarization.
We briefly summarize the hot injection process as follows. We adapt a model which describes
electrical doping of 2D materials by plasmon-induced hot carrier from Ref1,2.This process can be
understood by four main steps: i) The first step is light absorption (of metal, due to the sub-gap
photon energy). In our device, absorption of light is enhanced by exciting localized surface
plasmon resonances in nano-antenna. ii) Plasmon in metal nano-structure damped through the
creation of hot electron-hot hole pairs via Landau damping on a time scale from 1 to 100 fs2. iii)
Hot electron-hole pairs quickly redistribute energy to form a Fermi-Dirac distribution with
equivalent temperature obviously higher than the lattice temperature. iv) A charge transfer of high
energy parts (higher than the conduction band of MoS2) of hot electrons generated in the antenna
4
structure upon plasmon decay.
The chiral absorption in our system moves forward to the general process: A linearly-
polarized excitation can be divided into two opposite circularly-polarized components. They result
in different optical orientation of electron spins in heavy metal. In our device, the asymmetric
absorption (Figure S2) between different optical helicity generates unbalanced population of hot
electron-hot hole pairs between different spins. This net spin information carried by hot carrier can
be maintained after charge transfer process if the spin relaxation rate is lower than charge injection
rate3. This is possible because the spin relaxation time in metal is on the orders of several ps, slower
than the hot carrier relaxation time of ~100 fs as aforementioned. Fig. S4 schematically illustrates
this framework.
Besides the chiral absorption, the chiral near-field distribution could also help to promote the
valley polarization of free electrons. As shown in Fig. S1, the average near field presents strong
optical chirality. The near-field interaction between localized electromagnetic field and
semiconductor may selectively excite hot electrons of MoS2 in specific valleys, especially when
the Fermi-level is near the bottom of conduction band (such as those parts of MoS2 in the depletion
region). Again the injected electrons retain spin information because in MoS2, electron-electron
scattering time (~10-13s) is much shorter than spin relaxation time (tens of ps).
5
4. Photocurrent mechanism.
Generally speaking, the photo-response in 2D materials mainly involves photo-gating, photo-
voltaic, bolometric and photo-thermoelectic effects. We use photo-current mapping to identify the
dominant mechanism.
Fig. 2c shows a photo-current mapping of our device. Before loading nano-antennae, the
device does not respond to 1550 nm excitation (Fig. S3). After loading nano-antennae, obvious
photo-current is generated in one contact (either source or drain, depending on the bias condition).
This result clearly indicates that the photocurrent is due to photo-voltaic like carrier injection:
1. For photo-gating or bolometric effects, the photo-conductivity should mostly change at the
center of the channel rather at the contacts, as we measured.
2. For photo-thermoelectric related process, the thermoelectric voltage generates at both contacts4.
We should observe photo-currents with opposite polarity at different contacts.
3. For our device, the photocurrent generation is schematically presented in Fig. S5. Photo-
generated virtual electron-pairs are separated by the Schottky built-in field at the contact.
Therefore, drift photocurrent generates if and only if an external electric field is applied.
6
5. Valley-selective doping induced PL polarization.
The mechanism of room temperature photoluminescence (PL) polarization, illustrated in
Fig.2b, is not due to unbalanced exciton concentration in different valleys. Because 514 nm laser
generates equal populations of K and K’ valley excitons. Especially, the exciton-depolarization is
very strong at room temperature because intervalley scattering begins to occur when the exciton
energy exceeds a threshold corresponding to twice the LA phonon energy. This is indeed a major
reason for the short room-temperature excitonic lifetime.
Instead of unbalanced population, the PL polarization is due to unbalanced quantum yields in
different valleys resulted from the valley-selective doping induced by 1550 nm illumination. The
doping modulated (either gate-induced doping or chemical doping) PL intensity have already been
discussed in previous literatures5-8,9 . The PL intensity of the A exciton in MoS2 can continuously
decrease with increasing doping because of Pauli blockade and many-body interactions10. Pauli
blockade results in an overall reduction of excitonic absorption and therefore lower PL with
increasing doping. Under 1550 nm illumination, one specific valley (the excited one) is n-doped,
for that hot carriers are selectively injected from the resonated plasmonic antennae. Similar to the
gate/chemical doped PL, it shows a reduced PL intensity compared with the other valley, as shown
in Fig. 2b and Fig. S6.
7
6. The speed of the valleytronic transistor device.
The speed of the device depends on two processes: the valley-polarized hot carrier injection
process and the following transport process.
For the valley-polarized free carrier injection process, many previous literatures have studied
it in detail by pump-probe experiment6,11. The reported results show that the time for valley-
polarized carrier injection is ~100 fs (including the charge transfer time). Taken the surface
plasmonic resonance (SPR) decay and SPR-excited hot carrier time into account (1~100fs)2, the
total injection time is no more than 1ps. Hence, the theoretical limit of the device speed could be
ultrafast (~1THZ).
For the transport process, it is quite true that the speed depends on the mobility of channel
material. In this case, the diffusive mobility of free carrier is linked to drift mobility by the Einstein
relation. Recent works have reported many possible techniques to improve the free carrier mobility
in MoS2 channel12-14. The carrier mobility in transition metal dichalcogenide (TMDCs) is
comparable to the strained silicon widely used in industry. In addition, the rich 2D material family
may help to find other better candidates, such as Dirac semimetal etc.
8
7. Drift and diffusive valley current in the valleytronic transistor.
The transport mechanism depends on in what ways the valley current is driven, i.e. drift valley
current is driven (together with charge current) by external electric field, and diffusive valley
current is driven (without charge current) by the gradient of valley-polarized carriers. Therefore,
the transport mode of valley current can be simply determined by whether a photo-current exists.
The “drift” current means the motion of quasi-particles under the external field. The drift
valley current results from the flow of valley-polarized free electrons driven by bias-voltage, or
the photocurrent. It is thus reasonable that drift valley current appears at the contact where
photocurrent generates.
The diffusive valley current is totally different. Firstly, considering the zero-bias case, the
injected carriers could acquire velocity from the built-in field due to the existence of a Schottky
barrier. Fig. S14 schematically illustrated the carrier distribution at the boundary of space charge
region (SCR). Although there is a non-zero initial average velocity for the injected valley-polarized
carriers, the high scattering rate (the mean free path of electrons is about several nanometers)
suggests that the momentum of carriers is randomly distributed in K space, as shown in Fig. S15.
In addition, it should be noted that the scattering mainly happens intravalley due to the spin-valley
locking effect. In addition, the electric field outside the SCR is zero (A trivial calculation indicates
that the SCR in our devices is typically smaller than 100 nm. The photocurrent mapping also
implies that the SCR is much shorter than the channel length). Thus the injected valley-polarized
free electrons cannot be collected by the opposite electrode and no photocurrent generates.
9
Furthermore, the carrier distribution between the two non-degenerate valleys is different at
the boundary of SCR (which is also the valley-polarized carrier injection region), but balanced
inside the channel. Therefore, the density gradient of valley carrier contrast yields a diffusion
process: random walk (exchange) of valley-polarized carriers leads a valley flow propagating
along the channel. Because the electric filed outside the SCR is zero , the process is very similar
to that in Ref 6, once the initial momentum is fully scattered.
Lastly, the above picture does not significantly change under an external bias. For the contact
where built-in field is opposite to the bias field, the electric field force does not drive the motion
of electrons (instead it decelerates the motion and lowers the Schottky barrier). As a result, the
valley current is also driven by diffusion and no photocurrent can be measured.
8. Zero-bias operation of the valleytronic transistor.
We operate the device at zero-bias condition. Firstly, as aforementioned, pure diffusive
valley current is generated even with a Schottky barrier, because the built-in field is only non-
vanishing around the metal contact, no field exists in most of the channel under zero-bias.
Secondly, the zero-bias operation is without any charge current which could potentially
advance the current CMOS technology. To directly prove the charge current free diffusive valley
transport, we experimentally measured the vanishing charge current under zero bias as summarized
in Fig. 4c. As shown in Fig. 4c, both conductive charge current Idc and photocurrent Ipc is non-
detectable (below the instrumental noise floor) when Vds = 0 V. Naturally, there is no external
10
conductive current in the channel due to the zero bias. And the injected carriers cannot be collected
by the opposite contact to generate a net photocurrent although the built-in field can accelerate the
hot carriers in the space charge region of the injection contact. owing to the high electron scattering
rate.
Thirdly, even without charge current, a significant valley signal that originates from diffusive
valley current was still detected (as shown in Fig. 3c & Fig. 4c). This is because the aforementioned
built-in electric field of Schottky contact deflects the valley-polarized carriers inside the SCR,
owing to the valley Hall effect. As a result, the valley-polarized carriers have a non-uniform spatial
distribution at the boundary of space charge region. Through consequential valley diffusion
process, we could observe a transverse voltage even in the zero-bias case. Interestingly, this
process indicates that the polarity of zero-bias Hall output must be the same for different contacts.
Because both electrical fields (here played by the built-in filed as discussed above) and valley-
polarization (and thus the Berry curvature) are reverse in source and drain contact, as shown in
Fig. S11. This is in stark contrast to the non-zero bias cases, where the Hall voltage is of opposite
sign for different contacts because a universal external field deflect the injected valley-polarized
carriers (Noticing that the transverse velocity . Where is the electric field,
is the Berry curvature. For both opposite and E, the VH are of the same sign).
Finally, we would like to emphasize that the device is not unconditionally free of charge
current. Above discussions imply that the charge current free operation only refers to zero-bias
case. Finite bias voltage definitely generates conductive current in the channel.
T
ev (k)= - E Ω(k) E
Ω(k) Ω(k)
11
9. The discussion on energy dissipation.
The energy loss of a transistor can be categorized into static and dynamic power
consumptions. Under zero bias, the only scattering experienced by valley current is the relaxation
of momentum obtained from built-in field in Schottky contact. The energy loss of valley current
can be much lower than that of charge transport in traditional transistor. Because the transport of
valley current only involves in lower field intensity (charge current drift in larger field in a normal
transistor), occurs in smaller dimension (charge current flows through the whole channel in a
normal transistor) and influenced by less contact effect (charges are injected from external
electrical source in a normal transistor). As a result, the static power consumption is significantly
compressed in our device compared with traditional transistor. Given the fact that more than 50%
of the total power consumption comes from the static power consumption, our device already
presents a major technical advantage.
In addition, switching the output signal brings dynamic power consumption. The valley Hall
voltage acts as the output in our device. Under zero bias, it is generated by the following process:
the built-in electric field of Schottky contact deflects the valley-polarized carriers inside the space
charge region owing to the valley Hall effect. Consequently, the valley-polarized carriers observe
a non-uniform spatial distribution at the boundary of space charge region. Through succeeding
valley diffusion process, we could observe a transverse voltage even in the zero-bias case. In this
scenario, dynamic equilibrium is established between diffusion of valley-polarized carriers and
electric field force of valley Hall voltage in transverse direction. The dynamic power consumption
thus originates from changing of the valley diffusion by modulating the injection and distribution
of valley polarized carriers. This energy loss is also potentially lower than that used for switching
12
an electronic transistor, because the redistribution of valley current also does not require high drift
field, does not go through the whole channel and does not heat the contact.
Thirdly, as discussed in Ref6, for the charge current free cases, the scaling law between power
consumption and spin-valley current amplitude is fundamentally different from non-zero charge
current. As they calculated, for charge current free cases VP I .While for non-zero charge current
cases, 2
VP I R . Where Iv is the valley current, R is then resistivity of the materials, P is the
power consumption. The lack of charge current enables high power efficiency, especially at large
current amplitude.
10. Calculation of the valley polarization lifetime.
According to two-probe measurement shown in Fig. 4b, the mobility of our MoS2 FET is
estimated to be around 20 cm2V-1s-1 according to the equation
(S1)
Where the Cg is the gate channel capacitance per unit area, L and W are the length and width
of the channel of the MoS2 FET. For the drift dominated propagation, the polarization length λdrift
is around 18 μm, thus we can estimate the corresponding lifetime from
(S2)
It reads ~100 ns in our experiment.
ds
g ds g
ILμ=
WC V V
drif
drift
t driftτ = =
ν
λ λ
μE
13
For the diffusion dominated propagation, the actual diffusion length should exclude the
depletion region and a small scattering length in and near space charge region ( ), as shown
in Fig. S14, that is diff SCR .Thus the corresponding lifetime is estimated from
(S3)
where D is the diffusion coefficient which can be estimated from the Einstein relation
(S4)
Where for hole and for electron. The μ, kB and T are
mobility, Boltzmann constant and electron temperature, respectively. Taking the above
discussions into account, the valley lifetime in diffusive process is 2( )SCR
diffD
. A rough
estimation gives around 100 ~ 300 ns.
11. Employing the valleytronic transistor to achieve valleytronic logic circuits.
The valley switching behavior of our device possesses two important merits which render the
device potentially works as a valley transistor for integrated valleytronics. Firstly, for a functional
valleytronic building block, it is necessary to realize a valley-controlled valley polarization. This
process fundamentally requires a unified way to read and modulate valley polarized carriers, which
is unfortunately elusive in previously reported valleytronic devices. Our device fulfills this
requirement because its valley current is read and controlled all by electrical signals (valley Hall
output and electrostatic gating input). Second equally important merit is that for a valley transistor
λSCR
2
diff
λ λτ =
D
( )- SCR
(1 ) (1 )Bk TD Ln
q
exp( )V F
B
E E
k T
exp( )F C
B
E E
k T
diff
14
that possibly outperform its electronic counterpart, the manipulation of valley degree of freedom
should be uncorrelated with the charge degree of freedom; otherwise it will be limited by all the
major challenges involved in state-of-art semiconductor technology. In this regard, we have
demonstrated a promising candidate: the working mechanism of our valleytronic transistor is
distinctively different from that of a normal one. For normal transistor such as CMOS, the binary
output is embodied by either pulling the output node up to Vds or down to GND. This generally
requires applying an external bias voltage between the Source and Drain electrodes, and employing
a conductive charge current flow through the entire channel. In stark contrast, the valleytronic
transistor employ Hall voltage as output which does not demand a bias voltage and net charge
current through the channel. All the electrical outputs will be only exposed to gate of subsequent
stages, which controls further valleytronic information and does not drive the motion of charge.
Accordingly, this valley transistor could operate with much smaller power consumption (acquired
from the infrared light pumping) than the CMOS transistor.
We also anticipate that integrating with silicon photonic waveguide and utilizing more
advanced plasmonic structures may permit scaling down of the device. We propose a methodology
to achieve fully functional valleytronic circuit by employing our valleytronic transistor as building
blocks in two basic logical circuits (a NAND gate and a ring oscillator) to verify the concept of
combinational logic and sequential logic.
Firstly, we placed a silicon waveguide underneath metal/TMDC contacts for valley-
polarization. As a result, a point light source (either external or on-chip) coupled into the
waveguide is able to efficiently illuminate all the transistors, and therefore launches valleytronic
current.
15
Figure S18 illustrates the valleytronic NAND gate. The logic gate is akin to its CMOS
counterpart; it consists of two pairs of p-type and n-type transistors (whose valleytronic transfer
characteristics are schematically shown in the insets). Two p-type transistors are in series and two
n-type transistors are in parallel. In this case, if and only if both input valley states are “positive”,
the output valley state is “negative” (OUT = out+ - out-). The truth table of the valleytronic gate is
also shown in inset. Obviously, the circuit behaves as a NAND gate. Figure S19 schematically
shows the valleytronic ring oscillator. We use a 3-stage ring oscillator as an example. Briefly, it
consists of 3 reversely connected inverter stage. Again similar as CMOS inverter, each valleytronic
inverter is made of two complementary transistors. It can be simply deduced the device flips an
input valleytronic signal and acts as a valleytronic inverter.
It is not difficult to find out that the kernel design rule is very similar to CMOS circuit, all
other combinational logic circuit and sequential logic circuit can be seamlessly implemented based
on the same elementary building blocks and design rules.
16
Supplementary Figures
Supplementary Fig. 1 | Distributions of local optical chirality at the plane of MoS2 for Au
nanoantennae coupled to electrodes at different manners under the illumination of a linearly
polarized 1550-nm laser. The polarization is along y direction. The average values of the local
optical chirality enhancement, 𝐶̅, are therefore calculated.
17
Supplementary Fig. 2 | Circular dichroism spectra obtained as the difference between the
RCP and LCP absorption spectra for nanoantennae coupled with the electrode at different
manners. a, Tail-to-Electrode configuration. b, Head-to-Electrode configuration.
18
Supplementary Fig. 3 | Photocurrent mapping and Hall voltage mapping of one MoS2 FET
device without plasmonic antennae under the illumination of 1550-nm laser. a-b, The
photocurrent mapping at Vds = -1.6 V(a) and 1.6 V (b) respectively. c, The Hall voltage (VH)
mapping of the device under the same condition (P = 2.82 mW. Scale bar: 4 μm). Compared with
Fig. 2 (c) and Fig. 3 in the main text, no visible photocurrent and Hall voltage were detected, which
prove that the demonstrated phenomenon result from surface plasmonic-induced plasmonic effect
instead of intrinsic photo-response of MoS2.
c
700
0
a b
1.6 V-1.6 V0
-800
IPC (pA)IPC (pA)
D
S
D
S
30
-50
VH (μV)
-1.6 VD
S
1.6 V D
S
19
Supplementary Fig. 4 | Unbalanced population of hot electron-hot hole pairs between
different spins and resulted valley contrast
Supplementary Fig. 5 | The schematic injection of photo-excited carriers and generation
process of photocurrent under different bias condition. a, Photo-excited carriers are generated
and separated at contacts while no net photocurrent produced due to zero electric field in channel
a b c
20
at Vds = 0. b-c, External field provided by Vds tilts the electric potential in MoS2 channel
and reverse bias the Schottky junction at one contact, causing net photocurrent flow. The photo
response appears in the reverse biased Schottky contact where the built-in field is aligned with
external field.
21
Supplementary Fig. 6 | Circular polarized photoluminescent measurement of one MoS2
device. a, The optical image of the device. The green and red dots represent the position of 514
nm and 1550 nm laser spots (Scale bar, 2 μm). b, Schematic of the circular polarized PL
measurement of our device under three different conditions (corresponds to PL spectra in (c)-(e)).
600 620 640 660 680 700 720
PL inte
nsity (
a.u
.)
(nm)
s -
s +
600 620 640 660 680 700 720
s -
PL inte
nsity (
a.u
.)
(nm)
s +
2 μm
b c
d
e
a
600 620 640 660 680 700 720
PL
in
ten
sity (
a.u
.)
(nm)
s -
s +
1550 nm ON
“D” electrode
1550 nm ON
“S” electrode
1550 nm OFF
Right-hand
excitation
Left-hand
excitation
22
Without 1550 nm excitation, the PL signal is circular un-polarized. With 1550 nm excitation,
valley polarized free carriers are injected into MoS2, resulting in obvious PL helicity. c, The spectra
of circular polarized PL when turning off the infrared excitation (top panel in (b)). d-e, The spectra
of circular polarized PL spectrum with 1550 nm laser excitation at ‘D’ (d) and ‘S’contact (e),
respectively. The experimental details are summarized in method.
Supplementary Fig. 7 | The linear photogalvanic effect photocurrent components. The
linear photogalvanic effect (LPGE) photocurrent components extracted from Fig. 2d-e, ILPGE =
Lsin (4α+φl). No significant phase difference is seen between two LPGE components extracted
from 2 V and -2 V cases.
23
Supplementary Fig. 8 | Detection and transport of valley current of another short channel
device. a-b, Valley Hall voltage mappings of a short channel device under different bias polarities
(data taken with Vds = 0.4 V and -0.4 V for (a) and (b) respectively). The white lines represent the
edges of the metallic electrodes. Scale bar: 4 μm. c, Valley Hall voltage (VH) as functions of Vds
under illumination of linearly polarized laser (1550 nm and 532 nm). The label “Region S (D)”
represents the response region around S (D) electrode in (a) and (b). The measurements were
performed by focusing linearly polarized lasers at VHE “hot spots”. The powers for 1550-nm and
532-nm test were set at 2.82 mW and 0.13 mW, respectively. The error bars indicate the 2σ
uncertainty on each individual data point.
20
VH (μV)
0.4 V -0.4 V20
-20
D
S
D
S
a b c
VH (μV)
00
-25-0.6 -0.3 0.0 0.3 0.6
-40
-30
-20
-10
0
10
20
Region S (1550 nm)
Region D (1550 nm)
532 nm
VH
(
V)
Vds (V)
24
Supplementary Fig. 9 | Light helicity-dependent Hall voltage measurement. a-b, The VH as a
function of angles of a quarter waveplate with laser spot focusing at drain electrodes for Vds = -1.5
V(a) and 1.5 V(b). c-d, The VH as a function of angles of a quarter waveplate with laser spot
focusing at source electrodes for Vds = -1.5 V (c) and 1.5 V (d). The empty circles are the
experimental data. The thin solid curves are the fitting results based on the formula VH = C/sin
(2α+φc/) + L/sin (4α+φl
/) + D/. Here, α is the rotation angle of the quarter waveplate. Similar to Ipc
in Fig. 2 (d& e), φc/ and C/ are the parameters related to CPGE, characterizing the valley contrasting
carriers. φl/, L /and polarization-independent D/ arise from LPGE and it’s coupling with CPGE.
0 90 180 270 360
80
120
160
200
240 Region D
VH (
V
)
q (°)
Vds = -1.5 V
0 90 180 270 360
40
60
80
100 Region S
VH (
V
)
j (°)
Vds = 1.5 V
0 90 180 270 360
50
100
150
Region D
ab
s(V
H)
(V
)
j (°)
Vds = 1.5 V
a
c
b
d
0 90 180 270 360
90
120
150Region S
ab
s(V
H)
(V
)
q (°)
Vds = -1.5 V
25
The bold solid curves are the circular polarized components C/sin (2α+φc/) +D/ (measured at 1550-
nm laser, P = 2.82 mW. Scale bar: 4 μm).The error bars indicate the 2σ uncertainty on each
individual data point. θ and φ are rotational angles of quarter-wave plate in two sequential rounds
of measurements.
26
Supplementary Fig. 10 | Light helicity-dependent photocurrent under 532-nm illumination.
Photocurrent as a function of angles of a quarter waveplate of a pristine MoS2 FET without chiral
plasmonic nanoantennae measured under 532-nm illumination (P = 0.13 mW, Vds = -2 V). For 532
-nm laser, no hot carrier effect is presented. And no valley-polarization features can be obtained
due to its linear polarization and large energy mismatch with A exciton. It is used to exclude trivial
photo-related artifacts in our device.
27
Supplementary Fig. 11 | Photocurrent and Hall voltage mapping images of a pristine MoS2
FET without chiral plasmonic antennae under 532-nm illumination. a-b, Photocurrent
mapping results at Vds = -1.4 V(a) and 1.4 V(b) under the illumination of 532-nm laser. c-d,
Corresponding VH mapping images at the same condition as in (a-b) (Scale bar: 8 μm. P = 0.13
mW).
6
0
IPC (nA)
D
S
1.4 V0
-25
IPC (nA)
D
S
-1.4 V
100
-150
-1.4 V
VH (μV)
D
S
100
-200
VH (μV)
1.4 V D
S
a b
c d
28
Supplementary Fig. 12 | Photocurrent/valley Hall test of a bilayer MoS2 device. a, Optical
image of a bilayer MoS2 device. Scale bar, 8 μm. b , Photocurrent (IPC) as a function of angles of
a quarter waveplate. The solid and dashed curves are the fitting results and circular polarized
components, respectively. The error bars indicate the 2σ uncertainty on each individual data point.
c, Valley Hall voltage (VH) as a function of source-drain voltage Vds under illumination of 1550
nm laser for monolayer and bilayer, respectively. d-e, Photocurrent mapping of the bilayer MoS2
device at Vds = -1.7 V and 1.7 V, respectively (optical power P = 3.5 mW). f, Transverse voltage
mappings of a monolayer MoS2 device. Clear Hall signal is seen at source and drain electrode. The
2000VH (μV)
8 μm
-0.6 -0.3 0.0 0.3 0.6
-80
-40
0
40
80
120 monolayer (S)
monolayer (D)
bilayer (S)
bilayer (D)
VH (
V
)
Vds
(V)0 90 180 270 360
140
160
180
200
220
240
ab
s(I
pc)
(pA
)
a (°)
Vds = -1.4 V
a b
Ix
0-400
PC (pA)
4 μm
- 1.7 V
D
S
Vx
d
2500PC (pA)
4 μm
1.7 V
D
SIx
Vx
e
VH (μV)
c
B
- 100 0VH (μV)
40
4 μm
1.7 V
DS
VxIx
Ag
- 30 0VH (μV)
60
4 μm
1.7 V
DSVx
Ix
B
A
hbilayer
A
- 60 0 80
4 μm
1.7 V
DSVxIx
B
bilayer
4 μm
monolayer -0.7 V
Ix
S
B
A
Vx
f
D
i
-100
bilayer
29
yellow dashed boxes outline the response region where we count the Hall signals. g-i, Scanning
valley-Hall voltage mappings of three pairs of Hall probes of the bilayer MoS2 device. Only
photovoltage signals are seen around Hall probes, while negligible Hall signal is observed around
source and drain electrodes.
30
Supplementary Fig. 13 | Voltage drop between different Hall probes and grounded electrode
(S) as a function of Vds. The Vba is the potential differences between “a” and “b” electrodes in the
transverse direction, that is, the measured Hall voltage VH. the Va-gnd (Vb-gnd) is the potential
difference between “a” (“b”) electrode and the grounded electrode (source) (P = 2.82 mW). The
Vb-gnd almost equal to Vba (VH) and Va-gnd is nearly zero, suggesting that only one type of free carriers
(electrons) dominate the valley current.
31
Supplementary Fig. 14 | Schematic illustration of the potential profile and valley polarized
diffusion current under zero-bias condition. Different from the non-zero bias case, where the
Hall voltage is of opposite sign for different contacts because of a universal external field E and
opposite berry curvature, the Hall voltage is of same sign for zero bias conditions due to the
direction of built-in electric field E at different electrodes is opposite. Combined with opposite
valley polarities, the Hall voltage is thus of the same sign at source and drain electrodes under zero
bias condition. Noticing that the build-in field only exist in SCR, no electric field exists outside
the SCR. Thus valley-polarized carriers are pure valley flow with no charge current in the channel
away from the SCR at zero-bias condition.
K’
SCR SCR
φ
E E
D S
x
K
32
Supplementary Fig. 15 | Scattering process of the valley-polarized electrons. The initial valley-
polarized flow is of non-zero momentum caused by built-in field in SCR. Outside the SCR, the
valley-polarized free electrons are scattered and within a same valley. After intravalley scattering,
the momentum is nearly randomly distributed in K space.
33
Supplementary Fig. 16 | Valley Hall voltage measurement of one long channel device. a-b, VH
mappings at Vds = -1.5 V(a) and 1.5 V(b). Hall signals from drift valley current are observed, while
signals from diffusion are not detectable. (Scale bar, 4 μm). c, The Vds dependence of the Hall
voltage (VH) measured (corresponding to mapping in (a-b)) (1550-nm laser, P = 2.82 mW). The
error bars indicate the 2σ uncertainty on each individual data point. All data is shown as mean ±
s.d.
200
-100
VH (μV)
300
-500
VH (μV)
1.5 V-1.5 V
-1 0 1
0
-30
-60
VH (
V
)
Region D
Region S
Vds (V)
VH (
V
)
0
-100
-200
-300D
S
D
S
a b c
34
Supplementary Fig. 17 | Manipulation of valley signal using electrostatic gating. a, Hall
voltage VH and Hall conductivityσH as a function of gate voltage Vg (1550-nm laser, P = 2.82
mW). The calculated ON/OFF ratio (corresponding to VH-max/VH-min) is larger than 103. b, Source-
drain current as a function of back gate voltage Vg at Vds = -1.7 V. Inset shows the Vds dependence
of the source-drain current at different back gate voltages Vg (test in dark condition). The error bars
indicate the 2σ uncertainty on each individual data point. All data is shown as mean ± s.d.
-40 -20 0 20 40
10-13
10-11
10-9
10-7
-2 0 2
-0.4
0.0
0.4
-40
-20
0
20
40
I ds (
A
)
Vds
(V)
Vg (V) =a
bs
(Id
s)
(A)
Vg (V)
Vds= -1.7 V
a b
-40 -20 0 20 40
0.0
-0.6
-1.2
Vg (V)
VH (
mV
)
Vds = -1.7 V
1550 nm
2.82 mW
ON/OFF ratio >103
6
4
2
0
sH (
nS
)
35
Supplementary Fig. 18 | The valleytronic NAND gate. The p-type and n-type transistors are
demonstrated in green and purple, respectively. The valleytronic transfer characteristics are
schematically shown in the insets. The truth table of the valleytronic gate is also shown in inset.
36
Supplementary Fig. 19 | Schematic illustration of a 3-stage valleytronic ring oscillator. The
p-type and n-type transistors are demonstrated in green and purple respectively.
37
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