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1 2005 MAPLD Design Integrity Concepts More Than the Sum of Its Parts Design Partitioning

612005 MAPLDDesign Integrity Concepts More Than the Sum of Its Parts Design Partitioning

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Page 1: 612005 MAPLDDesign Integrity Concepts More Than the Sum of Its Parts Design Partitioning

12005 MAPLD Design Integrity Concepts

More Than the Sum of Its Parts

Design Partitioning

Page 2: 612005 MAPLDDesign Integrity Concepts More Than the Sum of Its Parts Design Partitioning

22005 MAPLD Design Integrity Concepts

Agenda – Design Partitioning

• Definitions and examples

• Why partition an electronic design

• Guidelines for partitioning an electronic design

• Why isn’t it done more often?

• Summary

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32005 MAPLD Design Integrity Concepts

Definitions and Examples• Partition – to divide into parts or shares

– Examples: budgeting, outlining, WBS development

• Design partitioning refers to the deconstruction of a design into various sub-designs in an ordered and logical manner

• Goal – to simplify the whole by optimizing the parts and thus increase:– Efficiency– Reliability– Maintainability

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42005 MAPLD Design Integrity Concepts

Why Partition (General)?• Complexity interferes with ready comprehension

– Comprehension of a complex system depends on ability to impose order upon it

– A given mind has a finite capability to impose order which depends on the quantity and structure of the data related to the system

– The more complex the system, the more difficult its comprehension• Partitioning a design introduces a piece-wise reduction in complexity

– Reduces quantity and complexity of design to manageable “chunks”– Improves comprehension of the various parts of the design– Increased comprehension of the parts leads to better comprehension of the

whole• Better comprehension of the whole increases the ability to

– Verify correctness of the design– Correct errors in the design– Update the design when necessary

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Why Partition (cont.)?

• Programmatic advantages– Refines scope of work

• Identifies unexpected effort

• Identifies reuse possibilities

• Identifies staffing requirements

– Identifies schedule dependencies• Improves allocation of resources

• Identifies parallelization and schedule enhancement opportunities

– Promotes management visibility

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Why Partition? - Design• Improved interface organization / more formal structure

– Interfaces between functions have more predictable characteristics– Expansion by addition of functions is more controlled

• Enhanced functional encapsulation– Individual functions have predictable results when invoked– Functional design enhancements have limited side-effects when

installed– Effects of faults are more easily predicted and mitigated

• Efficient design implementation– Functional (fewer functions and types of functions)– Data flow (fewer, more sensible data busses)– Control flow (simpler address decoding and state machines)

• All are side effects of additional thought put into “How?”

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72005 MAPLD Design Integrity Concepts

Why Partition? - Correctness• Simpler inspection

– Functionality may be “obvious at a glance”– Error space is more limited

• Within the function or within the interconnect

• Simpler Qualification– Verification can begin with encapsulated modules or circuit

subsets– Overall functionality correctness becomes less of a “late” concern

because subset functionality is proven correct “early” in the process

• Simpler / more thorough review– Structure provides orientation to peer reviewers– Encapsulation allows easier review– Peer input more likely to be useful

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Why Partition? – Maintainability• Clearer documentation

– Documentation has “smaller” parts to focus on – Structure of documentation grows from the design structure

• Simpler maintenance– Changes affect only enhanced area– Interactions between changed area of design and remainder of

original design is controlled by a formal structure

• Enhanced reuse– Sub-circuits / functions usable in other applications as long as the

interface structure is observed

• Inherent capability of design better understood

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Guidelines for Partitioning

• Take advantage of organizational strengths– Expertise (analog, digital, software, etc.) is seldom the

same across organizations– Partition the design in accordance with organizational

strengths according to primary functions– Divide auxiliary functions (those that can be assigned

to multiple organizations) so that• Interfaces are simplified• Workload is equalized• Functions are easily tested without requiring all of the

hardware

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Guidelines for Partitioning (cont.)

• Example: Alice UV spectrograph electronics (Rosetta)

• Core expertise– Sensor Sciences: Detector and front end electronics

– Mobius Systems: Embedded software

– SwRI® space systems: Digital, low speed data acquisition

– SwRI® space science: LV and HV power supplies

• Primary partition per core expertise

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Guidelines for Partitioning (cont.)

• Alice example (work breakdown chosen)– Sensor Sciences: detector electronics through parallel

digital output – simplified interface

– Mobius: instrument control / protocol servicing (some error decoding partitioned to H/W)

– Space systems: microcontroller; s/c interface; heater, motor, door digital control; analog high-voltage control

– Space sciences: LVPS; HVPS; motor, door, and heater drive circuitry

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122005 MAPLD Design Integrity Concepts

Guidelines for Partitioning (cont.)

• Alice example – partitioning decisions– Auxiliary expertise split along sensible

interfaces• C&DH to detector – analog or digital? (noise, ease

of test) - digital• C&DH to HVPS – analog or digital? (space, noise

susceptibility, ease of test) - analog• C&DH to S/W – protocol decoding? (performance

margin, logic capability) – hardware error decoding, s/w protocol encoding

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Guidelines for Partitioning (cont.)

• Use specific functionalities– Combine functionality with very similar characteristics

• Low-level analog / discrete bi-level (comparator is difference)

• Example: Spacelab flex interfaces

– Cluster related functionalities• Shared data-flow direction, shared logical control

• Examples– Constant level discretes / pulsed discretes

– Low-level discretes / high-level discretes

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Guidelines for Partitioning (cont.)• Use specific functionalities (cont.)

– Isolate related functional sub-groups from other items• Ex. – analog data acquisition group (multiplexers, converters,

signal processing, control logic)• Isolate

– Through appropriate data/address buffering– Through separate programmable logic sub-sets

– Exploit directionality• Write functions; read functions; read/write functions –

appropriate buffering• Examples

– Write: Analog output, digital output, telemetry– Read: Analog input, digital input, command– R/W: Memory, bi-directional discretes, GSE

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152005 MAPLD Design Integrity Concepts

Guidelines for Partitioning (cont.)

• Exploit operational considerations– Operational considerations often determine the specific

configuration of a set of common components– Example: memory

• Components: memory, write control, read control, sequencing, buffering

• Application: telemetry system– Packetized / unpacketized?– Asynchronous timing / TDM ?– Science data / engineering data?– Pushed / pulled ?

• The type of telemetry system determines the partitioning

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Example – Science Data Storage and Readback System

• How should the logic be partitioned?– Is write logic part of science data process or memory process?– Is read logic part of telemetry system or memory process?– How complicated is the arbitration

• How it is partitioned depends on specific operational requirements

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Example - New Horizons Alice Science Data

• Alice Operation– Slow source accumulation relative to output speed– Push interface initiated by instrument

• Alice Implementation (others likely in different circumstances)– Block 1: handshake and latch data– Block 2: Ingest data, process, write to memory– Block 3: Read, serialize, send, blank memory– Arbitration simplified to a switched double buffered memory access (no real-time arbitration)

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Guidelines for Partitioning (cont.)

• Ensure encapsulation is reflected in the form of the engineering documents– Functions contain many types of operations– Example: Telecommand interface

• De-serialization, decoding, error determination, re-packetization, temporary storage

• Real time functionality [level 0], forwarding to software• Storage access / arbitration, status log maintenance, data-bus handshaking

– Partitioning should ensure that all reasonable aspects of a function are in one locality (we are ordering data for understanding)

• One (or a few) pages in a schematic• One module in HDL• One object in software

– Benefits: readability, error determination, testability, maintainability

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192005 MAPLD Design Integrity Concepts

Ordering Example – Bus Structure

• A logical bus structure– Simplifies data flow

– Eases expansion / enhancement

– Identifies bottlenecks / opportunities for efficiency

– Ensures signal compatibility

– Reduces timing uncertainty (capacitive loading)

– Reduces power

– Simplifies control logic / arbitration

– Simplifies analysis

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Ordering Ex. – Bus Structure (cont.)Before:

After:

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Ordering Ex. – Bus Structure (cont.)

• Directional data flow is clustered• High-speed access devices (SRAM) not

buffered• Exclusive functions clustered (PROM/

EEPROM)• Simplification of

– Timing– Loading– Control

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Why is Partitioning Not a Priority?

• It is – at the S/C, sub-system, and box level (sometimes)• Why not at the board level?

– Requires potentially significant planning effort (schedule / cost)– The tool syndrome (CAD / CAE)

• Crush creativity by forcing an early start to design• Primarily a way to communicate between software packages rather

than humans (schematic => PWB)

– Too much junk being placed in too little space (simplification may not always be space efficient)

– Lack of emphasis from senior engineers– Boards aren’t where the action is (FPGAs) – less effort placed on

them

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Why is Partitioning Not a Priority? (cont.)

• At the FPGA level – Lack of solid design methodology

• Methodology must be tailored to a tool• VHDL / Verilog are functional descriptions• VHDL / Verilog don’t inherently enable data flow

visualization or block oriented deconstruction• The synthesizer can understand non-partitioned design

– Perception of expansive resources (no / few constraints)– The tool syndrome (“I must start coding”)– Lack of effective design quality gates prior to start of

detailed design

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Summary• A design is only as solid as its weakest part• Proper planning and partitioning of a design:

– Ensures individual functions are logical and complete– Ensures interconnects are ordered and efficient– Provides for improved reliability / verifiability– Allows easier modification and enhancement– Enhances detailed understanding of how things work

• Partitioning requires ordering the design by considering– The capabilities of the team– The functionality of the modular pieces– How the design will operate– The individual components of a particular function

• Partitioning a design ensures that all parts are solid – resulting in a solid whole