74HC594; 74HCT594 8-bit shift register with output register · SHR 10 shift register reset (active LOW) SHCP 11 shift register clock input STCP 12 storage register clock input STR

1. General description

The 74HC594; 74HCT594 is a high-speed Si-gate CMOS device and is pin compatiblewith Low-Power Schottky TTL (LSTTL).

The 74HC594; 74HCT594 is an 8-bit, non-inverting, serial-in, parallel-out shift register thatfeeds an 8-bit D-type storage register. Separate clocks (SHCP and STCP) and directoverriding clears (SHR and STR) are provided on both the shift and storage registers.A serial output (Q7S) is provided for cascading purposes.

Both the shift and storage register clocks are positive-edge triggered. If the user wishes toconnect both clocks together, the shift register will always be one count pulse ahead of thestorage register.

2. Features

n Synchronous serial input and output

n Complies with JEDEC standard No.7A

n 8-bit parallel output

n Shift and storage registers have independent direct clear and clocks

n Independent clocks for shift and storage registers

n 100 MHz (typical)

n Multiple package options

n Specified from −40 °C to +85 °C and from −40 °C to +125 °C

3. Applications

n Serial-to parallel data conversion

n Remote control holding register

74HC594; 74HCT5948-bit shift register with output registerRev. 03 — 20 December 2006 Product data sheet

NXP Semiconductors 74HC594; 74HCT5948-bit shift register with output register

4. Ordering information

5. Functional diagram

Table 1. Ordering information

Type number Package

Temperaturerange

Name Description Version

74HC594D −40 °C to +125 °C SO16 plastic small outline package; 16 leads;body width 3.9 mm

SOT109-1

74HC594DB −40 °C to +125 °C SSOP16 plastic shrink small outline package; 16 leads;body width 5.3 mm

SOT338-1

74HC594N −40 °C to +125 °C DIP16 plastic dual in-line package; 16 leads (300 mil) SOT38-4

74HCT594D −40 °C to +125 °C SO16 plastic small outline package; 16 leads;body width 3.9 mm

SOT109-1

74HCT594DB −40 °C to +125 °C SSOP16 plastic shrink small outline package; 16 leads;body width 5.3 mm

SOT338-1

74HCT594N −40 °C to +125 °C DIP16 plastic dual in-line package; 16 leads (300 mil) SOT38-4

Fig 1. Functional diagram

mbc320Q7Q0 Q1 Q2 Q3 Q4 Q5 Q6

DS

SHCP

SHR

STCP

STR

14

10

13

11

12

15

9

1 2 3 4 5 6 7

8-STAGE SHIFT REGISTER

8-BIT STORAGE REGISTER

Q7S

74HC_HCT594_3 © NXP B.V. 2006. All rights reserved.

Product data sheet Rev. 03 — 20 December 2006 2 of 26


Fig 2. Logic symbol Fig 3. IEC logic symbol

mbc319

STCPSHCP

STRSHR

DS

Q7S

Q0

Q1

Q2

Q3

Q4

Q5

Q6

Q7

14

10 13

11 12

15

9

1

2

3

4

5

6

7

mbc322

SHCP

STCP

Q0

Q1

Q2

Q3

Q4

Q5

Q6

Q7

SHR

STR

DS15

9

1

2

3

4

5

6

7

1D 2D

C1/

10

11

14

C212

13R2

SRG8R1

Q7S

Fig 4. Logic diagram

mbc321Q0 Q1 Q2 Q3 Q4 Q5 Q6

DS

SHCP

SHR

STCP

STR

D Q

CP

FFSH0

R

STAGE 0

D Q

CP

FFST0

R

STAGES 1 TO 6

D Q

Q7

D Q

CP

FFSH7

R

STAGE 7

D Q

CP

FFST7

R

Q7S




6. Pinning information

6.1 Pinning

Fig 5. Timing diagram

mbc323

Q7S

Q0

STR

SHR

STCP

DS

SHCP

Q1

Q6

Q7

Fig 6. Pin configuration SO16

Q1 VCC

Q2 Q0

Q3 DS

Q4 STR

Q5 STCP

Q6 SHCP

Q7 SHR

GND Q7S

001aaf611

1

2

3

4

5

6

7

8

10

9

12

11

14

13

16

15

74HC59474HCT594




6.2 Pin description

Fig 7. Pin configuration SSOP16 Fig 8. Pin configuration DIP16

74HC59474HCT594

Q1 VCC

Q2 Q0

Q3 DS

Q4 STR

Q5 STCP

Q6 SHCP

Q7 SHR

GND Q7S

001aaf613

1

2

3

4

5

6

7

8

10

9

12

11

14

13

16

15

74HC59474HCT594

Q1 VCC

Q2 Q0

Q3 DS

Q4 STR

Q5 STCP

Q6 SHCP

Q7 SHR

GND Q7S

001aaf614

1

2

3

4

5

6

7

8

10

9

12

11

14

13

16

15

Table 2. Pin description

Symbol Pin Description

Q1 1 parallel data output 1







GND 8 ground (0 V)

Q7S 9 serial data output

SHR 10 shift register reset (active LOW)

SHCP 11 shift register clock input

STCP 12 storage register clock input

STR 13 storage register reset (active LOW)

DS 14 serial data input


VCC 16 supply voltage




7. Functional description

[1] H = HIGH voltage level;

L = LOW voltage level;

↑ = LOW-to-HIGH transition;

X = don’t care.

8. Limiting values

[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

[2] For DIP16 packages: above 70 °C the value of Ptot derates linearly with 12 mW/K.

For SO16 packages: above 70 °C the value of Ptot derates linearly with 8 mW/K.

For SSOP16 packages: above 60 °C the value of Ptot derates linearly with 5.5 mW/K.

Table 3. Function table [1]

Function Input

SHR STR SHCP STCP DS

Clear shift register L X X X X

Clear storage register X L X X X

Load DS into shift register stage 0, advance previous stage data to the next stage H X ↑ X H or L

Transfer shift register data to storage register and outputs Qn X H X ↑ X

Shift register one count pulse ahead of storage register H H ↑ ↑ X

Table 4. Limiting valuesIn accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).

Symbol Parameter Conditions Min Max Unit

VCC supply voltage −0.5 +7.0 V

IIK input clamping current VI < −0.5 V or VI > VCC + 0.5 V [1] - ±20 mA

IOK output clamping current VO < −0.5 V or VO > VCC + 0.5 V [1] - ±20 mA

IO output current VO = −0.5 V to VCC + 0.5 V

Serial data output Q7S - ±25 mA

Parallel data output - ±35 mA

ICC supply current Serial data output Q7S - 50 mA

Parallel data output - 70 mA

IGND ground current Serial data output Q7S - −50 mA

Parallel data output - −70 mA

Tstg storage temperature −65 +150 °C

Ptot total power dissipation Tamb = −40 °C to +125 °C [2] - 500 mW




9. Recommended operating conditions

10. Static characteristics

Table 5. Recommended operating conditions

Symbol Parameter Conditions Min Typ Max Unit

Type 74HC594

VCC supply voltage 2.0 5.0 6.0 V

VI input voltage 0 - VCC V

VO output voltage 0 - VCC V

Tamb ambient temperature −40 +25 +125 °C

tr rise time VCC = 2.0 V - - 1000 ns

VCC = 4.5 V - 6.0 500 ns

VCC = 6.0 V - - 400 ns

tf fall time VCC = 2.0 V - - 1000 ns

VCC = 4.5 V - 6.0 500 ns

VCC = 6.0 V - - 400 ns

Type 74HCT594

VCC supply voltage 4.5 5.0 5.5 V

VI input voltage 0 - VCC V

VO output voltage 0 - VCC V

Tamb ambient temperature −40 +25 +125 °C

tr rise time VCC = 4.5 V - 6.0 500 ns

tf fall time VCC = 4.5 V - 6.0 500 ns

Table 6. Static characteristics type 74HC594At recommended operating conditions; voltages are referenced to GND (ground = 0 V).


Tamb = 25 °C

VIH HIGH-level input voltage VCC = 2.0 V 1.5 1.2 - V

VCC = 4.5 V 3.15 2.4 - V

VCC = 6.0 V 4.2 3.2 - V

VIL LOW-level input voltage VCC = 2.0 V - 0.8 0.5 V

VCC = 4.5 V - 2.1 1.35 V

VCC = 6.0 V - 2.8 1.8 V

VOH HIGH-level output voltage VI = VIH or VIL

Serial data output Q7S

IO = −4.0 mA; VCC = 4.5 V 3.98 4.32 - V

IO = −5.2 mA; VCC = 6.0 V 5.48 5.81 - V

Parallel data outputs

IO = −6.0 mA; VCC = 4.5 V 3.98 4.32 - V

IO = −7.8 mA; VCC = 6.0 V 5.48 5.81 - V




VOL LOW-level output voltage VI = VIH or VIL


IO = 4.0 mA; VCC = 4.5 V - 0.15 0.26 V

IO = 5.2 mA; VCC = 6.0 V - 0.16 0.26 V


IO = 6.0 mA; VCC = 4.5 V - 0.15 0.26 V

IO = 7.8 mA; VCC = 6.0 V - 0.16 0.26 V

II input leakage current VI = VCC or GND; VCC = 6.0 V - - ±0.1 µA

ICC supply current VI = VCC or GND; IO = 0 A;VCC = 6.0 V

- - 8.0 µA

Ci input capacitance - 3.5 - pF

Tamb = −40 °C to +85 °C

VIH HIGH-level input voltage VCC = 2.0 V 1.5 - - V

VCC = 4.5 V 3.15 - - V

VCC = 6.0 V 4.2 - - V

VIL LOW-level input voltage VCC = 2.0 V - - 0.5 V

VCC = 4.5 V - - 1.35 V

VCC = 6.0 V - - 1.8 V



IO = −4.0 mA; VCC = 4.5 V 3.84 - - V

IO = −5.2 mA; VCC = 6.0 V 5.34 - - V


IO = −6.0 mA; VCC = 4.5 V 3.84 - - V

IO = −7.8 mA; VCC = 6.0 V 5.34 - - V



IO = 4.0 mA; VCC = 4.5 V - - 0.33 V

IO = 5.2 mA; VCC = 6.0 V - - 0.33 V


IO = 6.0 mA; VCC = 4.5 V - - 0.33 V

IO = 7.8 mA; VCC = 6.0 V - - 0.33 V



- - 80 µA

Tamb = −40 °C to +125 °C

VIH HIGH-level input voltage VCC = 2.0 V 1.5 - - V

VCC = 4.5 V 3.15 - - V

VCC = 6.0 V 4.2 - - V

Table 6. Static characteristics type 74HC594 …continuedAt recommended operating conditions; voltages are referenced to GND (ground = 0 V).





VIL LOW-level input voltage VCC = 2.0 V - - 0.5 V

VCC = 4.5 V - - 1.35 V

VCC = 6.0 V - - 1.8 V



IO = −4.0 mA; VCC = 4.5 V 3.7 - - V

IO = −5.2 mA; VCC = 6.0 V 5.2 - - V


IO = −6.0 mA; VCC = 4.5 V 3.7 - - V

IO = −7.8 mA; VCC = 6.0 V 5.2 - - V



IO = 4.0 mA; VCC = 4.5 V - - 0.4 V

IO = 5.2 mA; VCC = 6.0 V - - 0.4 V


IO = 6.0 mA; VCC = 4.5 V - - 0.4 V

IO = 7.8 mA; VCC = 6.0 V - - 0.4 V



- - 160 µA

Table 6. Static characteristics type 74HC594 …continuedAt recommended operating conditions; voltages are referenced to GND (ground = 0 V).





Table 7. Static characteristics type 74HCT594At recommended operating conditions; voltages are referenced to GND (ground = 0 V).


Tamb = 25 °C

VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 1.6 - V

VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - 1.2 0.8 V



IO = −4.0 mA; VCC = 4.5 V 3.98 4.32 - V


IO = −6.0 mA; VCC = 4.5 V 3.98 4.32 - V



IO = 4.0 mA; VCC = 4.5 V - 0.15 0.26 V


IO = 6.0 mA; VCC = 4.5 V - 0.16 0.26 V



- - 8.0 µA

∆ICC additional supply current per input pin; VI = VCC − 2.1 V andother inputs at VCC or GND;IO = 0 A; VCC = 4.5 V to 5.5 V

pins SHR, SHCP, STCP, STR - 150 540 µA

pin DS - 25 90 µA

Ci input capacitance - 3.5 - pF

Tamb = −40 °C to +85 °C

VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 - - V

VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - - 0.8 V



IO = −4.0 mA; VCC = 4.5 V 3.84 - - V


IO = −6.0 mA; VCC = 4.5 V 3.84 - - V


Serial data output

IO = 4.0 mA; VCC = 4.5 V - - 0.33 V


IO = 6.0 mA; VCC = 4.5 V - - 0.33 V



- - 80 µA





pins SHR, SHCP, STCP, STR - - 675 µA

pin DS - - 112.5 µA

Tamb = −40 °C to +125 °C

VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 - - V

VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - - 0.8 V



IO = −4.0 mA; VCC = 4.5 V 3.7 - - V


IO = −6.0 mA; VCC = 4.5 V 3.7 - - V



IO = 4.0 mA; VCC = 4.5 V - - 0.4 V


IO = 6.0 mA; VCC = 4.5 V - - 0.4 V



- - 160 µA


pins SHR, SHCP, STCP, STR - - 735 µA

pin DS - - 122.5 µA

Table 7. Static characteristics type 74HCT594 …continuedAt recommended operating conditions; voltages are referenced to GND (ground = 0 V).





11. Dynamic characteristics

Table 8. Dynamic characteristics type 74HC594GND = 0 V; tr = tf = 6 ns; CL = 50 pF; see Figure 15.

Symbol Parameter Conditions 25 °C −40 °C to +85 °C −40 °C to +125 °C Unit

Min Typ Max Min Max Min Max

tpd propagationdelay

SHCP to Q7S;see Figure 9

[1]

VCC = 2.0 V - 44 150 - 185 - 225 ns

VCC = 4.5 V - 16 30 - 37 - 45 ns

VCC = 5.0 V;CL = 15 pF

- 13 - - - - - ns

VCC = 6.0 V - 14 26 - 31 - 38 ns

STCP to Qn; seeFigure 10

VCC = 2.0 V - 44 150 - 185 - 225 ns

VCC = 4.5 V - 16 30 - 37 - 45 ns

VCC = 5.0 V;CL = 15 pF

- 13 - - - - - ns

VCC = 6.0 V - 14 26 - 31 - 38 ns

tPHL HIGH toLOWpropagationdelay

SHR to Q7S; seeFigure 13

VCC = 2.0 V - 39 150 - 185 - 225 ns

VCC = 4.5 V - 14 30 - 37 - 45 ns

VCC = 5.0 V;CL = 15 pF

- 11 - - - - - ns

VCC = 6.0 V - 12 26 - 31 - 38 ns

STR to Qn; seeFigure 14

VCC = 2.0 V - 39 125 - 155 - 185 ns

VCC = 4.5 V - 14 25 - 31 - 37 ns

VCC = 5.0 V;CL = 15 pF

- 11 - - - - - ns

VCC = 6.0 V - 12 21 - 26 - 31 ns

tTHL HIGH toLOW outputtransitiontime

see Figure 9


VCC = 2.0 V - 19 75 - 95 - 110 ns

VCC = 4.5 V - 7 15 - 19 - 22 ns

VCC = 6.0 V - 6 13 - 16 - 19 ns


VCC = 2.0 V - 14 60 - 75 - 90 ns

VCC = 4.5 V - 5 12 - 15 - 18 ns

VCC = 6.0 V - 4 10 - 13 - 15 ns




tTLH LOW toHIGH outputtransitiontime

see Figure 9


VCC = 2.0 V - 19 75 - 95 - 110 ns

VCC = 4.5 V - 7 15 - 19 - 22 ns

VCC = 6.0 V - 6 13 - 16 - 19 ns


VCC = 2.0 V - 14 60 - 75 - 90 ns

VCC = 4.5 V - 5 12 - 15 - 18 ns

VCC = 6.0 V - 4 10 - 13 - 15 ns

tW pulse width SHCP (HIGH orLOW); seeFigure 9

VCC = 2.0 V 80 10 - 100 - 120 - ns

VCC = 4.5 V 16 4 - 20 - 24 - ns

VCC = 6.0 V 14 3 - 17 - 20 - ns

STCP (HIGH orLOW); seeFigure 10

VCC = 2.0 V 80 10 - 100 - 120 - ns

VCC = 4.5 V 16 4 - 20 - 24 - ns

VCC = 6.0 V 14 3 - 17 - 20 - ns

SHR and STR(HIGH or LOW);see Figure 13and Figure 14

VCC = 2.0 V 80 14 - 100 - 120 - ns

VCC = 4.5 V 16 5 - 20 - 24 - ns

VCC = 6.0 V 14 4 - 17 - 20 - ns

Table 8. Dynamic characteristics type 74HC594 …continuedGND = 0 V; tr = tf = 6 ns; CL = 50 pF; see Figure 15.






tsu set-up time DS to SHCP;see Figure 11

VCC = 2.0 V 100 10 - 125 - 150 - ns

VCC = 4.5 V 20 4 - 25 - 30 - ns

VCC = 6.0 V 17 3 - 21 - 26 - ns

SHR to STCP;see Figure 12

VCC = 2.0 V 100 14 - 125 - 150 - ns

VCC = 4.5 V 20 5 - 25 - 30 - ns

VCC = 6.0 V 17 4 - 21 - 26 - ns

SHCP to STCP;see Figure 10

VCC = 2.0 V 100 17 - 125 - 150 - ns

VCC = 4.5 V 20 6 - 25 - 30 - ns

VCC = 6.0 V 17 5 - 21 - 26 - ns

th hold time DS to SHCP;see Figure 11

VCC = 2.0 V 25 −8 - 30 - 35 - ns

VCC = 4.5 V 5 −3 - 6 - 7 - ns

VCC = 6.0 V 4 −2 - 5 - 6 - ns

trec recoverytime

SHR to SHCPandSTR to STCP;see Figure 13and Figure 14

VCC = 2.0 V 50 −14 - 65 - 75 - ns

VCC = 4.5 V 10 −5 - 13 - 15 - ns

VCC = 6.0 V 9 −4 - 11 - 13 - ns

fmax maximumfrequency

SHCP or STCP;see Figure 9 andFigure 10

VCC = 2.0 V 6.0 30 - 4.8 - 4.0 - MHz

VCC = 4.5 V 30 92 - 24 - 20 - MHz

VCC = 5.0 V;CL = 15 pF

- 100 - - - - - MHz

VCC = 6.0 V 35 109 - 28 - 24 - MHz







[1] tpd is the same as tPHL and tPLH.

[2] CPD is used to determine the dynamic power dissipation (PD in µW):

PD = CPD × VCC2 × fi × N + ∑(CL × VCC

2 × fo) where:

fi = input frequency in MHz;

fo = output frequency in MHz;

CL = output load capacitance in pF;

VCC = supply voltage in V;

N = number of inputs switching;

∑(CL × VCC2 × fo) = sum of outputs.

CPD powerdissipationcapacitance

VI = GND to VCC;VCC = 5 V;fi = 1 MHz

[2] - 84 - - - - - pF




Table 9. Dynamic characteristics type 74HCT594GND = 0 V; VCC = 4.5 V; tr = tf = 6 ns; CL = 50 pF; see Figure 15.



tpd propagationdelay

SHCP to Q7S;see Figure 9

[1] - 18 32 - 40 - 48 ns

VCC = 5.0 V;CL = 15 pF

- 15 - - - - - ns

STCP to Qn; seeFigure 10

- 18 32 - 40 - 48 ns

VCC = 5.0 V;CL = 15 pF

- 15 - - - - - ns

tPHL HIGH toLOWpropagationdelay

SHR to Q7S; seeFigure 13

- 17 30 - 38 - 45 ns

VCC = 5.0 V;CL = 15 pF

- 14 - - - - - ns

STR to Qn; seeFigure 14

- 17 30 - 38 - 45 ns

VCC = 5.0 V;CL = 15 pF

- 14 - - - - - ns

tTHL HIGH toLOW outputtransitiontime

see Figure 9


VCC = 4.5 V - 7 15 - 19 - 22 ns


VCC = 4.5 V - 5 12 - 15 - 18 ns

tTLH LOW toHIGH outputtransitiontime

see Figure 9


VCC = 4.5 V - 7 15 - 19 - 22 ns


VCC = 4.5 V - 5 12 - 15 - 18 ns




[1] tpd is the same as tPHL and tPLH.

[2] CPD is used to determine the dynamic power dissipation (PD in µW):

PD = CPD × VCC2 × fi × N + ∑(CL × VCC

2 × fo) where:

fi = input frequency in MHz;

fo = output frequency in MHz;

CL = output load capacitance in pF;

VCC = supply voltage in V;

N = number of inputs switching;

∑(CL × VCC2 × fo) = sum of outputs.

tW pulse width SHCP (HIGH orLOW); seeFigure 9

16 4 - 20 - 24 - ns

STCP (HIGH orLOW); seeFigure 10

16 4 - 20 - 24 - ns

SHR and STR(HIGH or LOW);see Figure 13and Figure 14

16 6 - 20 - 24 - ns

tsu set-up time DS to SHCP;see Figure 11

20 4 - 25 - 30 - ns

SHR to STCP;see Figure 12

20 6 - 25 - 30 - ns

SHCP to STCP;see Figure 10

20 7 - 25 - 30 - ns

th hold time DS to SHCP;see Figure 11

5 −3 - 6 - 7 - ns

trec recoverytime

SHR to SHCPandSTR to STCP;see Figure 13and Figure 14

10 −5 - 13 - 15 - ns

fmax maximumfrequency

SHCP or STCP;see Figure 9 andFigure 10

30 92 - 24 - 20 - MHz

VCC = 5.0 V;CL = 15 pF

- 100 - - - - - MHz

CPD powerdissipationcapacitance

VI = GND to VCC− 1.5 V;VCC = 5 V;fi = 1 MHz

[2] - 89 - - - - - pF

Table 9. Dynamic characteristics type 74HCT594 …continuedGND = 0 V; VCC = 4.5 V; tr = tf = 6 ns; CL = 50 pF; see Figure 15.






12. Waveforms

Measurement points are given in Table 10.

tPLH and tPHL are the same as tpd.

tTLH = LOW to HIGH output transition time; tTHL = HIGH to LOW output transition time.

Fig 9. The shift clock (SHCP) to output (Q7S) propagation delays, the shift clock pulsewidth, the maximum shift clock frequency, and output transition times



Fig 10. The storage clock (STCP) to output (Qn), propagation delays, the storage clockpulse width, the maximum storage clock pulse frequency and the shift clock tostorage clock set-up time

001aae341

SHCP input

Q7S output

VM

tPLH

tTLH tTHL

tPHL

VM

tW

1/fmax

VM

tW

1/ fmax

VM

VM

tsu

tPLH

Qn outputs

STCP input

SHCP input

tPHL

mla512





The shaded areas indicate when the input is permitted to change for predictable outputperformance.

Fig 11. The data set-up time and hold times for DS input to SHCP


Fig 12. The set-up time shift reset ( SHR) to storage clock (STCP)

001aae342

th

tsu

th

tsu

VM

VM

VMQ7 output

SHCP input

DS input

mbc326

VM

tsu

VM

VM

STCP input

Qn outputs

SHR input






Fig 13. The shift reset ( SHR) pulse width, the shift reset to output (Q7S) propagation delayand the shift reset to shift clock (SHCP) recovery time



Fig 14. The storage reset ( STR) pulse width, the storage reset to output (Qn) propagationdelay and the storage reset to storage clock (STCP) recovery time

Table 10. Measurement points

Type Input Output

VM VM

74HC594 0.5 × VCC 0.5 × VCC

74HCT594 1.3 V 1.3 V

mbc324

VM

tPHL

VM

trectW

VM

SHCP input

Q7S output

SHR input

mbc325

VM

tPHL

VM

trectW

VM

STCP input

Qn outputs

STR input




Test data is given in Table 11.

Definitions test circuit:

RT = Termination resistance should be equal to output impedance Zo of the pulse generator

CL = Load capacitance including jig and probe capacitance

RL = Load resistor

S1 = Test selection switch

Fig 15. Load circuitry for measuring switching times

Table 11. Test data

Type Input Load S1 position

VI tr, tf CL RL tPHL, tPLH tPZH, tPHZ tPZL, tPLZ

74HC594 VCC 6 ns 15 pF, 50 pF 1 kΩ open GND VCC

74HCT594 3 V 6 ns 15 pF, 50 pF 1 kΩ open GND VCC

VM VM

tW

tW

10 %

90 %

0 V

VI

VI

negativepulse

positivepulse

0 V

VM VM

90 %

10 %

tf

tr

tr

tf

001aad983

DUT

VCC VCC

VI VO

RT

RL S1

CL

openPULSEGENERATOR




13. Package outline

Fig 16. Package outline SOT109-1 (SO16)

X

w M

θ

AA1

A2

bp

D

HE

Lp

Q

detail X

E

Z

e

c

L

v M A

(A )3

A

8

9

1

16

y

pin 1 index

UNITA

max. A1 A2 A3 bp c D (1) E(1) (1)e HE L L p Q Zywv θ

REFERENCESOUTLINEVERSION

EUROPEANPROJECTION ISSUE DATE

IEC JEDEC JEITA

mm

inches

1.750.250.10

1.451.25

0.250.490.36

0.250.19

10.09.8

4.03.8

1.276.25.8

0.70.6

0.70.3 8

0

o

o

0.25 0.1

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

Note

1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.

1.00.4

SOT109-199-12-2703-02-19

076E07 MS-012

0.0690.0100.004

0.0570.049

0.010.0190.014

0.01000.0075

0.390.38

0.160.15

0.05

1.05

0.0410.2440.228

0.0280.020

0.0280.012

0.01

0.25

0.01 0.0040.0390.016

0 2.5 5 mm

scale

SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1




Fig 17. Package outline SOT338-1 (SSOP16)

UNIT A1 A2 A3 bp c D (1) E (1) e HE L L p Q Zywv θ



IEC JEDEC JEITA

mm 0.210.05

1.801.65

0.250.380.25

0.200.09

6.46.0

5.45.2

0.65 1.257.97.6

1.030.63

0.90.7

1.000.55

80

o

o0.130.2 0.1

DIMENSIONS (mm are the original dimensions)

Note

1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

SOT338-199-12-2703-02-19

(1)

w Mbp

D

HE

E

Z

e

c

v M A

XA

y

1 8

16 9

θ

AA1

A2

Lp

Q

detail X

L

(A )3

MO-150

pin 1 index

0 2.5 5 mm

scale

SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1

Amax.

2




Fig 18. Package outline SOT38-4 (DIP16)



IEC JEDEC JEITA

SOT38-495-01-1403-02-13

MH

c

(e )1

ME

A

L

seat

ing

plan

e

A1

w Mb1

b2

e

D

A2

Z

16

1

9

8

E

pin 1 index

b

0 5 10 mm

scale

Note

1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.

UNIT Amax.

1 2 b1(1) (1) (1)

b2 c D E e M ZHL

mm

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

A min.

A max. b

max.wMEe1

1.731.30

0.530.38

0.360.23

19.5018.55

6.486.20

3.603.05

0.2542.54 7.628.257.80

10.08.3

0.764.2 0.51 3.2

inches 0.0680.051

0.0210.015

0.0140.009

1.250.85

0.0490.033

0.770.73

0.260.24

0.140.12

0.010.1 0.30.320.31

0.390.33

0.030.17 0.02 0.13

DIP16: plastic dual in-line package; 16 leads (300 mil) SOT38-4




14. Abbreviations

15. Revision history

Table 12. Abbreviations

Acronym Description

CMOS Complementary Metal Oxide Semiconductor

DUT Device Under Test

ESD ElectroStatic Discharge

HBM Human Body Model

LSTTL Low-Power Schottky Transistor-Transistor Logic

MM Machine Model

TTL Transistor-Transistor Logic

Table 13. Revision history

Document ID Release date Data sheet status Change notice Supersedes

74HC_HCT594_3 20061220 Product data sheet - 74HC_HCT594_CNV_2

Modifications: • The format of this data sheet has been redesigned to comply with the new identity guidelinesof NXP Semiconductors.

• Legal texts have been adapted to the new company name where appropriate.

• Table 1 “Ordering information” updated.

74HC_HCT594_CNV_2 19970908 Product specification - 74HC_HCT594_CNV_1




16. Legal information

16.1 Data sheet status

[1] Please consult the most recently issued document before initiating or completing a design.

[2] The term ‘short data sheet’ is explained in section “Definitions”.

[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product statusinformation is available on the Internet at URL http://www.nxp.com.

16.2 Definitions

Draft — The document is a draft version only. The content is still underinternal review and subject to formal approval, which may result inmodifications or additions. NXP Semiconductors does not give anyrepresentations or warranties as to the accuracy or completeness ofinformation included herein and shall have no liability for the consequences ofuse of such information.

Short data sheet — A short data sheet is an extract from a full data sheetwith the same product type number(s) and title. A short data sheet is intendedfor quick reference only and should not be relied upon to contain detailed andfull information. For detailed and full information see the relevant full datasheet, which is available on request via the local NXP Semiconductors salesoffice. In case of any inconsistency or conflict with the short data sheet, thefull data sheet shall prevail.

16.3 Disclaimers

General — Information in this document is believed to be accurate andreliable. However, NXP Semiconductors does not give any representations orwarranties, expressed or implied, as to the accuracy or completeness of suchinformation and shall have no liability for the consequences of use of suchinformation.

Right to make changes — NXP Semiconductors reserves the right to makechanges to information published in this document, including withoutlimitation specifications and product descriptions, at any time and withoutnotice. This document supersedes and replaces all information supplied priorto the publication hereof.

Suitability for use — NXP Semiconductors products are not designed,authorized or warranted to be suitable for use in medical, military, aircraft,space or life support equipment, nor in applications where failure or

malfunction of a NXP Semiconductors product can reasonably be expected toresult in personal injury, death or severe property or environmental damage.NXP Semiconductors accepts no liability for inclusion and/or use of NXPSemiconductors products in such equipment or applications and thereforesuch inclusion and/or use is at the customer’s own risk.

Applications — Applications that are described herein for any of theseproducts are for illustrative purposes only. NXP Semiconductors makes norepresentation or warranty that such applications will be suitable for thespecified use without further testing or modification.

Limiting values — Stress above one or more limiting values (as defined inthe Absolute Maximum Ratings System of IEC 60134) may cause permanentdamage to the device. Limiting values are stress ratings only and operation ofthe device at these or any other conditions above those given in theCharacteristics sections of this document is not implied. Exposure to limitingvalues for extended periods may affect device reliability.

Terms and conditions of sale — NXP Semiconductors products are soldsubject to the general terms and conditions of commercial sale, as publishedat http://www.nxp.com/profile/terms, including those pertaining to warranty,intellectual property rights infringement and limitation of liability, unlessexplicitly otherwise agreed to in writing by NXP Semiconductors. In case ofany inconsistency or conflict between information in this document and suchterms and conditions, the latter will prevail.

No offer to sell or license — Nothing in this document may be interpretedor construed as an offer to sell products that is open for acceptance or thegrant, conveyance or implication of any license under any copyrights, patentsor other industrial or intellectual property rights.

16.4 TrademarksNotice: All referenced brands, product names, service names and trademarksare the property of their respective owners.

17. Contact information

For additional information, please visit: http://www .nxp.com

For sales office addresses, send an email to: salesad [email protected]

Document status [1] [2] Product status [3] Definition

Objective [short] data sheet Development This document contains data from the objective specification for product development.

Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.

Product [short] data sheet Production This document contains the product specification.



http://www.nxp.com

http://www.nxp.com/profile/terms


18. Contents

1 General description . . . . . . . . . . . . . . . . . . . . . . 12 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Ordering information . . . . . . . . . . . . . . . . . . . . . 25 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 26 Pinning information . . . . . . . . . . . . . . . . . . . . . . 46.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 57 Functional description . . . . . . . . . . . . . . . . . . . 68 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 69 Recommended operating conditions. . . . . . . . 710 Static characteristics. . . . . . . . . . . . . . . . . . . . . 711 Dynamic characteristics . . . . . . . . . . . . . . . . . 1212 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1713 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 2114 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 2415 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 2416 Legal information. . . . . . . . . . . . . . . . . . . . . . . 2516.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 2516.2 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2516.3 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 2516.4 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 2517 Contact information. . . . . . . . . . . . . . . . . . . . . 2518 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

© NXP B.V. 2006. All rights reserved.For more information, please visit: http://www.nxp.comFor sales office addresses, please send an email to: [email protected]

Date of release: 20 December 2006

Document identifier: 74HC_HCT594_3

Please be aware that important notices concerning this document and the product(s)described herein, have been included in section ‘Legal information’.

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