A Non-Inverting Buck-Boost DC-DC Switching

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IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. X, NO. X, JANUARY 2010 1

A Non-Inverting Buck-Boost DC-DC SwitchingConverter with High Efficiency and Wide

BandwidthCarlos Restrepo∗, Student Member, IEEE,Javier Calvente,Member, IEEE,Angel Cid-Pastor,Member, IEEE,

Abdelali El Aroudi, Member, IEEE,and Roberto Giral,Senior Member, IEEE

Abstract—A novel DC-DC switching converter consisting ofa boost stage cascaded with a buck converter with their coilsmagnetically coupled is presented. The disclosed converter hasthe same step-up or step down voltage conversion propertiesthan the single inductor non-inverting buck-boost converter butexhibits non-pulsating input and output currents. The convertercontrol-to-output transfer function is continuous between oper-ation modes if a particular magnetic coupling is selected. Theaddition of a damping network improves the dynamics andresults in a control-to-output transfer function that has, evenin boost mode, two dominant complex poles without right halfplane zeroes. An example shows that an output voltage controllercan be designed with the same well-known techniques usuallyapplied to the second-order buck regulator. Details of a prototypeand experimental results including efficiency, frequency andtime domain responses are presented. The experimental resultsvalidate the theoretical expected advantages of the converter,namely, good efficiency, wide bandwidth and simplicity of controldesign.

Index Terms—Non-inverting buck-boost converter, coupledinductors, right-half-plane (RHP) zero, high efficiency, wide-bandwidth, high-side driver.

I. I NTRODUCTION

I N many converter applications such as battery charging anddischarging, power factor correction, fuel cell regulation,

maximum power point tracking of solar panels, a DC-DCconverter is used to obtain a regulated voltage from anunregulated source. When the regulated voltage is within thevoltage range of the unregulated voltage source, a step-up/step-down DC-DC converter is required [1]–[13].

Step-up/step-down DC-DC converters with a single activeswitch, such as buck-boost, flyback, SEPIC andCuk topolo-gies, have high component stresses and low efficiencies in thesame operating point than the boost or the buck converter ifthe output voltage is greater or smaller than the input voltagerespectively [14].

It is possible to combine a buck with a boost to obtain a twoindependently controllable switch buck-boost converter with

This work was supported by the Spanish Ministerio de Ciencia e Inovacionunder the projects ESP2006-12855-C03-02, CSD2009-00046, TEC2009-13172, DPI2010-16481 and the FPU scholarship AP2008-03305.

C. Restrepo, J. Calvente, A. Cid-Pastor, A. El Aroudi and R. Giral arewith the Departament d’Enginyeria Electronica, Electrica i Automatica, EscolaTecnica Superior d’Enginyeria, Universitat Rovira i Virgili, 43007 Tarragona,Spain.∗Corresponding author. Email: [email protected]. Postal Address:

Avda. Paısos Catalans 26, Campus Sescelades, 43007, Tarragona, Spain. Fax:(+34)977559605. Telephone number: (+34)977297052.

size and performance comparable to those of the simple buckor boost stages [15]. For example, combining a buck in cascadewith a boost results in a single inductor non-inverting buck-boost converter that exhibits high performance and it is widelyused in low voltage applications [4]–[8]. These converters donot operate in buck-boost mode because it is more efficientto operate them either in buck mode if the output voltage islower than the input one or in boost mode in the oppositecase [2]. There are also high efficiency non-inverting buck-boost converters at higher operational voltages [12], [13] withthe drawback of a complex control. In [12], the authors statethat the detailed modelling of the plant and the controlleris an ongoing work. In [13], two different output voltageregulators are required depending on either boost or buck modeof operation.

The single inductor non-inverting buck-boost converter isused in applications where it is important to have low size andcost of the magnetic elements. However, when the voltagesare high, the size of the capacitors of this converter is alsoimportant. In that case, it can be interesting to use the cascadebuck-boost power converter that has two inductors, one at theinput and another at the output [1], [3]. With these inductors,the input and output currents are non-pulsating, the noise levelis lower and the control and the limiting of the currents canbe easier than in the pulsating case.

Most of the converters mentioned above, when operatingin continuous conduction boost mode, have a right-half-plane(RHP) zero that makes the controller design a difficult task,limits the bandwidth of the loop and penalizes the sizeof the output capacitor [6]. One possible solution to theseproblems is a topology named KY buck-boost converter [16].This converter has a very fast transient response, which isachieved by using switched capacitors for energy transfer, andis advisable for low power applications. The tri-state boostconverter reported in [17] eliminates the RHP zero but exhibitsa poor efficiency, this technique having never been appliedto the buck-boost topology. In [11] a two inductor boostsuperimposed with a buck converter solves satisfactorily theRHP zero problem but both active switches of the structureare floating, what requires complex drivers. Another solutionto the problem of the RHP zeros adopted in the work herereported is using magnetic coupling between inductors [18]combined with damping networks [19], [20]. This solution hasallowed the design of high-power boost converters with highefficiency and wide bandwidth [21]–[23].




Lm

vg RoQ1

Q2

+

−

L

Ds2

Ds1

vo

+

−

Co

ig iLmiL

1 : n

vC

+

−

C

Fig. 1. Schematic circuit diagram of the buck-boost converter with magneticcoupling between inductors.

The purpose of this paper is to analyze the cascaded con-nection of a boost and buck converter, with magnetic couplingbetween inductors, shown in Fig. 1. This converter can operatein boost mode, as in Fig. 2(a), and buck mode, as in Fig. 2(b).Both topologies have non-minimum phase transfer functionsunder certain parametric conditions and have been previouslyproposed for battery charge/discharge regulators for satellites[24]. As it will be seen, the proposed converter exhibits highefficiency in the desired range of operation in spite of usingdiodes instead of synchronous rectification. It also presents awide bandwidth and low current ripples that reduce the sizeof the input capacitor and especially that of the output one.Finally, the converter control is simple in comparison with thestate-of-the-art, what could reduce design costs.

The remainder part of this paper is organized as follows:Section II presents the key waveforms of the converter anddiscusses the small-signal converter model. In the same sec-tion, the turns ration of the transformer that avoids the needof using two transfer functions, namely, one for the buckmode and another one for the boost mode, is also determined.This allows to use the same transfer function to describe theconverter in both modes and simplifies the controller design.A damping network is added in Section III where analyticalexpressions are obtained to design a minimum phase transferfunction. Section IV focuses on a complete circuit designfor the buck-boost converter and its control. Finally, the lasttwo sections present respectively simulated and experimentalresults, and the conclusions of this work.

II. A NALYSIS OF THE BUCK-BOOSTCONVERTER WITH

MAGNETIC COUPLING BETWEEN INDUCTORS

Lets us consider the unidirectional buck-boost converterwith magnetic coupling between the input and output inductorsshown in Fig. 1. The current and voltage typical waveformsof this converter in steady state are depicted in Fig. 3. Inboost mode, the currents are shown in Fig. 3 (a) and thecorresponding voltages in Fig. 3 (b). Fig. 3 (c) and (d)represent current and voltage waveforms in buck mode. Thebottom traces of each plot correspond tou1 andu2, which arerespectively the logic activation signals of switchesQ1 andQ2. In boost modeu2 = 1 while u1 is switching whereas inbuck modeu1 = 0 while u2 switches. The duty cycles ofu1

and u2 have been adjusted to obtain a mean output voltageof 48 V. In a typical design, the ripple in the intermediatecapacitor voltagevC is bigger than that of the output voltage,which permits to use a small intermediate capacitor. As it can

Lm

vg RoQ1

+

−

LDs1

vo

+

−

Co

ig iLmiL

1 : n

vC

+

−

C

(a)

Lm

vg Ro

Q2

+

−

L

Ds2vo

+

−

Co

ig iLmiL

1 : n

vC

+

−

C

(b)

Fig. 2. Operating modes of the buck-boost converter: (a) boost mode; (b)buck mode.

be observed from Fig. 3, a common characteristic of the twooperation modes is that currentsig and iL are non-pulsatingwith triangular-shaped ripple.

Assuming a continuous conduction mode (CCM) of oper-ation, no parasitic effects and a switching frequency muchhigher than the converter natural frequencies, the use ofthe state space averaging (SSA) method [25] to model theconverter leads to the following set of differential equations

diLm(t)dt

=vg(t)− vC(t)(1− d1(t))

Lm

diL(t)dt

=vC(t)d2(t) + n(vg(t)− vC(t)(1− d1(t)))

L

−vo(t)L

dvC(t)dt

=−iL(t)d2(t) + (iLm(t) + niL(t))(1− d1(t))

Cdvo(t)

dt=

iL(t)Co

− vo(t)RoCo

(1)

whered1 andd2 are the duty cycles of the switchesQ1 andQ2

respectively and the overline stands for averaging during oneswitching period. A circuital procedure to obtain equations (1)is by means of the replacement of the switches in the converterby their time averaged models [26], which leads to the largesignal averaged circuit of Fig. 4(a). Assuming that the con-verter is in steady-state with constant duty cycles,d1(t) = D1

andd2(t) = D2, and input voltagevg(t) = Vg, and using theprinciples of inductor volt-second and capacitor charge balance[14], the steady-state expressions of the inductor currents andcapacitor voltages are




i Q1[A

]

0

2.1

10.3i Q

2[A

]

3.7

6.3

i L[A

]

3.7

6.3

i g[A

]

2.1

10.3

0 T 2T 3T

u1,

u2

0

1

(a)

vQ

1[V

]

0

50

vQ

2[V

]

−10

0

10

vo[V

]

47.8

48

48.2

vC

[V]

44.9

49.4

0 T 2T 3T

u1,

u2

0

1

(b)

i Q1[A

]

−1

0

1

i Q2[A

]

0

4.1

5.9

i L[A

]

4.1

5.9

i g[A

]

3.6

5.5

0 T 2T 3T

u1,

u2

0

1

(c)

vQ

1[V

]

54.4

56.2

vQ

2[V

]

0

54.456.2

vo[V

]

47.8

48

48.2

vC

[V]

53.8

55.6

0 T 2T 3T

u1,

u2

0

1

(d)Fig. 3. Typical waveforms of the Fig 1 converter forVo = 48 V: (a), (b) currents and voltages in boost mode withVg = 39 V; (c), (d) currents and voltagesin buck mode withVg = 55 V. Logic signalsu1 (in black) andu2 (in white) indicate switchQ1 andQ2 states respectively.

ILm =VgD2(D2 − n + nD1)

Ro(1−D1)2

IL =VgD2

Ro(1−D1)

VC =Vg

1−D1

Vo =VgD2

1−D1(2)

These equations could be also derived from (1) by notingthat, in steady-state, the derivatives are zero or, equivalently,from the DC circuit of Fig 4(b). It is worth noting that theDC values of the state variablesvo, vC andiL do not dependon the transformer turns ration. From the output capacitorvoltageVo in (2) the voltage conversion ratioM(D1, D2) isgiven by

M(D1, D2) ≡ Vo

Vg=

D2

1−D1(3)

Our goal is that the converter could operate in both boost(0 < D1 < 1 andD2 = 1) or buck(0 < D2 < 1 andD1 = 0)modes, and that it could switch from one mode to another ina smooth form. Let us define a single control variableu thatcan take the values between0 and 2 (0 < u < 2). The dutycyclesD1 andD2 are related to the new variableu as

D1 = max(0, u− 1)D2 = min(1, u) (4)

The new voltage conversion ratio can be expressed as follows

M(u) =min(1, u)

1−max(0, u− 1)(5)

With this control input, the DC voltage conversion ratioM(u)is continuous between the boost and buck modes of operation,as depicted in Fig. 5(a). In the border between the two modesof operationu = 1, so thatD1 = 0 and D2 = 1. Fig. 5(b)shows how to generate the switch activation signalsu1(t) and




Lm

vg Ro

+

−

L

vo

+

−

Co

ig iLmiL

1 : n

vC

+

−

C(iLm + niL)d1

iLd2

+−

vCd1

vCd2+

−

(a)

Vg Ro

+

−Vo

+

−

Ig ILmIL

1 : n

VC

+

−

(ILm + nIL)D1

ILD2

+−

VCD1

VCD2+

−

(b)

Fig. 4. Schematic circuit diagrams of the buck-boost converter with magneticcoupling between inductors: (a) large-signal averaged model and (b) DCmodel.

u2(t) from the control signalu, and a symmetric triangularwave of amplitudeVramp = 1 V.

0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.60

0.5

1

1.5

2

2.5

3

u

M(u

)

(a)

(b)

Fig. 5. (a) DC conversion ratioM(u) of the buck-boost converter.; (b)activation signal generation: comparison of control signals with a triangularsignal to obtain the MOSFETs binary activation signalsu1(t) andu2(t).

To obtain a small-signal model around a steady-state op-erating point, we assume that the input voltage is constantand the duty cyclesd1(t) andd2(t) are equal toD1 andD2

plus some superimposed small AC variationsd1(t) and d2(t)respectively.

vg(t) = Vg

d1(t) = D1 + d1(t)

d2(t) = D2 + d2(t) (6)

After these inputs are considered, the averaged inductorcurrents and capacitor voltages can also be expressed interms of their corresponding steady-state values plus somesuperimposed small AC variations.

iLm(t) = ILm

+ iLm(t)

iL(t) = IL + iL(t)vC(t) = VC + vC(t)vo(t) = Vo + vo(t) (7)

With the assumption that the AC variations are much smallerthan the steady-state values, it is possible to linearize the set ofdifferential equations (1). The small signal state-space vectorx is defined as

x =[

iLm iL vC vo

]T(8)

Linearizing (1) around the equilibrium point (2) and sepa-rating the dynamic AC small-signal terms from the DC steady-state component, the following dynamic model is obtained

dx

dt= Ax + B1d1 + B2d2 (9)

whereA is the state matrix andB1 and B2 are respectivelythe input vectors corresponding tod1 andd2.

A =

0 0 D1−1Lm

00 0 D2+n(−1+D1)

L − 1L

1−D1C

n(1−D1)−D2C 0 0

0 1Co

0 − 1RoCo

B1 =[− Vg

Lm(D1−1) − nVg

L(D1−1) − VgD22

CRo(D1−1)2 0]T

B2 =[

0 − Vg

L(D1−1)VgD2

CRo(D1−1) 0]T

Hence, in the boundary between the two modes of operation,the small-signal control-to-output transfer function with re-spect to the duty cycled1 is

Gvod1(s)∣∣∣∣u=1

≡ vo(s)

d1(s)

∣∣∣∣u=1

=N1(s)D(s)

(10)

where

N1(s) = Vg(RonCLms2 + (Lmn− Lm)s + Ro)D(s) = LmCLRoCos

4 + LmCLs3 + (LmRoCo

− 2LmnRoCo + LmCRo + LRoCo

+ Lmn2RoCo)s2 + (Lm − 2Lmn

+ Lmn2 + L)s + Ro




In the same way, the small-signal control-to-output transferfunction with respect to the duty cycled2 is


≡ vo(s)

d2(s)

∣∣∣∣u=1

=N2(s)D(s)

(11)

where

N2(s) = Vg(RoCLms2 + (Lmn− Lm)s + Ro)

If the turns ration is equal to1, the transfer functionsGvod1(s)andGvod2(s) are coincident, and

Gvod1(s)∣∣∣∣u=1; n=1

= Gvod2(s)∣∣∣∣u=1; n=1

=VgRo

LRoCos2 + Ls + Ro(12)

A similar procedure can be used to determine the small-signalcontrol-to-output transfer functionsGiLd1(s) and GiLd2(s).These transfer functions are also identical between the twomodes of operation ifn = 1.

GiLd1(s)∣∣∣∣u=1; n=1

= GiLd2(s)∣∣∣∣u=1; n=1

=Vg(RoCos + 1)

LRoCos2 + Ls + Ro(13)

Gvod1(s)∣∣∣∣D2=1;n=1

=N3(s)D3(s)

(14)

where

N3(s) = Vg((LmCRo − LmCRoD1)s2 − LmD1s

+(Ro + RoD12 − 2RoD1)) (15)

D3(s) = (D1 − 1)2(LmCLRoCos4 + LmCLs3

+(LmD12RoCo + LmCRo + LRoCo

−2D1LRoCo + D12LRoCo)s2) + (LmD1

2 + L

−2D1L + D12L)s + (Ro − 2RoD1 + RoD1

2))(16)

According to (15),Gvod1 has two RHP zeroes. The presenceof these RHP zeroes tends to destabilize feedback loops withwide bandwidth making the converter prone to oscillation [15].The dynamics of the zeroes is the inner behavior of the systemwhen the control is regulating the output without error, e.g., ina high gain closed-loop linear system, the poles are attractedby the zeroes. In a converter with an ideal regulation of theoutput voltage, the inner dynamics is usually associated to theinput filter. Thanks to the magnetic coupling, the dynamicsof the zeroes of our converter in boost mode is of secondorder, associated to the variablesiLm and vc. Note that thezeroes in (15) depend on the parametersLm andC. Therefore,damping the dynamics ofiLm and/orvc by adding a passivenetwork could transfer the RHP zeroes to the left half-plane(LHP). Following a similar procedure to the one reportedin [18]- [19], a passive network has been connected to the

intermediate capacitor. This damping network can be seen asa low frequency snubber. The modified procedure to calculatethe parameter values of the passive damping network will begiven in the next section.

III. A NALYSIS OF THE COUPLED INDUCTORS

BUCK-BOOSTCONVERTER WITH DAMPING NETWORK

In this section, the buck-boost converter with the dampingnetwork included, which is depicted in Fig. 6, will be analyzed.The damping network consists of a series connection of aresistor Rd and a capacitorCd connected in parallel withthe converter intermediate capacitorC. With this dampingnetwork included, the SSA model in CCM is

diLm(t)

dt=

vg(t)− vC(t)(1− d1(t))Lm

diL(t)dt

=vC(t)d2(t) + vg(t)− vC(t)(1− d1(t))− vo(t)

LdvC(t)

dt=

−iL(t)d2(t) + (iLm(t) + iL(t))(1− d1(t))C

−vC(t)− vCd(t)

CRd

dvCo(t)dt

=iL(t)Co

− vo(t)CRo

dvCd(t)

dt=

vC(t)− vCd(t)

CdRd(17)

Lm

vg RoQ1

Q2

+

−

L

Ds2

Ds1

vo

+

−

Co

ig iLmiL

1 : 1

vC

+

− vCd

+

−

C

Cd

Rd

Fig. 6. Coupled inductor buck-boost converter withRC type dampingnetwork and turns ratio 1:1 (n = 1).

As it can be expected from (2), withn = 1 and the steady-statebehavior ofVCd

, the converter operating point for constantduty cyclesd1(t) = D1, d2(t) = D2, and input voltagevg(t) = Vg is

ILm =VgD2(D2 + D1 − 1)

Ro(1−D1)2

IL =VgD2

Ro(1−D1)

VC =Vg

1−D1

VCd=

Vg

1−D1

Vo =VgD2

1−D1(18)

Linearizing the set of equations (17) around the operating point(18), we obtain the small-signal SSA model (19)

dx

dt= Ax + B1d1 + B2d2 (19)




where the small signal state vectorx, the state matrixA andthe input vectorsB1 andB2 of the system are now given by

x =[

iLm iL vC vCdvo

]T

A =

0 0 D1−1Lm

0 00 0 D2+D1−1

L 0 − 1L

1−D1C

1−D2−D1C − 1

RdC1

RdC 00 0 1

RdCd− 1

RdCd0

0 1Co

0 0 − 1RoCo

B1 =[− Vg

Lm(D1−1) − Vg

L(D1−1) − VgD22

CRo(D1−1)2 0 0]T

B2 =[

0 − Vg

L(D1−1)VgD2

CRo(D1−1) 0 0]T

The transfer functionsGvod1(s) and Gvod2(s) have nowa third order numerator and a fifth order denominator withtwo dominant complex poles. In the border between buck andboost operation modes, whereu = 1, there is a triple zero-pole cancellation and the two transfer function correspond toexpression (12). Since this control-to-output transfer functionis identical to that of a second order buck converter, it ispossible to design its control loop compensator in the samewell-known way if the internal dynamics corresponding tothe cancelled poles is sufficiently damped. The poles of theinternal dynamics are the roots of the cancelled polynomialsin


= Gvod2(s)∣∣∣∣u=1

=p(s)(vgRo)

p(s)(LRoCos2 + Ls + Ro)(20)

where

p(s) = LmRdCCds3 +(LmCd +LmC)s2 +RdCds+1 (21)

Equating the coefficients of (21) to a third degree polynomialin the following factorized form

p(s) = (ατs + 1)(τ2s2 + 2ζτs + 1) (22)

yields the expression of the damping network capacitor (seeAppendix)

Cd =2ζC(1 + 2αζ + α2)

α(23)

Since it is desired to minimize the size of the capacitorCd,a value ofα = 1 is selected. With this choice, the expressionof the damping resistanceRd is given by

Rd =(1 + 2ζ)

√1 + 2ζ

4ζ(ζ + 1)

√Lm

C(24)

Finally, ζ = 1 is selected as a trade-off between the size of thecapacitor and a sufficient and robust damping of the internaldynamics. The resulting expressions of the damping networkparameters are

Cd = 8C, Rd ≈ 0.65

√Lm

C(25)

In the previous section it was concluded that the small-signalcontrol-to-output transfer functionsGvod1(s) and Gvod2(s)have the same expression atu = 1. Moreover, this expressioncorresponds to the small-signal control-to-output transfer func-tion of a buck converter. To test the validity range of the small-signal model, a PSIM frequency response simulation has beencarried out using the switched model schematic circuit diagramshown in Fig. 7 and compared with the MATLAB calculatedfrequency response corresponding to the SSA model (12). Inboth cases, the parameters, whose selection will be explainedin the next section, are:Lm = 14 µH, C = 2.6 µF,Rd = 1.5 Ω, Cd = 22 µF, L = 30 µH, Co = 110 µF,Ro = 9.6 Ω. Three different input voltagesVg = 39 V(step-up,u > 1), Vg = 48 V (border, u = 1), andVg = 55 V (step-down,u < 1) have been considered. Theduty cycles have been chosen to have a steady state outputvoltageVo = 48 V. The waveforms depicted in Fig. 3 wereobtained for the previous list of component values.

The Bode plots of both frequency responses obtained fromPSIM (switched) and MATLAB (small-signal) are superim-posed for the three different values of the input voltage andare depicted in Fig. 8. In this figure, the maximum frequencyplotted corresponds to50 kHz, which is half of the switchingfrequency. The frequency responses are very similar in shapeto a second order system with two complex poles and nozeroes. We conclude that our buck-boost converter can bemodelled and controlled as a buck converter for the inputvoltage range considered in the example.

Fig. 7. Circuit diagram corresponding to the PSIM simulation used tocalculate the frequency response of the control-to-output transfer function.




103

104

105

−40

−20

0

20

40

60

80

Frequency [Hz]

Ma

gn

itu

de

[d

B]

vg=39 V

vg=48 V

vg=55 V

vg=39 V

vg=48 V

vg=55 V

103

104

105

−250

−200

−150

−100

−50

0

Frequency [Hz]

Ph

ase

[d

eg

]

vg=39 V

vg=48 V

vg=55 V

vg=39 V

vg=48 V

vg=55 V

Fig. 8. Frequency response of the small-signal control-to-output transferfunction. The black lines correspond to the simulation of the switched modelusing PSIM (Fig. 7) while the white lines correspond to MATLAB simulationof the linear small signal model (12).

IV. C IRCUIT DESIGN

A. Buck-boost converter power stage

The buck-boost converter is designed as a battery dischargeregulator (BDR) of 13 in-series Lithium-ion battery cells, sothat an input voltageVg range of39 V to 55 V is considered.The output voltageVo regulates a DC bus of48 V. Themaximum power output is480 W corresponding to a loadresistanceRo = 9.6 Ω and the switching frequency is100 kHz. The parameter values of the buck-boost converter ofFig. 6 have been selected according to specifications of inputand output peak to peak current ripples of4igpp = 12 Aand 4iLpp = 4 A; maximum output impedance ofZomax = 150 mΩ; maximum power dissipation in thedamping resistorPRd

= 4 W, and also expression (25). Theexpressions used to calculate the ripples ofiL, ig andvc arelisted in Table I. If a triangular shapedvc ripple is assumed,the power loss inRd is

PRd=4vCpp

12Rd(26)

The maximum output impedance in closed loop can be calcu-lated approximately as

Zomax =1

2πfcCo(27)

wherefc is the crossover frequency of the voltage loop.

TABLE IPEAK TO PEAK RIPPLE OF THE CONVERTER VARIABLESiL , ig AND vC IN

CCM

Ripple Buck mode Boost mode

4iLpp(Vg − Vo)VoT

VgL

Vg(Vo − Vg)T

VoL

4igpp(Vg − Vo)VoT

VgL

Vg(Vo − Vg)T (L + Lm)

VoLLm

4vCpp(Vg − Vo)V 2

o T

V 2g RoC

(Vo − Vg)T

RoC

After performing a worst case analysis in both buck andboost modes to get the specifications at the nominal power,the finally selected components of the buck-boost converterpower stage are the ones listed in Table II. To achieve agood efficiency, N-channel MOSFETs with low on-resistanceand fast Schottky diodes have been selected. Kool Mµ coreinductors have been chosen by their low-cost and availability.Capacitors that must absorb high pulsed current are ceramic.The ESR (Equivalent Series Resistance) ofCd is much smallerthanRd. All components are rated up to100 V.

TABLE IICOMPONENTS OF BUCK-BOOST CONVERTER

Component Description TypeQ1, Q2 Power MOSFET IRFB4110PbF

Ds1 , Ds2 Schottky Rectifier 40CPQ080GPbFCoupled Core: 77083A7 Magnetics

Lm inductors Wire size: 15 AWGb

Number of turns: 13:13C Ceramic Capacitor 3 × 2.2 µFa

X7R dielectricCo MKT Capacitor 5 × 22 µF

Core: 77083A7 MagneticsL Inductor Wire size: 15 AWGb

Number of turns: 20Rd Damping Resistor 1.5 Ω, 4 WCd MKT Capacitor 22 µF

a The capacitance depends on the operating voltage. ForVc = 48 V the equivalent capacitance is2.6 µF.

b Multifilar equivalent.

B. Buck-boost control circuit

Once the model (12) has been verified in the previoussection, the next step is to design the control loop compensator.A compensation network for the buck converter-like transferfunction plotted in Fig. 8 has been designed following classicalrules [27]. The third order compensator transfer function is

Gc =u

vo= K

(τ3s + 1)(τ4s + 1)s(τ1s + 1)(τ2s + 1)

(28)

where the compensator parameters has been selected as follow:τ1 = 1 µs, τ2 = 2 µs, τ3 = τ4 = 1/(2π) ms, andK = 210 s/V.

The circuit diagram of the compensator and the PWMimplemented in PSIM is presented in Fig. 9(a), where anestimation of the switching delays has been included. Theexistence of delays impedes having extreme duty cycles andcauses a nonlinearity in the transitions between boost and




buck modes [28]. To mitigate these problems, a third modeof operation is permitted in an adjustable small vicinity zonebetween buck and boost modes [7], [28]. The new operationmode is called buck-boost mode because the previous twomodes overlap in interleaving-like manner, i.e., both MOS-FETs can switch in the same period but their switching instantsare almostπ rad out of phase. The overlapping adjustment isachieved by reducing the displacement between the signalsthat generateu1 and u2 when compared with the triangularsignals.

The circuit schematic diagram of the buck-boost controlexperimental stage is shown in Fig. 9(b). The main componentof the control system is the dual PWM controller integratedcircuit TL1451A that generates the switch activation signalsu1(t) and u2(t). This single monolithic chip has two erroramplifiers, an adjustable oscillator, a reference voltage of2.5 V, and dual common-emitter output transistor circuits.The triangular signal oscillator has been adjusted to have afrequency of100 kHz, an amplitude of0.7 V and a DC offsetof 1.4 V. One of the error amplifiers is used to implement thecompensator (28) to obtain the signalu, and the other oneis used to get the signal (u − 0.7 + overlapping adjustment)in the manner presented in Fig. 9(c). This figure shows anexample of the driving signalsu1 andu2 generation.

(a)

(b)

(c)

Fig. 9. Schematic of: (a) the compensatorGc and the dual PWM simulatedin PSIM, (b) buck-boost control circuit diagram, (c) an example of drivingsignals generation.

C. Buck-boost driver with modified bootstrap

An IR2110 integrated driver has to switch the low side N-Channel MOSFET in the boost stageQ1, and the high sideN-Channel MOSFET of the buck stageQ2. A bootstrap circuitis needed to supply the floating voltage to driveQ2. In buckoperation,Q1 should be always OFF whileQ2 switches. Inbuck-boost mode bothQ1 and Q2 are switched in the sameperiod. In these two previous modes a classical bootstrapcircuit would operate correctly. The most critical operationof the driver occurs in pure boost mode because the bootstrapcapacitorCB must be sufficiently charged to keepQ2 ONfor as long as needed. In these circumstances, the capacitor ofconventional bootstrap circuits could be insufficiently charged.To avoid the malfunction of the converter in boost mode, itis then necessary to refresh the capacitor charge. A solutionof this problem is presented in [29], where a charge pumptopology with an external clock signal is used. A similarcharge pump driver that refreshes the bootstrap capacitor withthe use of the boost control pulses is shown in Fig. 10. Sincethe source ofQ2 is always at a level higher than15 V, theusual bootstrap path through diodeDA will be cut OFF, andan additional bootstrap circuit made ofCBaux

, DB , DC , TC ,TD, and a couple of resistors, has been added to rechargeCB .The boost pulses turn on the auxiliary Darlington transistorTD, permitting thatCBaux charges to15 V through DA,DC and TD. The direct polarization ofDC keepsTC OFF.WhenTD turns OFF,TC starts conducting providing throughDB a current path to rechargeCB from CBaux . Fig. 9(b)shows a variable resistor that permits the empirical overlappingadjustment that guarantees a proper charging of the bootstrapcapacitor by switching the high side MOSFET when the boostdriving pulses are narrower than2%. A couple of cascadedlinear regulators provide the supply voltages (15 V and 5 V)of the driver and control circuit from the input voltage.

Fig. 10. Scheme of the buck-boost driver with a modified bootstrap circuitand auxiliary supplies.

V. EXPERIMENTAL RESULTS

Fig. 11 shows pictures of the power stage and the controlcircuit of the buck-boost regulator prototype. The experimentalresponse of the buck-boost regulator to a low-frequency trian-gular input voltage going from36.8 V to 55.8 V is depictedin Fig.12 where the waveform of the output voltage could becompared with its corresponding simulation. In addition to the




(a) (b)

Fig. 11. Regulator prototype (a) buck-boost power stage, (b) dual PWMcontrol stage.

input and output voltages, the simulated logic signalsu1 andu2, ranging from 0 V to 1 V, are also depicted on the left.The oscillogram on the right shows the equivalent signals thatcorrespond to the outputs of the dual PWM controller thatare in the 0 V to 5 V range. The input voltage range ensuresthat in both simulation and experimental measurements theconverter works in its three operation modes. The outputvoltage is well regulated and exhibits a smooth behavior in allthe transitions between modes. These good results are due tothe use of the same controller in all the operation modes. Thesampling capabilities of the digital oscilloscope have permittedto capture the switching noise in the output voltage waveform.There is less switching noise in boost mode because it isattenuated at the output by a third order filter while the buckstage has only a second order filter between its switches andthe output.

Fig. 13. Experimental configuration of the measurement of efficiency: (a)buck-boost converter, (b) buck-boost control, (c) DC power supply, (d) Poweranalyzer, (e) oscilloscope, (f) DC electronic load.

Figure 13 shows the experimental setup for measuring theefficiency of the hard-switching buck-boost converter. Theefficiency measurements take into account the consumptionof the drivers and control stages. A Voltech PM6000 PowerAnalyzer with calibrated precision shunt resistors is used tomeasure the input and output currents. The energy conversion

2 4 6 8 1094.5

95

95.5

96

96.5

97

97.5

iR

o

[A]

η [

%]

vg= 39 V

vg= 43 V

vg= 47 V

vg= 48 V

vg= 51 V

vg= 55 V

(a)

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vg [V]

η [

%]

iR

o

= 2 A

iR

o

= 4 A

iR

o

= 5 A

iR

o

= 6 A

iR

o

= 8 A

iR

o

= 10 A

(b)

Fig. 14. Energy conversion efficiency forVo = 48 V as: (a) a function ofthe output currentiRo for different input voltagevg levels, (b) a function ofthe input voltagevg for different output currentiRo levels.

efficiencies as a function of the output currentiRo for differentinput voltagevg levels are shown in Fig. 14(a), whereas inFig. 14(b), the horizontal axis is the input voltage and theoutput current is the parameter of the set of curves. Sincesome switching losses penalty is paid in buck-boost mode, fora given current the maximum efficiencies are attained in boostand buck modes when the input voltage is close to the desiredoutput level. The maximum efficiency obtained of about 97%would be improved if the diodes could be substituted bysynchronous rectifier MOSFETs [12], [13]. Other techniqueslike multiphase and ZVS [12] or dynamic adjustment of theswitching frequency [13] are also possible.

TABLE IIICROSSOVER FREQUENCY(CF) AND PHASE MARGIN (PM) FOR DIFFERENT

INPUT VOLTAGES

Simulated Experimental

Vg CF PM CF PM

[V] [kHz] [deg] [kHz] [deg]

39 13 54 11 51

48 18 62 18 61

55 17 65 16 65

PSIM-simulated and experimental Bode plots of the regu-lator loop gain are illustrated in Fig. 15. In the simulations,an estimation of delays and loses have been taken into ac-count. The frequency measurements have been obtained using




100 150 200 250 30020

40

60

Time [ms]

Vg [

V]

100 150 200 250 30047.5

48

48.5

Time [ms]

Vo [

V]

100 150 200 250 300−0.5

00.5

11.5

Time [ms]

u2 [

V]

100 150 200 250 300−0.5

00.5

11.5

Time [ms]

u1 [

V]

(a) (b)Fig. 12. Waveforms of input voltageVg , output voltageVo, boost pulsesu1 and buck pulsesu2 for changes in the input voltage. (a) PSIM simulation (b)Waveforms measured. CH1:Vg (10 V/div), CH2:Vo (1 V/div, AC coupling), CH3:u1 (5 V/div), CH4: u2 (5 V/div), timebase: 20 ms/div.

a frequency response analyzer (FRA) Venable 3120. Thisfrequency response has the three above mentioned differentmodes of operation that are achieved by varying the valueof the input voltagevg. Some of the differences that canbe observed between simulated and experimental results forvg = 48 V are attributed to the nonlinearities in the transitionsbetween modes mentioned previously. Other differences aremainly due to nonlinearities in some passive components ofthe experimental prototype. For instance, the capacitance ofthe intermediate capacitor exhibits a strong dependency onthe applied voltage as has already been noted in Table II.Also, the parameters of the magnetic components vary withthe mean average current flowing through them. The crossoverfrequency (CF) and phase margin (PM) are calculated andlisted in Table III for each input voltage value. In spiteof the differences observed between the simulated and theexperimental frequency responses, the table shows remark-ably similar results in all cases. Like in a buck regulator, awide bandwidth is achieved since the crossover frequency isbetween one tenth and one fifth of the switching frequency.Furthermore, the phase margins indicate that the feedbacksystem is stable for the desired input voltage range.

Figs. 16, 17, and 18 show simulated and experimentaltransient responses to load changes for different constant inputvoltages corresponding to boost, near buck-boost and buckmodes respectively. For each input voltage, the load currenthas been changed from 10 A to 5 A in the top subplots (a)and (b) and back form 5 A to 10 A in the bottom subplots(c) and (d). In all cases, the output voltage is well regulatedand the transient deviations are within the desired boundaries.In addition to output voltage and current, the input currentand the intermediate capacitor voltage are also depicted. Thetransient dynamics of these variables is damped as expected,with a reasonable agreement between simulated and measuredvariables. The main discrepancy appears near the buck-boostmode as it is illustrated in Figs. 17(a) and 17(b). Extremeduty cycles, close to zero or to one, are required to obtaina smooth transition between operation modes, but they are

not possible to achieve in practice due to the unavoidableswitching delays. For this reason, when the input and outputvoltages are close, switching pulses can be skipped and theresulting ripple contains components at frequencies below ofthe converter switching frequency [28].The skipped pulsesalso appear in transients like the one depicted in Fig. 18(d)where a couple of buck pulses are missed and an intermediateunexpected boost pulse appears. In our prototype, this noiseis attenuated by the output LC filter or rejected by the controlloop and has little effect on the output voltage.

VI. CONCLUSION

A new non-inverting buck-boost DC-DC switching con-verter has been obtained by magnetically coupling the inputand output inductors of a cascade connection of a boostand a buck stages. The combination of a coupling and adamping network at the intermediate capacitor provides aminimum-phase control-to-output transfer function with twodominant complex poles. Simulation and experimental resultsof a prototype verify the predicted wide control bandwidth dueto the absence of RHP zeroes. A high efficiency is obtainedby operating the converter switches in three regions dependingon the input-output voltage ratio: boost, buck and buck-boost.In the buck-boost region both MOSFET are allowed to switchin the same period but this overlapping is permitted only fora narrow range of nearly equal input and output voltagesto improve the efficiency. The converter operates usually inthe other more efficient modes in which there is only oneperiodically switching MOSFET. In buck mode, the MOSFETof the boost stage is always OFF, whereas in boost mode, thebuck stage MOSFET is continuously ON, which has requireda specially built bootstrap driver for the buck stage high-sideN channel MOSFET.

For a given specification of output impedance and volt-age ripple, we believe that the proposed converter couldoffer a solution with larger magnetic components but smallercapacitors than other state-of-the-art topologies. Since bothinput and output currents are of non pulsating nature there




104

−20

−15

−10

−5

0

5

10

15

20

Frequency [Hz]

Ma

gn

itu

de

[d

B]

vg=39 V

vg=48 V

vg=55 V

(a)

104

−20

−15

−10

−5

0

5

10

15

20

Frequency [Hz]

Ma

gn

itu

de

[d

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vg=55 V

(b)

104

−180

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−150

−140

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Frequency [Hz]

Ph

ase

[d

eg

]

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vg=55 V

(c)

104

−180

−170

−160

−150

−140

−130

−120

−110

−100

Frequency [Hz]

Ph

ase

[d

eg

]

vg=39 V

vg=48 V

vg=55 V

(d)

Fig. 15. Loop gain Bode plots of the buck-boost converter: boost mode forvg = 39 V, buck-boost mode forvg = 48 V and buck mode forvg = 55 V. a)Simulated magnitude, b) Experimental magnitude, c) Simulated phase, d) Experimental phase.

are two or more possible current control strategies. For thatreason, controlling the converter in current mode is a work inprogress. The capability of cycle-by-cycle limiting the inputand/or output converter currents offers interesting possibilitiesto many applications like battery, supercapacitor, PV panelor fuel cell energy management. Future works contemplatealso a bidirectional implementation of the switches that couldprovide even higher conversion efficiencies. Another openproblem is the converter operation at light loads where severaldiscontinuous conduction modes can appear.

APPENDIX

DAMPING NETWORK PARAMETER CALCULATION

Equating (21) and (22) gives the following set of equations

ατ3 = RdCdLmC (A.1)

τ2(2αζ + 1) = Lm(Cd + C) (A.2)

τ(α + 2ζ) = RdCd (A.3)

Dividing (A.1) by (A.3) and isolatingτ2 yields

τ2 =LmC(α + 2ζ)

α(A.4)

Substituting (A.4) in (A.2) and isolatingCd gives (23). From(A.3) and (A.4), it is straightforward that

Rd =τ(α + 2ζ)

Cd(A.5)

Since the derivative of (23) with respect toα is

dCd

dα=

2ζC(α2 − 1)α2

(A.6)

Cd has a minimum forα = 1.Expression (A.5), particularized forα = 1, yields (24).

ACKNOWLEDGMENT

The authors would like to thank Jose Maria Bosque for hisaid in the construction of the prototype, and Luis Martınez-Salamero and the anonymous reviewers for their valuablecomments.




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]

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]

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]

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]

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vo [V

]

(c) (d)Fig. 16. PSIM simulations (a), (c) and experimental measurements (b), (d) of the converter main variables when the load current changes from10 A to 5 Aand back to10 A while the input voltage isVg = 39 V. Black traces shows the simulated output currentiRo and output voltagevo while the input currentigand the intermediate capacitor voltagevc are in white. CH1:vc (5 V/div), CH2: vo (500 mV/div, AC coupling), CH3:ig (5 A/div) and CH4:iRo (5 A/div).

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[16] K. Hwu and Y. Yau, “Two types of KY buck-boost converters,”IEEETrans. Ind. Electron., vol. 56, no. 8, pp. 2970–2980, Aug. 2009.

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[18] J. Calvente, L. Martinez-Salamero, H. Valderrama, and E. Vidal-Idiarte,“Using magnetic coupling to eliminate right half-plane zeros in boost




3.98 4 4.02 4.04 4.06 4.08 4.1 4.12 4.14 4.162

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6

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]

4 4.05 4.1 4.15 4.240

45

50

55

vc [V

]

Time [ms]

4 4.05 4.1 4.15 4.247

47.5

48

48.5

vo [V

]

(a) (b)

7.95 8 8.05 8.1 8.15 8.2 8.25 8.30

5

10

15

20

Time [ms]

Curr

ent [A

]

7.95 8 8.05 8.1 8.15 8.2 8.25 8.340

50

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vc [V

]

Time [ms]

7.95 8 8.05 8.1 8.15 8.2 8.25 8.347.5

48

48.5

vo [V

]

(c) (d)Fig. 17. Simulated (a), (c) and measured (b), (d) converter main variables for the same load changes of Fig. 16 andVg = 46 V.

converters,”IEEE Power Electron Lett., vol. 2, no. 2, pp. 58–62, Jun.2004.

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[29] S. Park and T. Jahns, “A self-boost charge pump topology for a gatedrive high-side power supply,” inProc. 19th IEEE Appl. Power Electron.Conf. Expo., APEC, vol. 1, Feb. 2003, pp. 126–131.

Carlos Restrepo (S’10) graduated, with honors,as Ingeniero Electricista and Master en IngenierıaElectrica in 2006 and in 2007, respectively, from theUniversidad Tecnologica de Pereira, Colombia. Heobtained the Master en Ingenierıa Electronica fromthe Universitat Rovira i Virgili de Tarragona, Tarra-gona, Spain, in 2008. He is currently working towardthe Ph.D. degree in the Departamento d’EnginyeriaElectronica, Electrica i Automatica, Escola TecnicaSuperior d’Enginyeria, Universitat Rovira i Virgilide Tarragona. His main research interests includes

fuel cell modelling and power converters design.




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48.5

vo [V

]

(c) (d)Fig. 18. Simulated (a), (c) and measured (b), (d) converter main variables for the same load changes of Fig. 16 andVg = 55 V.

Javier Calvente (S’94-M’03) received the Inge-niero de Telecomunicacion degree and the Ph.D.degree from the Universitat Politecnica de Catalunya(UPC), Barcelona, Spain, in 1994 and 2001, re-spectively. He was a visiting scholar with Alca-tel Space Industries, Toulouse, France, in 1998.He is currently an Associate Professor with theDepartamento dEnginyeria Electronica, Electrica iAutomatica, Universitat Rovira i Virgili (URV), Tar-ragona, Spain, where he is working in the fields ofpower electronics and control systems.

Angel Cid-Pastor (S’99-M’07) He graduated asIngeniero en Electronica Industrial in 1999 and asIngeniero en Automatica y Electronica Industrialin 2002 at Universitat Rovira i Virgili, Tarrag-ona, Spain. He received the M.S. degree in de-sign of microelectronics and microsystems circuitsin 2003 from Institut National des Sciences Ap-pliquees, Toulouse, France. He received the Ph.D.degree from Universitat Politecnica de Catalunya,Barcelona, Spain, and from Institut National des Sci-ences Appliquees, LAAS-CNRS Toulouse, France in

2005 and 2006, respectively. He is currently an associated professor at theDepartament dEnginyeria Electronica, Electrica i Automatica, Escola TecnicaSuperior dEnginyeria, Universitat Rovira i Virgili, Tarragona, Spain. Hisresearch interests are in the field of power electronics and renewable energysystems.

Abdelali El Aroudi (M’00) was born in Tangier(Morocco), in 1973. He obtained the graduate de-gree in physical science from Facult des sciences,Universite Abdelmalek Essadi, Tetouan, Morocco, in1995, and the Ph.D degree (with honors) from Uni-versitat Politecnica de Catalunya, Barcelona, Spainin 2000. During the period 1999-2001 he was avisiting Professor at the Department of Electronics,Electrical Engineering and Automatic Control, Tech-nical School of Universitat Rovira i Virgili (URV),Tarragona, Spain, where he became an associate

professor in 2001 and a full-time tenure Associate Professor in 2005. Duringthe period September 07-January 08 he was holding a visiting scholarshipat the Department of Mathematics and Statistics, Universidad Nacional deColombia, Manizales, conducting research on modeling of power Electronicscircuits for energy management. From February 2008 to July 2008, he wasa visiting scholar at theCentre de Recherche en Sciences et Technologiesde Communications et de l’Informations(CReSTIC), Reims, France. Hehas participated in different Spanish domestic and cooperative internationalresearch projects. His research interests are in the field of structure andcontrol of power conditioning systems for autonomous systems, power factorcorrection, stability problems, nonlinear phenomena, chaotic dynamics, bi-furcations and control. He is a reviewer forIEEE Transaction on Circuitsand Systems part. I- Regular papers and II Express Briefs, IEEE Trans-actions on Power Electronics, IEEE Transactions on Industrial Electronics,International Journal of Control, International Journal of Power Electronics,IET Electric Power Applications, International Journal of Systems Science,Circuits, Systems and Signal Processing, International Journal of Sound andVibration and Nonlinear Dynamics. He has published more than 150 papersin scientific journals and conference proceedings. He is a member of theGAEI research group (Universitat Rovira i Virgili) on Industrial Electronics




and Automatic Control whose main research fields are power conditioning forvehicles, satellites and renewable energy. He has given invited talks in severaluniversities in Europe, South America and Africa.

Roberto Giral (S’94-M’02-SM’10) received theB.S. degree in ingeniera tecnica de telecomuni-cacion, the M.S. degree in ingeniera de telecomu-nicacion, and the Ph.D. (with honors) degree fromthe Universitat Politecnica de Catalunya, Barcelona,Spain, in 1991, 1994, and 1999, respectively. Heis currently an Associate Professor with the De-partament dEnginyeria Electronica, Electrica i Au-tomatica, Escola Tecnica Superior dEnginyeria, Uni-versitat Rovira i Virgili, Tarragona, Spain, where heis working in the field of power electronics.

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A Non-Inverting Buck-Boost DC-DC Switching