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AOZ2233CQI-22I2C Controllable 28V/8A Synchronous EZBuckTM Regulator
General DescriptionThe AOZ2233CQI-22 is an I2C controllable, highefficiency, easy-to-use DC-DC synchronous buckregulator capable of operation from a 6.5V to 28V inputbus. Ability to control the output voltage using the I2C bussimplifies converter design for microprocessors or SoCsthat require dynamic voltage scaling or voltagemargining. The device is capable of supplying 8A ofcontinuous output current with an output voltageadjustable from 0.7V to 0.92599V (±2.0%).
The AOZ2233CQI-22 integrates an internal linearregulator to generate 5.3V VCC from input. If inputvoltage is lower than 5.3V, the linear regulator operatesat low drop output mode, which allows the VCC voltage isequal to input voltage minus the drop-output voltage ofthe internal linear regulator.
A proprietary constant on-time PWM control with inputfeed-forward results in ultra-fast transient response whilemaintaining relatively constant switching frequency overthe entire input voltage range.
The devices feature multiple protection functions such asVCC under-voltage lockout, cycle-by-cycle current limit,output over-voltage protection, short-circuit protection,and thermal shutdown.
The AOZ2233CQI-22 is available in a 4mm×4mm QFN-22L package and is rated over a -40°C to +85°C ambienttemperature range.
Features Wide input voltage range
– 6.5V to 28V 8A continuous output current Output voltage adjustable from 0.7V to 0.92599V in
7.29mV
±2.0% output voltage accuracy for I2C control Low RDS(ON) internal NFETs
– 18m high-side– 11m low-side
Constant On-Time with input feed-forward Selectable PFM Light-Load Operation Ceramic capacitor stable Power Good output
I2C address programming Integrated bootstrap diode Cycle-by-cycle current limit Short-circuit protection Over voltage protection Thermal shutdown Thermally enhanced 4mm x 4mm QFN-22L package
Applications Portable computers Compact desktop PCs Servers Graphics cards Set-top boxes LCD TVs Cable modems Point-of-load DC/DC converters Telecom/Networking/Datacom equipment
Rev 1.0 September 2019 www.aosmd.com Page 1 of 23
AOZ2233CQI-22
Typical Application
Option Table
Recommended Start-up Sequence
AD0Address(Binary)
Address(Hex)
AOZ2233CQI-21
Ground (0) 01101000 68h
VCC (1) 01101010 6Ah
AOZ2233CQI-22
Ground (0) 01101100 6Ch
VCC (1) 01101110 6Eh
POWER GROUND
ANALOG GROUND
LX
C288µF
BST
VOUT0.7V to 0.92599V
AGND
PGNDVCC
PGOOD
EN
AOZ2233CQI-22
ONOFF
POWER GOOD
C34.7µF
C40.1µF
L11.0µH
IN
INPUT 6.5V to 28V
C120µF
5.3V
VOUT
SCL
SDA
AD0
3.3V
SCL
SDA
R21.0k
R11.0k
R310k
R4 R5
VOI
GND (R7 connect/R6 open) 6ChVCC (R6 connect/R7 open) 6Eh
R6R7 Processor
VIN
EN
50µs
CodeItem
Rev 1.0 September 2019 www.aosmd.com Page 2 of 23
AOZ2233CQI-22
Ordering Information
AOS Green Products use reduced levels of Halogens, and are also RoHS compliant. Please visit
Pin Configuration
Part Number Ambient Temperature Range Package Environmental
AOZ2233CQI-22 -40°C to +85°C 22-Pin 4mm x 4mm QFN Green Product
2
3
4
5
6
7 8 9 10
12
13
14
15
16
181921
AD0
SCL
SDA
VOI
VOUT
IN IN IN LXPGND
PGND
PGND
LX
LXEN
BST
VCC
IN LX
22PG
OO
D
22-Pin 4mm x 4mm QFN(Top View)
17
20
11
1LX
PGND
LX
AGND
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AOZ2233CQI-22
Pin Description
Pin Number Pin Name Pin Function
1 AD0 Chip Address. The AD0 pin just connects to AOZ2233CQI-22 VCC pin or GND.2 SCL Clock I/O Terminal.3 SDA Data I/O Terminal.
4 VOI Initial Output Voltage Feedback Input. Adjust the output voltage with a resistive voltage-divider between VCC and AGND.
5 VOUT Output Voltage Feedback Input. Connection to output voltage.6 AGND Analog Ground.
7, 8, 9 IN Supply Input. IN is the regulator input. All IN pins must be connected together. 10, 11, 16, 17, 18 LX Switching Node.
12, 13, 14, 15 PGND Power Ground.
19 EN Enable Input. The AOZ2233CQI-22 is enabled when EN is pulled high. The device shutsdown when EN is pulled low. Assert EN to high for power-up after IN is supplied.
20 BSTBootstrap Capacitor Connection. The AOZ2233CQI-22 includes an internal bootstrap diode. Connect an external capacitor between BST and LX as shown in Typical Application diagram.
21 VCC Supply Input for Analog Functions. Bypass VCC to AGND with a 1µF~4.7µF ceramiccapacitor. Place the capacitor close to VCC pin.
22 PGOOD
Power Good Signal Output. PGOOD is an open-drain output used to indicate the status ofthe output voltage. It is internally pulled low when the output voltage is 15% lower than thenominal regulation voltage or 20% higher than the nominal regulation voltage. PGOOD ispulled low during soft-start and shut down.
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AOZ2233CQI-22
Absolute Maximum RatingsExceeding the Absolute Maximum Ratings may damage the device.
Notes:
1. LX to PGND Transient (t<20ns) ------- -7V to VIN+7V.2. Devices are inherently ESD sensitive, handling precautions are
required. Human body model rating: 1.5k in series with 100pF.
Maximum Operating RatingsThe device is not guaranteed to operate beyond the Maximum Operating ratings.
Parameter Rating
IN to AGND -0.3V to 30VLX to AGND(1) -0.3V to 30VBST to AGND -0.3V to 36VPGOOD, EN, VCC, SCL, SDA, VOUT, VOI, AD0 to AGND
-0.3V to 6V
PGND to AGND -0.3V to +0.3VJunction Temperature (TJ) +150°CStorage Temperature (TS) -65°C to +150°CESD Rating-HBM(2) 2kVESD Rating-CDM 1kV
Parameter Rating
Supply Voltage (VIN) 6.5V to 28VOutput Voltage Range 0.7V to 0.92599VAmbient Temperature (TA) -40°C to +85°CPackage Thermal Resistance(JA)(JC)
32°C/W4°C/W
Electrical CharacteristicsTA = 25°C, VIN=12V, EN = 5V, unless otherwise specified. Specifications in BOLD indicate a temperature range of -40°C to +85°C.
Symbol Parameter Conditions Min. Typ. Max Units
VIN IN Supply Voltage 6.5 28 V
VUVLOUnder-Voltage Lockout Threshold of VCC
VCC risingVCC falling 3.7
4.23.9
4.4 V
Iq Quiescent Supply Current of VCC IOUT = 0, VEN ≥ 2V, PFM mode 0.5 mAIOFF Shutdown Supply Current VEN = 0V 1 20 A
VOUT Output Voltage TA = 25°C, VIN=12VVOUT = 0.7V to 0.92599V, L= 1H -2% 0% 2% VOUT
Tr_OUT Output Voltage Rising Time VOUT = 0.7V to 0.92599V,COUT = 88F, PWM mode 2.5 20 s
Tf_OUT Output Voltage Falling Time VOUT = 0.7V to 0.92599V,COUT = 88F, PWM mode 2.5 20 s
Enable
VEN EN Input Threshold Off thresholdOn threshold 1.4
0.5 VV
VEN_HYS EN Input Hysteresis 300 mVAD0
VAD0 AD0 Input Threshold Off thresholdOn threshold 4.2
0.5 VV
Modulator
fSW Operating Frequency 400 kHzTON_MIN Minimum On Time 100 nsTON_MAX Maximum On Time 2.6 sTOFF_MIN Minimum Off Time 300 nsSoft-Start
TSS_OUT SS Source Time for PGOOD pulled High 4 ms
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AOZ2233CQI-22
Power Good Signal
VPG_LOW PGOOD Low Voltage IOL= 1mA 0.5 VPGOOD Leakage Current ±1 A
VPGH PGOOD Threshold (Low level to High level)
VOUT rising 90 %
VPGL PGOOD Threshold(High level to Low level)
VOUT risingVOUT falling
12085
%%
PGOOD Threshold Hysteresis 5 %Under Voltage and Over Voltage Protection
VPL Under Voltage Threshold VOUT falling 70 %TPL Under Voltage Delay Time 32 sVPH Over Voltage Threshold VOUT rising 120 %
Power Stage Output
RDS(ON) High-Side NFET On-Resistance VIN = 12V 18 m
High-Side NFET Leakage VEN = 0V, VLX = 0V 10 ARDS(ON) Low-Side NFET On-Resistance VLX = 12V 11 m
Low-Side NFET Leakage VEN = 0V 10 AVCC Output
VCC VCC output voltage VIN ≥ 6.5V, ICC= 0mA 5.09 5.3 5.51 VICC VCC current limit VIN ≥ 6.5V 50 mA
Over-current and Thermal Protection
ILIM Current Limit 12 A
Thermal Shutdown Threshold TJ risingTJ falling
150100
°C°C
Electrical CharacteristicsTA = 25°C, VIN=12V, EN = 5V, unless otherwise specified. Specifications in BOLD indicate a temperature range of -40°C to +85°C.
Symbol Parameter Conditions Min. Typ. Max Units
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AOZ2233CQI-22
Functional Block Diagram
ISENSEILIM_VALLEY
ERROR COMP
ILIM COMP
BST
AGNDPGND
Current Information Processing
Vcc
IN
UVLO
LDO
TOFF_MIN
SR
Q
TimerQ
VOI
VOUT
Light Load Threshold
ISENSE
Light LoadCOMP
VCC
EN
LX
TON
TimerQ
ENSDA
ISENSE(AC)
ISENSE
VOUTDECODE
ISENSE(AC)
SS TIME
DACVOUT=0.7V
to0.92599V
SERIALINTERFACE
CHIP ADDRAD0
AD1=1
SCL
AD0
EXT
INT
PG Logic
PGOOD
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AOZ2233CQI-22
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Typical Performance CharacteristicsCircuit of Typical Application. TA = 25°C, VIN = 19V, VOUT = 0.9V, fs = 400kHz unless otherwise specified.
Normal Operation
5µs/div
VLX(10V/div)
ILX(5A/div)
VO ripple(20mV/div)
Load Transient 0A to 8A
500µs/div
ILX(5A/div)
VO ripple(50mV/div)
Full Load Start-up
1ms/div
VLX(20V/div)
EN(5V/div)
ILX(5A/div)
VO
(1V/div)
Short Circuit Protection
20µs/div
VLX(20V/div)
ILX(5A/div)
VO
(500mV/div)
Eff
icie
nc
y (%
)
Output Current (A)
100
90
80
70
60
50
40
30
20
10
00
Efficiency vs. Load Current
Vin = 6.5V
Vin = 12V
Vin = 19V
Vin = 24V
1 2 3 4 5 6 7 8
VOUT = 0.9V
AOZ2233CQI-22
Rev 1.0 September 2019 www.aosmd.com Page 9 of 23
I2C Control Specification(3)(4)(5)
Notes:
3. Ensured by design. Not production tested.4. Refer to Figure 1 for I2C timing definitions.5. Cb = capacitance of bus line in pF.
Figure 1. I2C Timing Definitions
Symbol Parameter Conditions Min. Typ. Max Units
VIL Low level input voltage 0.6 VVIH High level input voltage 2.9 VVhys Hysteresis of Schmitt trigger inputs 0.11 VVOL Low level output voltage (Open drain,
3mA sink current) 0.4 V
TSPPulse width of spikes suppressed by input filter 32 ns
fSCL SCL clock frequency 400 kHztHD;STA Hold time (repeated), START
condition 0.6 s
tLOW Low period of SCL clock 1.3 stHIGH High period of SCL clock 0.6 s
tSU;STA Set-up time for a repeated START condition 0.6 s
tHD;DAT Data hold time 50 900 nstSU;DAT Data set-up time 100 ns
tr Rise time (SDA or SCL) 20+0.1Cb 300 nstf Fall time (SDA or SCL) 5+0.1Cb 300 ns
tSU;STO Set-up time for STOP condition 0.6 stBUF Bus free time between STOP and
START conditions 1.3 s
Cb Capacitive load for each bus line 400 pFId SDA driver capability 25 100 mA
S
SCL
SDA
tHD;STA
tf
VIH
VIL
tHD;DAT
tSU;DAT
tHIGH
tftLOW tr
SrtSU;STA
tHD;STA tSP
tSU;STOP S
tr tBUF
AOZ2233CQI-22
Rev 1.0 September 2019 www.aosmd.com Page 10 of 23
I2C Register Maps
Odd Parity BitThe odd parity bit is set by the Master controller to be theexclusive-NOR of the output voltage [6:0] bits. It will beused by the AOZ2233CQI-22 to check that a valid databyte has been received. If odd parity is not equal to theexclusive-NOR of the output voltage [6:0] bits, the
AOZ2233CQI-22 assumes that an error has beenoccurred during the data transmission, and it will notsend an ACK bit, nor will it reset the VOUT to thereceived code. (or, if the Control register will not reset theregister contents as requested). The Master should tryagain to re-send the data. When reading back the VOUTregister, the parity bit is sent back.
RegisterName
RegisterAddress
Bit 7 Bit6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
OutputVoltage 00 Odd Parity Output Voltage [6:0]
Control A 01 InternalMode
OutputVoltageChange
PFMb ProtectionMode
Summary of Default Control Bits
Control Bit(s) Default Function
VOUT [6:0] 0110010 VOUT code, 7 bits VOUT [6:0]. Part default to 0.83122V.
Internal Mode 0 (External Mode)
0 case: External Mode1 case: Internal Mode(1). If set to 1, the part switches to internal mode and VOUT register value controls output voltage.(2). The part can be set back to external control mode at any time by wiring this bit to 0.
Output Voltage Change 0
0 case: Internal protection on1 case: Internal protection off(1). If set to 0, when VOUT code change, the internal protection isn’t turned off.(2). If set to 1, when VOUT code change, the internal protection is turned off to avoid triggering internal protection.
PFMb 1
Select PFM or PWM at light load.0 case: PFM1 case: PWMPart defaults to PWM.
Protection Mode 1
Select Latch-off or Auto-recovery for protection.0 case: Auto-recovery mode1 case: Latch-off modePart defaults to Latch-off mode.
AOZ2233CQI-22
Rev 1.0 September 2019 www.aosmd.com Page 11 of 23
I2C Serial Interface DescriptionThe AOZ2233CQI-22 serial data interface works as anI2C slave device. It supports most standard data transfermode (100kbps) and fast transfer mode (400kbps). Theserial interface provides the mean to program a precisionresistor DAC to set up a VID output voltage control for the8A DC/DC converter. A one-byte data is written by theI2C Master to the AOZ2233CQI-22 and stored in a databuffer for the VID. The content of the data buffer can alsobe read back by the Master.
After I2C is enabled, the AOZ2233CQI-22 starts to check the address code sent by the Master every time a START condition is detected. If a valid address code, AD[6:0], is recognized, it will send out an ACK bit by pulling down on the SDA bus during the clock pulse 9 of the SCL bus. The ACK time of the clock pulse 9 of the SCL bus can be written as below.
TACK 9 1fSCL----------=
Figure 2. A Complete Write Byte Transfer
Figure 3. Single Read
Figure 4. Single Write
S W r A A A PC h ip A ddress R eg iste r A ddress D ata B yte
A 6 A 5 A 4 A 3 A 2 A 1 A 0 0 A C K AC KR 7 R 6 R 5 R 4 R 3 R 2 R 1 R 0 D 7 D 6 D 5 D 4 D 3 D 2 D 1 D 0AC KS D A
S C L
S top C ond itionS tart C ond ition
Slave_ID/W Address Slave_ID/R DataDD//RRR//RRR
P/S
SCL_dout
SDA_dout
S: START condition P: STOP Condition
SCL_dout
SDA_dout
Slave_ID/WD//WWWWW
S P
Address Data
S: START condition P: STOP Condition
AOZ2233CQI-22
Rev 1.0 September 2019 www.aosmd.com Page 12 of 23
If no valid address is detected, no action will be takenand no ACK will be sent. The I2C controller assumes theaddress is for other I2C device and it will ignore the databits and resume the search for the next valid addresstransfer. Finally, the response time from enteringcommand to changing internal function is shown asbelow:
After a valid address code is confirmed, the next bit (Wr)is checked for Write (“0”) or Read (“1”) mode. If therequested operation is Write mode, the AOZ2233CQI-22will evaluate the data code, D[7:0], received after theaddress ACK.
Once the Write data is validated, AOZ2233CQI-22 willsend ACK on the SDA bus. The data code will also betransferred to the data holding buffer of the VID and theoutput voltage will move to the new, or ideal, value. If thedata is not valid, no ACK will be sent. It will be up to theI2C Master to repeat the operation.
If the requested operation is Read mode, theAOZ2233CQI-22 will transmit the content of the VID databuffer register, or D[7:0], on the SDA bus. After the 8 databits are transmitted and STOP detected, theAOZ2233CQI-22 will return to the normal operationregardless of ACK is received or not. It will be up to theI2C Master to re-send a Read request if the last Readoperation is deemed invalid.
TR 27 1fSCL
----------=
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AOZ2233CQI-22
Table 1: Output Voltage Setting vs Register Code
Code Binary VOUT Code Binary VOUT Code Binary VOUT Code Binary VOUT
0 0000000 0.70000 32 0100000 0.70000 64 1000000 0.70000 96 1100000 0.700001 0000001 0.70729 33 0100001 0.70729 65 1000001 0.70729 97 1100001 0.707292 0000010 0.71458 34 0100010 0.71458 66 1000010 0.71458 98 1100010 0.714583 0000011 0.72187 35 0100011 0.72187 67 1000011 0.72187 99 1100011 0.721874 0000100 0.72916 36 0100100 0.72916 68 1000100 0.72916 100 1100100 0.729165 0000101 0.73645 37 0100101 0.73645 69 1000101 0.73645 101 1100101 0.736456 0000110 0.74374 38 0100110 0.74374 70 1000110 0.74374 102 1100110 0.743747 0000111 0.75103 39 0100111 0.75103 71 1000111 0.75103 103 1100111 0.751038 0001000 0.75832 40 0101000 0.75832 72 1001000 0.75832 104 1101000 0.758329 0001001 0.76561 41 0101001 0.76561 73 1001001 0.76561 105 1101001 0.76561
10 0001010 0.77290 42 0101010 0.77290 74 1001010 0.77290 106 1101010 0.7729011 0001011 0.78019 43 0101011 0.78019 75 1001011 0.78019 107 1101011 0.7801912 0001100 0.78748 44 0101100 0.78748 76 1001100 0.78748 108 1101100 0.7874813 0001101 0.79477 45 0101101 0.79477 77 1001101 0.79477 109 1101101 0.7947714 0001110 0.80206 46 0101110 0.80206 78 1001110 0.80206 110 1101110 0.8020615 0001111 0.80935 47 0101111 0.80935 79 1001111 0.80935 111 1101111 0.8093516 0010000 0.81664 48 0110000 0.81664 80 1010000 0.81664 112 1110000 0.8166417 0010001 0.82393 49 0110001 0.82393 81 1010001 0.82393 113 1110001 0.8239318 0010010 0.83122 50 0110010 0.83122 82 1010010 0.83122 114 1110010 0.8312219 0010011 0.83851 51 0110011 0.83851 83 1010011 0.83851 115 1110011 0.8385120 0010100 0.84580 52 0110100 0.84580 84 1010100 0.84580 116 1110100 0.8458021 0010101 0.85309 53 0110101 0.85309 85 1010101 0.85309 117 1110101 0.8530922 0010110 0.86038 54 0110110 0.86038 86 1010110 0.86038 118 1110110 0.8603823 0010111 0.86767 55 0110111 0.86767 87 1010111 0.86767 119 1110111 0.8676724 0011000 0.87496 56 0111000 0.87496 88 1011000 0.87496 120 1111000 0.8749625 0011001 0.88225 57 0111001 0.88225 89 1011001 0.88225 121 1111001 0.8822526 0011010 0.88954 58 0111010 0.88954 90 1011010 0.88954 122 1111010 0.8895427 0011011 0.89683 59 0111011 0.89683 91 1011011 0.89683 123 1111011 0.8968328 0011100 0.90412 60 0111100 0.90412 92 1011100 0.90412 124 1111100 0.9041229 0011101 0.91141 61 0111101 0.91141 93 1011101 0.91141 125 1111101 0.9114130 0011110 0.91870 62 0111110 0.91870 94 1011110 0.91870 126 1111110 0.9187031 0011111 0.92599 63 0111111 0.92599 95 1011111 0.92599 127 1111111 0.92599
AOZ2233CQI-22
Detailed DescriptionThe AOZ2233CQI-22 is a high-efficiency, easy-to-use,synchronous buck regulator with a voltage scaling controlto power up MCUs requiring core voltage tune-ups. Afterthe initial power up, the output voltage can beprogrammed/scaled by VID codes sent over an I2Ccompatible bus. The regulator is capable of supplying 8Aof continuous output current with an output voltageadjustable from 0.7V to 0.92599V.
The input voltage of AOZ2233CQI-22 can be as low as6.5V. The highest input voltage of AOZ2233CQI-22 canbe 28V. Constant on-time PWM with input feed-forwardcontrol scheme results in ultra-fast transient responsewhile maintaining relatively constant switching frequencyover the entire input range. True AC current mode controlscheme guarantees the regulator can be stable withceramics output capacitor. Protection features includeVCC under-voltage lockout, cycle-by-cycle current limit,output over voltage and under voltage protection, short-circuit protection, and thermal shutdown.
The AOZ2233CQI-22 is available in 22-pin 4mm×4mmQFN package.
Input Power Architecture
The AOZ2233CQI-22 integrates an internal linearregulator to generate 5.3V (±5%) VCC from input. If inputvoltage is lower than 5.3V, the linear regulator operatesat low drop-output mode; the VCC voltage is equal toinput voltage minus the drop-output voltage of internallinear regulator.
Enable and Soft Start
The AOZ2233CQI-22 has internal soft start feature tolimit in-rush current and ensure the output voltage rampsup smoothly to regulate voltage. A soft start processbegins when VCC rises to 4.2V and voltage on EN pin isHIGH. The output voltage follows the internal voltage ofsoft-start (VSS) when it is lower than initial output voltage.When VSS is higher than initial output voltage, the voltageof VOUT pin is regulated by internal precise band-gapvoltage. Moreover, the soft start period between EN andPGOOD is 4ms.The soft start sequence of AOZ2233CQI-22 is shown in Figure 5.
Figure 5. Soft Start Sequence of AOZ2233CQI-22
Enable
The AOZ2233CQI-22 has an embedded discharge path,including a 100kresistor and an M1 NMOS device. Thisdischarge path is activated when VIN(Input Voltage) ishigh and VEN(Enable Voltage) is low. The internal circuitof EN pin is shown in Figure 6.
Figure 6. Enable Internal Circuit
There are two different enable control methods: 1. Connection to EN pin by an external resistive
voltage divider. 2. Direct connection to EN pin by an external power
source, Vs.
VOUT
VSS
VEN
PGOOD
TSS=4ms
(Internal)
VOUT Setting
VCC Level
EN
AGND
R1
R2
REN_PL
100k
VIN
en1
en1
EN Detection EN Signal
VS
Ven
M1
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AOZ2233CQI-22
In the first condition, we must consider the internal pull-down resistance by using a divider circuit with an externalpower source Vs to get VEN. The VEN can be calculatedby the following formula:
When the VIN is high and the VEN is high, the EN internalM1 is turned off, and then the pull down resistance isremoved for VEN, the VEN can be re-calculated by:
In the second condition, the AOZ2233CQI-22 will beturned on when the VEN is higher than 1.4V, and will beturned off when the VEN is lower than 0.5V. The simplifiedschematic and timing sequence are shown in Figure 7.
Figure 7. Enable Threshold Schematic and Timing Sequence
I2C Chip Address Byte (AD0)
The AOZ2233CQI-22 can select addresses between6Ch(01101100) and 6Eh(01101110) by AD0 terminal.Moreover, the internal AD1 terminal is pulled up to high,allowing up to 2 AOZ2233CQI-22 to be controlled on thesame I2C bus. The internal AD0 circuit is a hysteresiscomparator. The input terminal (AD0) of the hysteresiscomparator doesn't have pull down or pull up resistor,therefore, the AD0 pin need to avoid the floatingcondition. The simplified schematic and timing sequenceare shown in Figure 8.
Figure 8. AD0 Schematic and Timing Sequence
Constant-On-Time PWM Control with Input Feed-Forward
The control algorithm of AOZ2233CQI-22 is constant-on-time PWM control with input feed-forward. The simplifiedcontrol schematic is shown in Figure 9. The high-sideswitch on-time is determined solely by a one-shot whosepulse width is inversely proportional to input voltage (IN).The one-shot is triggered when the internal VOI/DACvoltage is higher than the combined information of outputvoltage and the AC current information of inductor, whichis processed and obtained through the sensed low-sideMOSFET current once it turns-on. The added ACcurrent information can help the stability of constant-ontime control even with pure ceramic output capacitors,which have very low ESR. The AC current informationhas no DC offset, which does not cause offset with outputload change, which is fundamentally different from otherV2 constant on-time control schemes.
Figure 9. Simplified Control Schematic
True Current Mode Control
The constant-on-time control scheme is intrinsicallyunstable if output capacitor’s ESR is not large enough asan effective current-sense resistor. Ceramic capacitorsusually cannot be used as output capacitor.
The AOZ2233CQI-22 senses the low-side MOSFETcurrent and processes it into DC current and AC currentinformation using AOS proprietary technique. The ACcurrent information is decoded and added on the VOUTpin on phase. With AC current information, the stability ofconstant-on-time control is significantly improved evenwithout the help of output capacitor’s ESR; and thus, thepure ceramic capacitor solution can be applicant. Thepure ceramic capacitor solution can significantly reducethe output ripple (no ESR caused overshoot andundershoot) and less board area design.
Current-Limit Protection
The AOZ2233CQI-22 has the current-limit protection byusing RDS(ON) of the low-side MOSFET to be as currentsensing. To detect real current information, a minimumconstant-off time (300ns typical) is implemented after aconstant-on time. If the current exceeds the current-limitthreshold, the PWM controller is not allowed to initiate a
sPLEN
PLENEN V
RRR
RRV
)//(
//
_21
_2
sEN VRR
RV
21
2
Hysteresis0.3V
1.05V
Ven
Ven
EN Signal
EN Singal
1.4V
0.5V
Hysteresis1V
2V
VAD0
VAD0
AD0 Signal
AD0 Signal
4.2V
0.5V
+
–
ProgrammableOne-Shot
IN
Comp
FB Voltage/AC Current Information
VOI/DAC Voltage
PWM
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AOZ2233CQI-22
new cycle. The actual peak current is greater than thecurrent-limit threshold by an amount equal to the inductorripple current. Therefore, the exact current-limitcharacteristic and maximum load capability are a functionof the inductor value and input and output voltages. Thecurrent limit will keep the low-side MOSFET on and willnot allow another high-side on-time, until the current inthe low-side MOSFET reduces below the current limit.
After 16 switching cycles, the AOZ2233CQI-22 considersthis is a true failed condition and thus, turns-off both high-side and low-side MOSFETs and latches off. Only whentriggered, the enable can restart the AOZ2233CQI-22again.
Figure 10. OCP Timing Chart
Output Voltage Under-Voltage Protection
If the output voltage is lower than 70% by over-current orshort circuit, AOZ2233CQI-22 will wait for 32us(typical)and turns-off both high-side and low-side MOSFETs andlatches off. Only when triggered, the enable can restartthe AOZ2233CQI-22 again.
Output Voltage Over-Voltage Protection
The threshold of OVP is set 20% higher than VOI/DACvoltage.When the voltage of VOUT pin exceeds the OVPthreshold, high-side MOSFET is turned-off and low-sideMOSFETs is turned-on until the voltage of VOUT pin islower than VOI/DAC voltage.
Figure 11. OVP Timing Chart
Output Voltage Registers
The AOZ2233CQI-22 has 7 bits of output voltage registercontrol for output voltage adjusting from 0.7V to0.92599V. Output Voltage Setting vs Register Codeshows the output voltage setting for DAC voltage andregister codes. When the AOZ2233CQI-22 powers up,the startup and output voltage regulation conditions areset by the external resistor divider feedback to the VOIpin from VCC voltage. Therefore, the initial outputvoltage can be calculated by:
Figure 12. VOI Divided Circuit
Inductor Current
Output Voltage
VCC Voltage
LX Voltage
-0.7V
Inductor Current
OVP ThresholdOutput Voltage
VCC Voltage
VIN+0.7VLX Voltage
VOIR5
R4 R5+---------------------- VCC=
VOI
AGND
R4
R5
VCC
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AOZ2233CQI-22
Output Voltage Rising and Falling TimeWe can adjust AOZ2233CQI-22’s output voltage level bythe I2C interface. The output voltage rising time andfalling time is determined by our internal slew-rate controlcircuit. Resulted from various output voltage changepoints, it makes different rising and falling time. If theoutput voltage starts to change at the peak of outputvoltage, it takes less time to achieve new output voltagelevel than from the valley. The difference of their risingtime in the same sample is approximately 1/2 ofswitching cycle time.
Figure 13. Variations of Output Voltage Rising Time
Application InformationThe basic AOZ2233CQI-22 application circuit is shown inTypical Application section. The component selection isexplained below.
Input capacitor
The input capacitor must be connected to the IN pins andPGND pin of the AOZ2233CQI-22 to maintain steadyinput voltage and filter out the pulsing input current. Asmall decoupling capacitor, usually 4.7uF, should beconnected to the VCC pin and AGND pin for stableoperation of the AOZ2233CQI-22. The voltage rating ofinput capacitor must be greater than maximum inputvoltage plus ripple voltage.
The input ripple voltage can be approximated byequation below:
Since the input current is discontinuous in a buckconverter, the current stress on the input capacitor isanother concern when selecting the capacitor. For a buckcircuit, the RMS value of input capacitor current can becalculated by:
if let m equal the conversion ratio:
The relation between the input capacitor RMS currentand voltage conversion ratio is calculated and shown inFigure14. It can be seen that when VO is half of VIN, CINis under the worst current stress. The worst currentstress on CIN is 0.5·IO.
Figure 14. ICIN vs. Voltage Conversion Ratio
For reliable operation and best performance, the inputcapacitors must have current rating higher than ICIN-RMSat worst operating conditions. Ceramic capacitors arepreferred for input capacitors because of their low ESRand high ripple current rating. Depending on theapplication circuits, other low ESR tantalum capacitor oraluminum electrolytic capacitor may also be used. Whenselecting ceramic capacitors, X5R or X7R type dielectricceramic capacitors are preferred for their bettertemperature and voltage characteristics. Note that theripple current rating from capacitor manufactures isbased on certain amount of life time. Further de-ratingmay be necessary for practical design requirement.
Inductor
The inductor is used to supply constant current to outputwhen it is driven by a switching voltage. For given inputand output voltage, inductance and switching frequencytogether decide the inductor ripple current, which is:
t1 t2
ST2
1
Output Voltage Ripple
DAC Voltage 1
DAC Voltage 2
VIN
IOf CIN----------------- 1
VO
VIN
---------– VO
VIN
---------=
ICIN_RMS IOVO
VIN
--------- 1VO
VIN
---------–
=
VO
VIN
--------- m=
0
0.1
0.2
0.3
0.4
0.5
0 0.5 1m
ICIN_RMS(m)
IO
ILVO
f L----------- 1
VO
VIN---------–
=
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AOZ2233CQI-22
The peak inductor current is:
High inductance gives low inductor ripple current butrequires larger size inductor to avoid saturation. Lowripple current reduces inductor core losses. It alsoreduces RMS current through inductor and switches,which results in less conduction loss. Usually, peak topeak ripple current on inductor is designed to be 30% to50% of output current.
When selecting the inductor, make sure it is able tohandle the peak current without saturation even at thehighest operating temperature. The inductor takes the highest current in a buck circuit.The conduction loss on inductor needs to be checked forthermal and efficiency requirements.Surface mount inductors in different shape and styles areavailable from Coilcraft, Elytone and Murata. Shieldedinductors are small and radiate less EMI noise. But theycost more than unshielded inductors. The choicedepends on EMI requirement, price and size.
Output Capacitor
The output capacitor is selected based on the DC outputvoltage rating, output ripple voltage specification andripple current rating.The selected output capacitor must have a higher ratedvoltage specification than the maximum desired outputvoltage including ripple. De-rating needs to beconsidered for long term reliability.
Output ripple voltage specification is another importantfactor for selecting the output capacitor. In a buckconverter circuit, output ripple voltage is determined byinductor value, switching frequency, output capacitorvalue and ESR. It can be calculated by the equationbelow:
where, CO is output capacitor value and ESRCO is theEquivalent Series Resistor of output capacitor.When low ESR ceramic capacitor is used as outputcapacitor, the impedance of the capacitor at theswitching frequency dominates. Output ripple is mainlycaused by capacitor value and inductor ripple current.The output ripple voltage calculation can be simplified to:
If the impedance of ESR at switching frequencydominates, the output ripple voltage is mainly decided bycapacitor ESR and inductor ripple current. The outputripple voltage calculation can be further simplified to:
For lower output ripple voltage across the entireoperating temperature range, X5R or X7R dielectric typeof ceramic, or other low ESR tantalum are recommendedto be used as output capacitors.In a buck converter, output capacitor current iscontinuous. The RMS current of output capacitor isdecided by the peak to peak inductor ripple current. It canbe calculated by:
Usually, the ripple current rating of the output capacitor isa smaller issue because of the low current stress. Whenthe buck inductor is selected to be very small andinductor ripple current is high, output capacitor could beoverstressed.
ILpeak IOIL2--------+= )
8
1(
OCOLO Cf
ESRIV
VO IL1
8 f CO-------------------------=
VO IL ESRCO=
ICO_RMS
IL
12----------=
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AOZ2233CQI-22
Thermal Management and Layout ConsiderationIn the AOZ2233CQI-22 buck regulator circuit, highpulsing current flows through two circuit loops. The firstloop starts from the input capacitors, to the IN pin, to theLX pins, to the filter inductor, to the output capacitor andload, and then return to the input capacitor throughground. Current flows in the first loop when the high sideswitch is on. The second loop starts from inductor, to theoutput capacitors and load, to the low side switch.Current flows in the second loop when the low sideswitch is on.In PCB layout, minimizing the two loops area reduces thenoise of this circuit and improves efficiency. A groundplane is strongly recommended to connect inputcapacitor, output capacitor, and PGND pin of theAOZ2233CQI-22. In the AOZ2233CQI-22 buck regulator circuit, the majorpower dissipating components are the AOZ2233CQI-22and the output inductor. The total power dissipation ofconverter circuit can be measured by input power minusoutput power.
The power dissipation of inductor can be approximatelycalculated by DCR of inductor and output current.
The actual junction temperature can be calculated withpower dissipation in the AOZ2233CQI-22 and thermalimpedance from junction to ambient.
The maximum junction temperature of AOZ2233CQI-22is 150ºC, which limits the maximum load currentcapability.
The thermal performance of the AOZ2233CQI-22 isstrongly affected by the PCB layout. Extra care should betaken by users during design process to ensure that theIC will operate under the recommended environmentalconditions.
Ptotal_loss VIN IIN VO IO–=
Pinductor_loss IO2 Rinductor 1.1=
AJAlossinductorlosstotaljunction TPPT )( __
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AOZ2233CQI-22
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Layout ConsiderationsSeveral layout tips are listed below for the best electricand thermal performance. 1. Connected a small copper plane to LX pin to have
lower noise interference area.2. The IN pins and pad are connected to internal high
side switch drain. They are also low resistance thermal conduction path. Connected a large copperplane to IN pins to help thermal dissipation.
3. Input capacitors should be connected to the IN pinand the PGND pin as close as possible to reduce theswitching spikes.
4. Decoupling capacitor CVCC should be connected toVCC and AGND as close as possible.
5. Keep sensitive signal traces such as output trace faraway from the LX pins.
6. Let digital pins such as AD0, SCL and SDA, to useAGND.
7. Let VOI pin to use AGND.8. Pour copper plane on all unused board area and
connect it to stable DC nodes, like VIN, GND orVOUT.
VOUT
VIN
PGND
12345
AD0
SCL
SDA
VOU
T
7
9
10
IN
IN
BST
VCC
16151312
LXLX
LX
PGN
D
PGN
D
14
PGN
D
8IN
LX
11LX
17
PGN
DVO
IAGND
PGOOD
EN
LX
IN
AGN
D6
18
19
20
21
22
AOZ2233CQI-22
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Package Dimensions, QFN4x4-22L, EP2_S
D2D1
−−−A1
E
E2
DIMENSIONS IN MILLIMETERS
MINSYMBOLS
ANOM MAX
−−−
DIMENSIONS IN INCHES
MIN NOM MAX
E1
RECOMMENDED LAND PATTERN
UNIT: mm
D3LL1
NOTE1. CONTROLLING DIMENSION IS MILLIMETER.
CONVERTED INCH DIMENSIONS ARE NOT NECESSARILY EXACT.2. TOLERANCE : 0.05 UNLESS OTHERWISE SPECIFIED.3. RADIUS ON ALL CORNER ARE 0.152 MAX., UNLESS OTHERWISE SPECIFIED.4. PACKAGE WARPAGE: 0.012 MAX.5. NO ANY PLASTIC FLASH ALLOWED ON THE TOP AND BOTTOM LEAD SURFACE.6. PAD PLANARITY: 0.1027. CRACK BETWEEN PLASTIC BODY AND LEAD IS NOT ALLOWED.
A2
L5
L2L3
E3D
L4
eb
AOZ2233CQI-22
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Tape and Reel Dimensions, QFN4x4-22L, EP2_S
AOZ2233CQI-22
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As used herein:
1. Life support devices or systems are devices orsystems which, (a) are intended for surgical implant intothe body or (b) support or sustain life, and (c) whosefailure to perform when properly used in accordancewith instructions for use provided in the labeling, can bereasonably expected to result in a significant injury ofthe user.
2. A critical component in any component of a lifesupport, device, or system whose failure to perform canbe reasonably expected to cause the failure of the lifesupport device or system, or to affect its safety oreffectiveness.
LIFE SUPPORT POLICY
ALPHA AND OMEGA SEMICONDUCTOR PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS.
Part Marking
Part Number Part Number Code of Marking
AOZ2233CQI-22 AUCR
A U C ROption Code
Assembly Lot CodeYear & Week Code
YWLTPart Number Code
AOZ2233CQI-22(QFN 4x4)
Pin 1
LEGAL DISCLAIMER
Applications or uses as critical components in life support devices or systems are not authorized. AOS does not assume any liability arising out of such applications or uses of its products. AOS reserves the right to make changes to product specifications without notice. It is the responsibility of the customer to evaluate suitability of the product for their intended application. Customer shall comply with applicable legal requirements, including all applicable export control rules, regulations and limitations.
AOS' products are provided subject to AOS' terms and conditions of sale which are set forth at:http://www.aosmd.com/terms_and_conditions_of_sale