Arithmetic IICPSC 321

E. J. Kim

Today’s Menu

Arithmetic-Logic UnitsLogic Design RevisitedFaster AdditionMultiplication (if time permits)

Goals

• We recall some basic logic gates• Determine the truth tables for the Boolean

functions• We recall half-adders and full-adders• Ripple-carry adders• Discuss faster adders

Logic Gates

• AND gate

• OR gate

• NOT gate

What are the truth tables?

Logic Gates

• NOR gate

• NAND gate

• XOR gate

What are the truth tables?

Half Adder

s

c

ab

a b c s

0 0 0 0

0 1 0 1

1 0 0 1

1 1 1 0

Full Adder

cin a b cout s

0 0 0 0 0

0 0 1 0 1

0 1 0 0 1

0 1 1 1 0

1 0 0 0 1

1 0 1 1 0

1 1 0 1 0

1 1 1 1 1

Give a Boolean formula for s

• s=cin xor a xor b

Give a Boolean formula for cout

• cout =ab+cin(a xor b)

Design now a circuit using and, or, xor.

Full Adder

cin

ab

cout

s

s=cin xor a xor b cout = ab+cin(a xor b)

Ripple Carry Adder

Critical Path

cin

ab

cout

s

Suppose that each gate has a unit delay. What is the critical path (= path with the longest delay)?

Ripple Carry Adders

• Each gates causes a delay• our example: 3 gates for carry generation • book has example with 2 gates

• Carry might ripple through all n adders• O(n) gates causing delay• intolerable delay if n is large

• Carry lookahead adders

Faster Adders

cin a b cout s

0 0 0 0 0

0 0 1 0 1

0 1 0 0 1

0 1 1 1 0

1 0 0 0 1

1 0 1 1 0

1 1 0 1 0

1 1 1 1 1

cout=ab+cin(a xor b) =ab+acin+bcin

=ab+(a+b)cin

= g + p cin

Generate g = abPropagate p = a+b

Why are they called like that?

Fast Adders

Iterate the idea, generate and propagateci+1 = gi + pici

= gi + pi(gi-1 + pi-1 ci-1)

= gi + pigi-1+ pipi-1ci-1

= gi + pigi-1+ pipi-1gi-2 +…+ pipi-1 …p1g0

+pipi-1 …p1p0c0

Two level AND-OR circuit Carry is known early!

Carry Lookahead Adders

• Based on the previous identityFast because critical path is shorterO(log n) gate delays [assuming 2-input gates]More complex to implement Design is less regularLayout of one bit adder cells depend on i

• Compromise couple blocks of carry lookahead adders

Building an ALU

0

2

Result

Operation

a

1

CarryIn

CarryOut

0

1

Binvert

b

AdditionSubtractionANDOR

What is missing?

• Need to support the set-on-less-than instruction

(slt)

• remember: slt is an arithmetic instruction

• produces 1 if rs < rt and 0 otherwise

• use subtraction: (a-b) < 0 implies a < b

• Need to support test for equality (beq $t5, $t6,

$t7)

• use subtraction: (a-b) = 0 implies a = b

Tailoring the ALU to the MIPS

SLT

• Determine a<b• Calculate b-a• If MSB equals

• 1, then a<b• 0, then a>=b

• Changes?• Operation less than• Output of

subtraction• Overflow

0

2

Result

Operation

a

1

CarryIn

CarryOut

0

1

Binvert

b

SLT

0

3

Result

Operation

a

1

CarryIn

CarryOut

0

1

Binvert

b 2

Less

0

3

Result

Operation

a

1

CarryIn

0

1

Binvert

b 2

Less

Set

Overflowdetection

Overflow

a.

b.

• 4 operations• subtraction output available• Connect • MSB set output

w/ LSB less

Seta31

0

ALU0 Result0

CarryIn

a0

Result1a1

0

Result2a2

0

Operation

b31

b0

b1

b2

Result31

Overflow

Binvert

CarryIn

Less

CarryIn

CarryOut

ALU1Less

CarryIn

CarryOut

ALU2Less

CarryIn

CarryOut

ALU31Less

CarryIn

• LSB indicates whether a<b

• 0 if false

• 1 if true

Test for equality

• Notice control lines:

000 = and001 = or010 = add110 = subtract111 = slt

•Note: zero is a 1 when the result is zero!Set

a31

0

Result0a0

Result1a1

0

Result2a2

0

Operation

b31

b0

b1

b2

Result31

Overflow

Bnegate

Zero

ALU0Less

CarryIn

CarryOut

ALU1Less

CarryIn

CarryOut

ALU2Less

CarryIn

CarryOut

ALU31Less

CarryIn

Summary

• We can build an ALU to support the MIPS instruction set

• key idea: use multiplexor to select the output we want• we can efficiently perform subtraction using two’s complement• we can replicate a 1-bit ALU to produce a 32-bit ALU

• Important points about hardware• all of the gates are always working• the speed of a gate is affected by the number of inputs to the

gate• the speed of a circuit is affected by the number of gates in

series(on the “critical path” or the “deepest level of logic”)

• We focused on basic principles. We noted that • clever changes to organization can improve performance

(similar to using better algorithms in software)• faster addition, next time: faster multiplication