AT91RM3400 Development Kit - application-notes.digchip.comapplication-notes.digchip.com/015/15-16237.pdf · AT91RM3400 Development Kit User Guide 1-1 Rev. 6106A–ATARM–09/04 Section

AT91RM3400 Development Kit..............................................................................................

User Guide

AT91RM3400 Development Kit Use

Table of Contents

Section 1Overview............................................................................................... 1-1

1.1 Scope........................................................................................................1-11.2 Deliverables ..............................................................................................1-11.3 The AT91RM3400 Development Board ....................................................1-2

Section 2Setting Up the AT91RM3400 Development Board .............................................................................. 2-1

2.1 Electrostatic Warning ................................................................................2-12.2 Requirements............................................................................................2-12.3 Powering Up the Board.............................................................................2-12.4 Getting Started with the AT91RM3400 .....................................................2-1

Section 3Board Description ................................................................................. 3-1

3.1 AT91RM3400 Processor...........................................................................3-13.2 Memory .....................................................................................................3-23.3 Memory Card ............................................................................................3-23.4 Clock Circuitry and Analog Functions .......................................................3-23.5 Reset Circuitry...........................................................................................3-23.6 Power Supply Circuitry..............................................................................3-23.7 Remote Communication............................................................................3-23.8 User Interface ...........................................................................................3-23.9 Expansion Slots ........................................................................................3-23.10 Debug Interface ........................................................................................3-2

Section 4Configuration Straps ............................................................................. 4-1

4.1 Configuration Straps and Jumper Settings ...............................................4-1

Section 5Schematics ........................................................................................... 5-1

5.1 Schematics ...............................................................................................5-1

r Guide i

6106A–ATARM–09/04

Table of Contents

ii

6106A–ATARM–09/04

AT91RM3400 Development Kit User Guide

Section 1

Overview

1.1 Scope The AT91RM3400 Development Board enables real-time code development and evalu-ation. It supports the AT91RM3400 ARM7TDMI®-based 32-bit RISC microcontroller.

This guide focuses on the AT91RM3400 Development Board as an evaluation and dem-onstration platform:

Section 1 is this overview.

Section 2 gives information on setting up the installation.

Section 3 contains a description of the development board.

Section 4 details the configuration straps.

Section 5 shows board schematics.

1.2 Deliverables The development kit is delivered with:

One AC adapter 100 - 240V ~ 1.0A, 50 - 60 Hz

One modem RS232 cable

One A/B-type USB cable

Two power supply cables, one US format, one French format

One CD-ROM containing summary and full datasheets, datasheets with electrical and mechanical characteristics, application notes and getting started documents for all development boards and AT91 microcontrollers. An AT91 software package with C and assembly listings is also provided. This allows the user to begin evaluating the AT91 ARM® Thumb® 32-bit microcontroller quickly.

AT91RM3400 Development Kit User Guide 1-1

Rev. 6106A–ATARM–09/04

Overview

1.3 The AT91RM3400 Development Board

The board consists of an AT91RM3400 together with the following:

128K bytes of EEPROM with two-wire interface access

8M bytes of serial DataFlash®

Three communication ports (USB host and device, serial and IrDA)

JTAG/ICE and debug interface

Expansion connector

Figure 1-1. AT91RM3400 Development Board Block Diagram

Si3044Line Interface

Chipset

RS232Driver

IrDATrasnceiver

SDCardSocket

Smart CardSocket

Oscillator, PLLand Reset

PowerSupply

LCDPanel Slot

ADC

USB DevicePort

DCInput

UserAnalogInputs

DataFlash EEPROM

ClockController

LED

ICE Debug Port

RS232 Driver

Extension Slot

Extension Slot

AT91RM3400

SPI TWI TWI

JTAG

DBGU

PIOAPIOB

SSCSSCTWIUSARTMCI orSPI

USARTNRST

UDP

SPI

1-2 AT91RM3400 Development Kit User Guide

6106A–ATARM–09/04

Section 2

Setting Up the AT91RM3400Development Board

2.1 Electrostatic Warning

The AT91RM3400 development board is shipped in protective anti-static packaging.The board must not be subjected to high electrostatic potentials. A grounding strap orsimilar protective device should be worn when handling the board. Avoid touching thecomponent pins or any other metallic element.

2.2 Requirements In order to connect the AT91RM3400 development board, the following elements arerequired:

The AT91RM3400 development board itself

Power supply cable capable of supplying 7V to 12V at 1A (not supplied)

2.3 Powering Up the Board

DC power is supplied to the board via the 2.1 mm socket (J1). The polarity of the powersupply is not critical. The minimum voltage required is 7V.

The board has a voltage regulator providing +3.3V. The regulator allows the input volt-age range to be from 7V to 12V.

2.4 Getting Started with the AT91RM3400

The AT91RM3400 Development Kit is delivered with a CD-ROM containing all neces-sary information and step-by-step procedures for working with the most commondevelopment tool chains.

Please refer to this CD-ROM, or to the AT91 web site, http://www.atmel.com/prod-ucts/AT91/, for the most up-to-date information on getting started with theAT91RM3400.



Setting Up the AT91RM3400 Development Board


6106A–ATARM–09/04

Section 3

Board Description

3.1 AT91RM3400 Processor

Incorporates the ARM7TDMI® ARM® Thumb® Processor

– Runs at up to 55 MHz providing 0.9 MIPS/MHz

– Based on ARMV4T Architecture

– In-circuit Emulator including Debug Communication Channel

Additional Embedded Memories

– 96K Bytes of SRAM and 256K Bytes of ROM

System Peripherals:

– Enhanced Clock Generator and Power Management Controller

– Two On-chip Oscillators with Two PLLs

– Very Slow Clock Operating Mode and Software Power OptimizationCapabilities

– Four Programmable External Clock Signals

– System Timer Including Periodic Interrupt, Watchdog and Second Counter

– Real-time Clock with Alarm Interrupt

– Debug Unit, Two-wire UART and Support for Debug Communication Channel

– Advanced Interrupt Controller with 8-level Priority, Individually MaskableVectored Interrupt Sources, Spurious Interrupt Protected

– Seven External Interrupt Sources and One Fast Interrupt Source

– Two 32-bit PIO Controllers with Up to 63 Programmable I/O Lines, InputChange Interrupt and Open-drain Capability on Each Line

– 19-channel Peripheral Data Controller (DMA)

USB 2.0 Full Speed (12 M-bits per second) Device Port

Multimedia Card Interface (MCI)

Three Synchronous Serial Controllers (SSC)

Four Universal Synchronous/Asynchronous Receiver/Transmitters (USART)

Master/Slave Serial Peripheral Interface (SPI)

Two 3-channel, 16-bit Timer/Counters (TC)

Two-wire Interface (TWI)



Board Description

IEEE 1149.1 JTAG Boundary Scan on All Digital Pins

3.2 Memory 128-Kbyte EEPROM with 2-wire interface

8-Mbyte serial DataFlash

3.3 Memory Card SD Card/MMC

– Supports MultiMedia and SD Card

– Analog switches provide support for DataFlash Card

Smart Card Interface

3.4 Clock Circuitry and Analog Functions

32.768 kHz standard crystal for the AT91RM3400

18.432 MHz standard crystal for the AT91RM3400

Temperature sensor

Analog-to-digital converter

3.5 Reset Circuitry Reset Controller

3.6 Power Supply Circuitry

3.3V DC/DC converter

1.8V DC/DC converter

3.7 Remote Communication

IrDA Transceiver

Host Interface via RS-232 DB9 male socket

Line interface

Debug Port via RS-232 DB9 connector

Device USB socket

3.8 User Interface One LED and sixteen user buttons managed via general PIO lines

3.9 Expansion Slots Four expansion slots give access to all the microcontroller’s signals

3.10 Debug Interface 20-pin JTAG interface connector

Serial Debug Unit


6106A–ATARM–09/04

Section 4

Configuration Straps

4.1 Configuration Straps and Jumper Settings

Table 4-1 gives details on configuration straps and jumper settings on the AT91RM3400development board and their default settings.

Table 4-1. Configuration Straps and Jumper Settings

DesignationDefault Setting Feature

S1 Closed The thermistor input of MAX17J7 (MN2) is tied to GND.

S2 Closed The guard ring is connected to GND.

S4 Closed The PA20/DCD1/TIA2 PIO line is connected to the LED (DS4)

S5 Closed The PB9/NPCS2/RD1 PIO line is connected to the buzzer (LS1)

S6 Closed Chip select AFF_CS is connected to the LCD panel.

S7 Closed The PB27/DTXD/IRQ3 PIO line is connected to the READY/BUSY of the Serial DataFlash (MN9).

S8 Open The Write Protect signal is not active for the DataFlash (MN9).

S9 Closed The PA8/TWCK/PCK3 PIO line is connected to the EEPROM clock (MN10).

S10 Closed The PA7/TWD/PCK2 PIO line is connected to the EEPROM I/O line (MN10).

S11 Open The PA3/NPCS0/PCK1 is not connected to the serial DataFlash chip select (MN9).

S12 Closed The ADC_CS PIO line is connected to the Analog-to Digital Converter chip select.

S13 Closed The TD2/IRQ2/PB6 PIO line is connected to the Analog-to-Digital Converter End of Conversion signal.

S14 Closed Analog-to-Digital Converter VREF PIO line is connected to GND.

S15 Closed The PA4/NPCS1 PIO line is connected to the LCD panel.

S16 Closed The PA30/DXRD PIO line is connected to the DBGU receive signal

S17 Closed The PA14/RXD1 PIO line is connected to the USART1 read signal.

S18 Closed The PA17/CTS1/TIOB0 PIO line is connected to the USB CNX signal.



Configuration Straps

Note: Shaded cells indicate configuration straps/jumpers with open connections.

Note: Signal names in bold indicate that the function is shared between several sig-nals.

S19 Closed The PA21/RI1/TIOB2 PIO line is connected to the receive buffer output of the DBGU transceiver (MN26).

S20 Closed The PB25/IRQ1/TD1 PIO line is connected to the ready signal of the smart card reader (MN15).

S21 Closed The PA22/RXD2/DRXD PIO line is connected to IrDA receive signal (MN16).

S22 Closed The PA9/TXD0 PIO line is connected to the data signal of the smart card reader (M15).

S23 Closed The PB0/TF0/TIOB3 PIO line is connected to the ring detector of the Si3044 (MN18)

S24 Closed The PB4/RK0/PCK0 PIO line is connected to the off-hook detector of the Si3044 device (MN18).

S25 Closed The PB1/TK0/TCLK3 PIO line is connected to the receive clock of the Si3044 device (MN18).

S26 Closed PB3/RD0/RTS3 PIO line is connected to the serial data out of the Si3044 device (MN18).

S27 Closed The PB5/RF0/TIOA3 PIO line is connected to the frame synchro of the Si3044 device (MN18)

S28 Closed CELL input of MAX1757 is tied to GND (MN2).

S29 Closed PA18/DTR1/TIOA1 PIO line is connected to the reset line of the Si3044 device (MN18)

J3 Open Extend Battery Temperature Sensor S1 must be open if installed.

J4 Closed VDDCORE user entry measures 1.8V

J6 1-2 JTAGSEL is tied to GND

J13 Closed User entry measures 5V full range.

J22 Open Hardware compatibility with AT24C128/256/512

J23 Closed PA3/NPCS0/PCK1 is connected to the serial DataFlash chips elect (MN9).

Table 4-1. Configuration Straps and Jumper Settings

DesignationDefault Setting Feature


6106A–ATARM–09/04

Section 5

Schematics

5.1 Schematics This section contains the following schematics:

AT91RM3400 Board Layout - Top View

AT91RM3400 Board Layout - Bottom View

Power Supply

AT91RM3400

LCD and Keyboard

Serial Devices

Serial Interfaces

I2S Analog Front End

DAA

Diagram



Schematics

Figure 5-1. AT91RM3400 Development Kit Top VIew

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R52

R51

R54

R47

R53

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R46

BP8

BP5

BP11

BP14

1

C84

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R44

BP4

BP17

J14

MN12

C81

C83

C82

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1

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BP3

BP7

BP10

BP13

BP16

C93

BP6

BP9

BP12

BP15

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C91

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C92

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R36

S22

S20

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21

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19

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12

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R54

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C113

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R82

22

R85

R108

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1

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TP2

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R63C74

R50

R52

R51

R54

R47

R53

C76

R46

BP8

BP5

BP11

BP14

1

C84

1

C79

MN11

R44

BP4

BP17

J14

MN12

C81

C83

C82

1

1

J12

BP3

BP7

BP10

BP13

BP16

C93

BP6

BP9

BP12

BP15

1

C88

MN14

C91

1

C92

C85

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S22

S20

R38 R37R39

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21

75

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DS4

k

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J8

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MN6

J9

50

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Q8

R103

R106

1

C142

C145

C139

R96

C136

KCR21

C138

C137

CR17

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VUE FACE ELEMENTS

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1

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19

20

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C19

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C113

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23

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C14

C25

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k

C27

DS3

k

DS2

k

MN9

J23

Z1




6106A–ATARM–09/04

Schematics

Figure 5-2. AT91RM3400 Development Kit Bottom VIew



2/2


2/2


VUE FACE SOUDURES

32B

24

02

0E

P36

ATMEL

WWW.STUDIEL.fr

CARTE AT91RM3400-DK

PLAN D’EQUIPEMENT

B DCA

FT

1...06/10/03

DATE

PAGE

11/04/02

1

...ELX

IND

JJR

VERIF

DATE

NUMERO

2

...06/10/03

TYPE

11/04/02

2

...RLD

CCX

DESS.

CL

1.3

..

..

..

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ECHELLE:

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IND

3

4

TEL 04 92 02 45 45 FAX 04 92 02 45 46

5

6

77

88

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R11

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C124

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R76

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+

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R98

R100

R101

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C37

C30

R30

C44

C51

C50

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C96

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R61

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C39

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1

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S21

C78

C73

C71C77

C72

C70C61

VUE FACE SOUDURES

VUE FACE SOUDURES

VUE FACE SOUDURES

VUE FACE SOUDURES




6106A–ATARM–09/04

Schematics

Figure 5-3. Power Supply

88

77

66

55

44

33

22

11

DD

CC

BB

AA

VL

VL

VL

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16


6106A–ATARM–09/04

Schematics

Figure 5-4. AT91RM3400 Chip

88

77

66

55

44

33

22

11

DD

CC

BB

AA

PA5

PA3

USB_DPDPP

B1

3

PA15

PB

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PA10

PA2

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25

78

16

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VD

DC

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TCK

TDI

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16

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14

SD

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PA8

PA6

VD

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PA12

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PA16

PA4

PA1

PB

27

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PB

7

PB

6

PA30

PB

8

VD

DC

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EPA23

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28

PB

18

PB

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PB

3

PB

19

PB

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TDO

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USB_DMDM

VDDCORE

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10

PA31

TMS

PB

15

PB

5

PB

9

PB

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PB

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PB

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PB

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PA13

PB

20

PB

I0

PB

22

PB

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SDC_DAT3 PA29

PA25

PA11

SDC_DAT1 PA27

PA21

PA17

SDC_DAT0 PA26

SDC_DAT2 PA28

TC

K

TM

S

TD

I

NR

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PB1

ADC_CSPA7 PB3

PB17

PB18

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PB

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PB13

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89

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B2

89

4M

CD

B2

/IRQ

5/P

B2

99

5M

CD

B3

/IRQ

6/P

B3

09

6

DM97

DP98

GND100

VD

DC

OR

E1

GN

D2

VD

DP

LL

3

PL

LR

CB

4

GN

DP

LL

5

XO

UT

6

XIN

7

VD

DO

SC

8

GN

DO

SC

9

XO

UT

32

10

PA0/MISO15

PA1/MOSI16

PA2/SPCK/PCK017

PA3/NPCS0/PCK118

PA4/NPCS1/USUSPEND19

PA5/NPCS2/SCK120

PA6/NPCS3/SCK221

PA7/TWD/PCK222

PA8/TWCK/PCK323

PA11/SCK0/TCLK026

PA12/CTS0/TCLK127

PA9/TXD024

PA13/RTS0/TCLK228

VD

DIO

29

GN

D3

0

PA14/RXD131

PA15/TXD132

PA16/RTS1/TIOA033

PA17/CTS1/TIOB034

VD

DC

OR

E3

5

PA20/DCD1/TIOA239

PA22/RXD2/URXD41

PA23/TXD2/UTXD42

PA24/MCCK/RTS043

PA25/MCCDA/RTS144

PA26/MCDA045

PA27/MCDA1/UEON46

PA28/MCDA2/RTS247

VD

DIO

48

PA29/MCDA3/CTS250

PA30/DRXD51

PA31/DTXD52

TIO

B3

/TF

0/P

B0

53

TC

LK

3/T

K0

/PB

15

4R

TS

2/T

D0

/PB

25

5R

TS

3/R

D0

/PB

35

6P

CK

0/R

K0/P

B4

57

TIO

A3

/RF

0/P

B5

58

TIO

B4

/TF

1/P

B6

59

TC

LK

4/T

K1

/PB

76

0

TIO

B5

/TF

2/P

B1

26

5

VD

DIO

66

GN

D6

7

TC

LK

5/T

K2

/PB

13

68

NP

CS

3/T

D2

/PB

14

69

PC

K1

/RD

2/P

B1

57

0P

CK

2/R

K2

/PB

16

71

TIO

A5

/RF

2/P

B1

77

2M

CC

DB

/RT

S3

/PB

18

73

MC

DB

0/C

TS

3/P

B1

97

4

RX

D3

/PB

21

76

PC

K3

/SC

K3

/PB

22

77

JTAGSEL78

TDI79

TDO80

TCK81

TMS82

VDDIO83

GND84

TST85

J9

12

34

56

78

91

0

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

C3

6

10

0N

F

R1

11

10

K

C5

03

.3N

F

C4

61

0P

F

C4

410

0N

F


6106A–ATARM–09/04

Schematics

Figure 5-5. LCD and Keyboard

88

77

66

55

44

33

22

11

DD

CC

BB

AA

PB

O3

PB

I3

PB

O2

PB

I0

PB

O1

PB

I2

PB

O0

PB

I1

PB

I[0..3

]

PB

O[0

..3]

3V

3

3V

3

3V

3

3V

3

3V

3

AF

F_

CS

NR

ST

AF

F_

RS

SP

CK

MO

SI

BU

ZZ

ER

LE

D

IND

Da

te:

ST

UD

IEL

1027, A

v d

u d

octe

ur LE

FE

BV

RE

06271 V

ILLE

NE

UV

E L

OU

BE

T

Tél: 0

4 9

2 0

2 4

5 4

5 F

ax: 0

4 9

2 0

2 4

5 4

6

MO

DIF

.D

ES

S.

Da

te:

VE

RIF

.

Ech:

1/1

CL

TY

PE

NU

ME

RO

IND

PA

GE

FT

Th

is a

gre

em

en

t is o

ur p

ro

pe

rty

. Re

pro

du

ctio

n a

nd

pu

blic

atio

n w

itho

ut o

ur w

ritte

n a

uth

oriz

atio

n s

ha

ll exp

ose

offe

nd

er to

leg

al p

roce

ed

ing

s.

ED

T O

RG

A

38

Tu

esd

ay, J

un

e 2

4, 2

00

3

63SC020423B

LC

D &

KE

YB

OA

RD

3

JP

G0

7/0

2/0

2

AT

91R

M3400-D

K

AT

ME

L

24

/06

/03

24

/06

/03

JP

GB

JM

D

0# 9

8

65

32

KE

YB

OA

RD

F4

F2

F3

F1

7 4 1*

NO

RM

ALLY

CLO

SED

NO

RM

ALLY

CLO

SED

NO

RM

ALLY

CLO

SED

ACCESSO

RIES O

F A

SSEM

BLY

NO

TIN

STALLED

BP

9

1

42

3

S6

R3

41

00

K

C6

4

2.2

µF

S1

5

BP

6

1

42

3

R3

3

12

0R

C5

7

1µ

F

Q4

IRL

ML

63

02

1

3 2

C6

5

2.2

µF

R1

07

10

0K

Z1

5

BP

4

1

42

3

BP

14

1

42

3

C5

9

1µ

F

LS

1

BU

ZZ

ER

1 2

Z1

6

J1

2

52

74

6-2

09

0

12

34

56

78

91

01

11

21

31

41

51

61

71

81

92

0

BP

11

1

42

3

Z1

7

R3

71

00

K

C6

0

2.2

µF

C6

3

1µ

F

BP

8

1

42

3

BP

16

1

42

3

Z1

8

V4

NC

V3

V2

V1

V0

C2-

C2+

C1+

C1-

C3+

VOUT

VSS

VDD

SI

SCL

RS

NRST

NCS1

NC

J1

1

TM

12864

BP

15

1

42

3

R3

61

00

K

R3

5

10

0K

63PC020746

Z1

4

R3

81

00

KB

P1

3

1

42

3

C5

8

1µ

F

BP

10

1

42

3

DS

4

RE

D

BP

7

1

42

3

S5

C6

1

2.2

µF

R3

91

00

KB

P1

7

1

42

3

BP

3

1

42

3

BP

2

1

42

3

C6

2

1µ

FC

66

10

0N

F

S4

BP

5

1

42

3

C5

61

00

NF

BP

12

1

42

3


6106A–ATARM–09/04

Schematics

Figure 5-6. Serial Devices

88

77

66

55

44

33

22

11

DD

CC

BB

AA

SP

CK

MIS

O

MO

SI

3V

3 3V

3

3V

3

3V

3

3V

3

3V

3

3V

3

3V

3

3V

3

TW

CK

TW

D

SP

CK

AD

C_

IRQ

AD

C_

CS

TE

MP

VB

AT

VIN

MIS

O

MO

SI

NP

CS

0

NR

ST

RD

Y_

BU

SY

DA

C3

55

0_

SC

L

DA

C3

55

0_

SD

A

IND

Da

te:

ST

UD

IEL

1027, A

v d

u d

octe

ur LE

FE

BV

RE

06271 V

ILLE

NE

UV

E L

OU

BE

T

Tél: 0

4 9

2 0

2 4

5 4

5 F

ax: 0

4 9

2 0

2 4

5 4

6

MO

DIF

.D

ES

S.

Da

te:

VE

RIF

.

Ech:

1/1

CL

TY

PE

NU

ME

RO

IND

PA

GE

FT

Th

is a

gre

em

en

t is o

ur p

ro

pe

rty

. Re

pro

du

ctio

n a

nd

pu

blic

atio

n w

itho

ut o

ur w

ritte

n a

uth

oriz

atio

n s

ha

ll exp

ose

offe

nd

er to

leg

al p

roce

ed

ing

s.

ED

T O

RG

A

48

Tu

esd

ay, J

un

e 2

4, 2

00

3

63SC020423B

SE

RIA

L D

EV

ICE

S

3

JP

G0

7/0

2/0

2

AT

91R

M3400-D

K

AT

ME

L

24

/06

/03

24

/06

/03

JP

GB

JM

D

NO

RM

ALLY

CLO

SED

NO

RM

ALLY

CLO

SED

5V F

ULL R

AN

GE

15V F

ULL R

AN

GE

5V F

ULL R

AN

GE

USER E

NTRY M

EASU

RE

NO

RM

ALLY

OPEN

NO

RM

ALLY

CLO

SED

WRIT

EPR

OTECT

NO

RM

ALLY

OPEN

AT45DB321 -

AT45DB1282

AT45DB642

AT45DB2562

AT

24C

1024

AT24C512

SO

8

SO

20

C7

7

10

0N

F

S7

MN

11

TLV

15

04

SD

O1

SD

I2

SC

LK

3

EO

C/IN

T4

CS

16

RE

FP

15

RE

FM

14

A0

6

A1

7

A2

8

FS

13

PW

DN

12

CS

TA

RT

10

VC

C5

GN

D1

1

A3

9

R5

2

7K

5

1%

R5

4

7K

5

1%

R5

12

40

R

R4

61

1K

C6

8

10

0N

F

C7

1

1N

F

J2

2

12

R4

2

10

0K

C7

0

1N

F

S1

0

S8

R4

91K

8

R5

01

1K

C7

3

1N

F

R4

84

7K

R4

72

40

R

MN

9

AT

45

DB

25

62

-TC

RE

SE

T6

GN

D3

6

VC

C3

7

CS

17

SC

K/C

LK

18

SI

19

SO

20

WP

7

RD

Y/B

US

Y5

N.C

1

N.C

2

N.C

3

N.C

4

N.C

21

N.C

22

N.C

23

N.C

24

N.C

25

N.C

26

N.C

27

N.C

28

N.C

29

N.C

30

SE

R/P

AR

31

IO0

32

IO1

33

IO2

34

IO3

35

IO4

38

IO5

39

IO6

40

IO7

41

N.C

42

N.C

43

N.C

44

N.C

45

N.C

46

N.C

47

N.C

48

VC

C1

1

GN

D1

2

N.C

8

N.C

9

N.C

10

N.C

13

N.C

14

N.C

15

N.C

16

C7

9

10

V

10

uF

C7

6

1µ

F

S1

1

S1

2

R1

08

10

K

C7

4

1µ

F

C6

7

10

0N

F

S9

R4

4

10

0K

C7

2

1N

F

S1

3J1

3

1 2

R4

5

10

0K

R5

3

7K

5

1%

MN

10

AT

24

C5

12

A0

1

A1

2W

P1

9

SC

L1

2

VC

C2

0

NC

3

SD

A1

1G

ND

10

NC

4

NC

5

NC

6

NC

7

NC

8

NC

9N

C1

3N

C1

4N

C1

5N

C1

6

NC

17

NC

18

C7

5

1µ

FC

78

10

0N

F

R4

01

00

K

R4

3

10

0K

R4

1

10

0K

J2

3

12

C6

9

10

0N

F


6106A–ATARM–09/04

5-8

AT

91R

M34

00 D

evel

op

men

t K

it U

ser

Gu

ide

6106

A–A

TA

RM

–09/

04

1

1

D

C

B

A

IND Date:

VRE

BET

02 45 46

MODIF. DESS. Date: VERIF.

Ech:1/1

CL TYPE NUMERO IND PAGE FT

Reproduction and publication without our written authorization shall expose offender to legal proceedings.

EDT ORGA

58

Tuesday, June 24, 2003

63SC020423B

ES

3

JPG 07/02/02

K

24/06/03 24/06/03JPGB JMD

RS232 COM PORT

RXD

TXD

RTS

CTS

USB DEVICE INTERFACE

TXD

RXD

SERIAL DEBUG PORT

J17

USB B

1

4

2

3

5 6

J16

ANGLED - SUB-D9M

5

4

3

2

1

9

8

7

6

10

11

C95

100NF

J14

ANGLED - SUB-D9M

5

4

3

2

1

9

8

7

6

10

11

Sch

emat

ics

Fig

ure

5-7

. S

eria

l Int

erfa

ces

8

8

7

7

6

6

5

5

4

4

3

3

2

2

D

C

B

A

MCI5

MCI7

SDC_DAT0

SDC_DAT3

MCI1

MCI2

MCI5

MCI2

MCI1

MCI9SDC_DAT2

MCI8SDC_DAT1

MCI7

SDC_DAT[0..3]

6V6

6V6

3V3

3V3

3V3

3V3

3V3

3V3

RXD

RTS

TXD

CTS

7816_IO

7816_RST

7816_CLK

7816_IRQ

USB_DM

USB_DP

IrDA_RXD

IrDA_TXD

DBGU_TXD

DBGU_RXD

MOSI

DFC_CS

MISO

SPCK

SDC_TYPE

SDC_CLK

SDC_CMD

7816_3V5V

USB_DP_PUP

USB_CNX

NRST

STUDIEL1027, Av du docteur LEFEB

06271 VILLENEUVE LOU

Tél: 04 92 02 45 45 Fax: 04 92

This agreement is our property.

SERIAL INTERFAC

AT91RM3400-D

ATMEL

SMART CARD READER

IrDA Tranceiver

SD CARD / MMC CARD INTERFACE

6V6 CHARGE PUMP

C92

100NF

S19

C101

470NF

C81

100NF

S22

R633R3

21

C86

100NF

Q5

MMBT2222A

R61 27R

C98 10µF

C1+

V+

VCC

C1-

C2+

C2- V-

T

T

R

R

GND

MN12

ADM3202ARN

1 16

3

4

5

15

11

10

12

9 8

13

7

14

2

6

R55

4K7

C84

100NF

R62 27R

C99

10µF

GND

V+

IN

NO3

CO3

NC3

NO4

CO4

NO1

CO1

NC1

NC2

CO2

NO2

NC4

VL

MN13

MAX4702

1

2

3

6

5

12

8

7 9

10

11

16

13

14

15

4

+ C85

16V

10uF

C1+

V+

VCC

C1-

C2+

C2- V-

T

T

R

R

GND

MN14

ADM3202ARN

1 16

3

4

5

15

11

10

12

9 8

13

7

14

2

6

R57 15K

CR15

PMLL4148

C103

100NF

C90

33PF

R58

22K

S17

J18

CCM02-2504

VC

C1

RS

T2

CL

K3

GN

D5

NC

6

I/O

7

NC

8N

C4

`1

7

`1

8

CR16

PMLL4148

CR14

PMLL4148

R59

47K

C91

100NF

S18

C83

100NF

C100

220NF

R60

1K5

C96

15PF

R56 10K

C97

15PF

MN16

TFDU4100-TR3

VCC1/SD6

LEDC2

RX4

GND8

N.C5

LEDA1

SC7

TX3

C88

100NF

C102

10V

10 uF

S21

C94

33PF

C87

100NF

S16

C82

100NF

C80

100NF

S20

CR24

BAT54

1

3

2

J15

FPS009

8

5

7

6

4

3

2

1

9

C93

100NFC89

100NF

MN15

LTC1756

PRES1

PWR2

5V/3V16

CARD15

GND3

I/O6

C-13

VCC5

RST7

CLK8

READY14

C+12

DATA11

RIN10

CIN9

VIN4

Schematics

Figure 5-8. I2S Analog Front End

88

77

66

55

44

33

22

11

DD

CC

BB

AA

3V

3

3V

3

3V

3

3V

3

DA

C3

55

0_

SC

L

DA

C3

55

0_

SD

A

SI3

04

4_

AO

UT

NR

ST

DA

C3

55

0A

_W

SI

DA

C3

55

0A

_D

AI

DA

C3

55

0A

_C

LI

IND

Da

te:

ST

UD

IEL

1027, A

v d

u d

octe

ur LE

FE

BV

RE

06271 V

ILLE

NE

UV

E L

OU

BE

T

Tél: 0

4 9

2 0

2 4

5 4

5 F

ax: 0

4 9

2 0

2 4

5 4

6

MO

DIF

.D

ES

S.

Da

te:

VE

RIF

.

Ech:

1/1

CL

TY

PE

NU

ME

RO

IND

PA

GE

FT

Th

is a

gre

em

en

t is o

ur p

ro

pe

rty

. Re

pro

du

ctio

n a

nd

pu

blic

atio

n w

itho

ut o

ur w

ritte

n a

uth

oriz

atio

n s

ha

ll exp

ose

offe

nd

er to

leg

al p

roce

ed

ing

s.

ED

T O

RG

A

68

Tu

esd

ay, J

un

e 2

4, 2

00

3

63SC020423B

I2S

AN

AL

OG

FR

ON

T E

ND

3

JP

G0

7/0

2/0

2

AT

91R

M3400-D

K

AT

ME

L

24

/06

/03

24

/06

/03

JP

GB

JM

D

HEAD

PHO

NE

LIN

E O

UT

LEFT

RIG

HT

R8

21

0K

R7

5

22

K

C1

23

22

0p

F

R7

94

7R

C1

16

10

NF

C1

06

27

0p

F

+

C1

22

10

V2

20

µF

C1

08

56

0p

F

L3

4.7

µH

22

0m

A

R6

9

7K

5

R6

4

7K

5

I2S

ST

ER

EO

AU

DIO

DA

C

MN

17

DA

C 3

55

0A

AG

ND

C1

AV

SS

12

AV

SS

03

NC

4

OU

TL

5

NC

6

OU

TR

7

NC

8

AV

DD

09

AV

DD

11

0

NC

11

VREF44

XTI12

XTO13

CLKOUT14

SCL15

SDA16

VSS17

VDD18

MCS119

MCS220

DEECTRL21

NC22 C

LI

23

DA

I2

4W

SI

25

PO

RQ

26

TE

ST

EN

27

NC

28

FOUTL37

FOPL38

AU

X1

L3

1A

UX

1R

32

AU

X2

L2

9A

UX

2R

30

NC

33

DEEML34

DEEMR35

NC36

FINL39

NC40

FOUTR41

FOPR42

FINR43

R7

2

7K

5

C1

25

10

V

10

uF

C1

10

1µ

F

R6

5

7K

5

J1

9

1

2

3

C1

13

1N

F

C1

04

82

PF

+

C1

20

6V

3

22

uF

R8

0

1K

5

C1

05

82P

F

C1

19

47

0N

F

R6

8

7K

5

C1

17

47

0N

F

R6

61

5K

C1

24

1N

F

R8

3

10

K

R8

1

1K

5

R8

51

0K

C1

09

56

0p

F

R7

06

80

R

R7

1

7K

5

S1

4

R8

61

0K

R7

4

22

K

C1

11

1µ

F

R8

4

10

K

C1

12

2.2

µF

R7

84

7R

C1

14

1N

F

+

C1

18

10

V2

20

µF

R7

71

50

R

C1

15

1µ

F

J2

0

3.5

PH

ON

EJA

CK

ST

ER

EO

213 4

C1

07

27

0p

F

R7

61

50

R

R7

36

80

R

C1

21

1N

F

R6

71

5K


6106A–ATARM–09/04

Schematics

Figure 5-9. DAA

88

77

66

55

44

33

22

11

DD

CC

BB

AA

3V

33V

3

3V

3

SI3

04

4_

AO

UT

SI3

04

4_

MC

LK

SI3

04

4_

FS

YN

C

SI3

04

4_

SC

LK

SI3

04

4_

RG

DT

SI3

04

4_

OF

HK

SI3

04

4_

SD

O

SI3

04

4_

SD

I

SI3

04

4_

NR

ST

IND

Da

te:

ST

UD

IEL

1027, A

v d

u d

octe

ur LE

FE

BV

RE

06271 V

ILLE

NE

UV

E L

OU

BE

T

Tél: 0

4 9

2 0

2 4

5 4

5 F

ax: 0

4 9

2 0

2 4

5 4

6

MO

DIF

.D

ES

S.

Da

te:

VE

RIF

.

Ech:

1/1

CL

TY

PE

NU

ME

RO

IND

PA

GE

FT

Th

is a

gre

em

en

t is o

ur p

ro

pe

rty

. Re

pro

du

ctio

n a

nd

pu

blic

atio

n w

itho

ut o

ur w

ritte

n a

uth

oriz

atio

n s

ha

ll exp

ose

offe

nd

er to

leg

al p

roce

ed

ing

s.

ED

T O

RG

A

78

Tu

esd

ay, J

un

e 2

4, 2

00

3

63SC020423B

DA

A

3

JP

G0

7/0

2/0

2

AT

91R

M3400-D

K

AT

ME

L

24

/06

/03

24

/06

/03

JP

GB

JM

D

NO

GR

OU

ND

PLA

NE

IN

DA

A S

EC

TIO

N

PO

LYSW

ITCH

NOTE : VA supply, use

internal charge pump

PH

ON

E L

IN

E

C1

38

10

0N

F

R8

7

5K

36

1%

R9

9

5K

36

1%

R9

22K

2

R1

00

5K

36

1%

C1

44

1N

F

3K

V

C1

42

10

NF

25

0V

R8

8

5K

36

1%

R9

31

0R

CR

19

BZ

V5

5-C

43

C1

46

15

0P

F3K

V

S2

3

L5

74

27

92

04

1

F3

0.1

3A

25

0V

R9

41

0R

S2

4

C1

29

10

0N

F

S2

9

C1

40

3.9

NF

C1

34

10

NF

C1

41

1N

F

3K

V

C1

45

56

0P

F6

00

V

+

C1

31

50

V0

.1u

F

MN

19

SI3

01

5

QE

21

FIL

T2

16

IGN

D3

C1

B4

RN

G1

5

FIL

T1

5

RE

F1

1

VR

EG

21

0

RE

XT

21

2

VR

EG

9Q

E8

RE

XT

13

QB

7

RX

14

DC

T2

RN

G2

6

CR

17

BA

V99

1

3

2

+

C1

302

0V

1u

F

R1

02

40

2R

1%

CR

20

BA

V99

1

3

2

C1

39

56

0P

F6

00

V

Q7

MM

BT

A42

C1

26

10

V

10

uF

C1

27

10

0N

F

R9

1

10

0K

R1

12

10

K

C1

28

10

0N

F

R1

05

10M

R9

6

9K

31

1%

R8

9

5K

36

1%

C1

37

10

0N

F

R1

01

21

5R

1%

L4

74

27

92

04

1

C1

43

3.9

NF

J2

1

RJ1

2

1 2 3 4 5 6

+-

CR

22

MB

4S

12

4 3

MN

18

SI3

02

1

MC

LK

1O

FH

K1

6

SC

LK

3

VD

4

SD

O5

RG

DT

/FS

D1

5

C1

A1

1

M1

10

GN

D1

2

AO

UT

9R

ES

ET

8

VA

13

FC

/RG

DT

7

M0

14

FS

YN

C2

SD

I6

S2

6

R9

0

15

0R

C1

33

10

0N

F

Q9

MM

BT

A42

R1

03

56

K

C1

35

1.8

NF

S2

5

R1

04

10M

Q6

BC

P5

6T

1

CR

18

BZ

V5

5-C

5V

6

CR

23

27

0V

S2

7

+

C1

36

20

V

0.6

8u

F

Q8

MM

BT

A92

CR

21

BZ

V5

5-C

5V

6

R9

8

5K

36

1%

R1

06

56

K

R9

51

20

K

12

R9

7

78

R7

1%

C1

32

15

0P

F3K

V


6106A–ATARM–09/04

Schematics

Figure 5-10. Diagram

88

77

66

55

44

33

22

11

DD

CC

BB

AA

IND

Da

te:

ST

UD

IEL

1027, A

v d

u d

octe

ur LE

FE

BV

RE

06271 V

ILLE

NE

UV

E L

OU

BE

T

Tél: 0

4 9

2 0

2 4

5 4

5 F

ax: 0

4 9

2 0

2 4

5 4

6

MO

DIF

.D

ES

S.

Da

te:

VE

RIF

.

Ech:

1/1

CL

TY

PE

NU

ME

RO

IND

PA

GE

FT

Th

is a

gre

em

en

t is o

ur p

ro

pe

rty

. Re

pro

du

ctio

n a

nd

pu

blic

atio

n w

itho

ut o

ur w

ritte

n a

uth

oriz

atio

n s

ha

ll exp

ose

offe

nd

er to

leg

al p

roce

ed

ing

s.

ED

T O

RG

A

88

Tu

esd

ay, J

un

e 2

4, 2

00

3

63SC020423B

DIA

GR

AM

3

JP

G0

7/0

2/0

2

AT

91R

M3400-D

K

AT

ME

L

24

/06

/03

24

/06

/03

JP

GB

JM

D

AT91R

M3400

PIO EXP.

CONNECTORS

IC

E/JTA

G

GR

APH

IC

DISPLA

Y

PB16..P

B23

F1

F2

F3

F4

SER

IA

L D

EV

IC

ES

SERIAL

EEPROM

SERIAL

DATAFLASH

SPI

TWI

ADC

CONVERTER

PLL

RE

SET

4.6

08 M

Hz

32.7

68 K

Hz

ADC_IRQ - PB26

NPCS0

TEMP. SENSOR

RDY/BSY-PB27

LED

- PA20

BUZZER

- PB9

SER

IA

L I

NTER

FA

CES

SMART CARD

READER

ISO7816-PA9,PA11..PA13

7816_IR

Q - P

B25

SD/MMC

CARD

PA24..PA29, PB14

IrDA

TRANCEIVERPA22, PA23

I2S A

NA

LO

G

FR

ON

T E

ND

I2S

NRST

LINE OUT

DA

AAO

UT

RJ12

TIP

RING

PH

ONE L

INE

PB0..P

B5, P

B15

DM - DP

PA10,PA21

USB

DEVICE

RS232 SERIAL

PORTS

SERIAL DEBUGCOM PORT

TXD

-RXD

TXD

-RXD

,

RTS-CTS

PA30,PA31PA14..PA17

PO

WER

SU

PPLY

7V..1

0V D

C IN

PU

T

LI-IO

N

3V3

1V8

SW

ITCH

ING

REG

ULATO

R

LIN

EAR

REG

ULATO

R

LI-IO

N C

HARG

ER

VCO

RE

SH

UN

T M

EASU

RE

VD

D P

LL - V

DD

OSC

0V..5

V U

SER I

NPU

T

VBAT

0V..5

VVBAT I

NPU

T

0V..1

5V V

IN IN

PU

T

VIN

VDD

BATTERY

LC

D &

KEYB

OA

RD

*#

0

12

3

45

6

78

9

NRST

SPI

NRST

AFF_RS

AFF_CS

NRST

ADC_CS

PB6..P

B8

NRST

G1

NPCS0

NPCS2

NPCS3

AB

G1 G

2 C

Y0

Y1

Y2

Y3

AFF_CS

AD

C_CS

DFC_CS

EXT_CS

SPI D

ECO

DE

NPCS1

AFF_RS

NPCS0

PA0..P

A2

PA7,P

A8


6106A–ATARM–09/04

Schematics


6106A–ATARM–09/04

Printed on recycled paper.

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6106A–ATARM–09/04 0M

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Documents

AT91RM3400 Development Kit - application-notes.digchip.comapplication-notes.digchip.com/015/15-16237.pdf · AT91RM3400 Development Kit User Guide 1-1 Rev. 6106A–ATARM–09/04 Section