BWS electronics design status

25.06.2015J.Emery

&Luca, Pierre-Jean, Emiliano, Jose, Alexander

and all past contributors!

Secondary particles shower acquisition

Scanner control, monitoring and supplies“Intelligent drive”

Acquisition and supervision

CPU

T IMING

BST receiver

Future Scanner Control and Acquisition System

Fast integration secondary

shower

SFP Ethernet

SFP Optical link

SFP Optical link

Long range resolver interface

3-phases PWMMagnetic stopper

External temperature and vibration

Wire resistivity & Strain gaugeHV

CTRL

Optical encoder interface

Optical encoder interface

Scanner Control, Monitoring and Supplies

‘Intelligent drive’

CPU

CTRV

I

BMS

BOBR

BWS SPS PROTOTYPE SETUP 2015

Front-EndFast

integration (IGLOO2 BASED)

Optical encoder interface

Wire resistivity

3-phases PWM

Long range resolver interface

Ethernet TCP/IP

Feedback, positions profiles, optimisation

Prototyping, Calibration,First measures into LDB

Start scan trigger

HV power supply

Back-end GBT receiver(IGLOO2 BASED)

Acquisition synchronisation

COMAcquisition trigger

Intelligent drivePower crate integration

3 phases power driverMotor and control

connectors

Custom crate

Voltages supply

measures board design on-going

Electronics Hardware deliverable Description Delivery Status Task

scompletedOpen tasks Identified

issues

FMC interface to scanner

May On-going

Interfaces (MM + PJL)

Debug PCB + measures

several changes on the PCB (JE)

SPS surface setup July 0% Order VME crate

rackspace

Motor Drive box August On-going

70%Mechanics &

electrical

PCB design(15 June 2015)

Controller box September 0%

Filter box September 20% PCB design commun with

Drive box, filter investigation

Filter size and weight

SPS surface installation

October 0% rackspace

Intelligent driveActuator control interface

FPGA boardFirmware development

platform

Custom interface boardScanner actuator control

and measurements

Firmware deliverableDescription Delivery Status Tasks completed Open tasks Identified

issues

Motor interfaceCurrent-Resolver

May On-going 80%Current interfacesResolver interface

PWM interface

debug Resolver measure stability

Feedback June On-going 60% Debug &Final testing

Speed computation &

codeoptimisation

HPS Ethernet tools for debug

June On-going 70% Continuous logging data

Acq speed limit

Movement sequencerand trigger

July 20%

Data logger (SDRAM) September 50% Data organisation

Optical sensor Interfacefast ADC

October 0%

Safe FPGA-HPS boot October 0%

Wire Interface November 0%

System level deliverable 2015Description Delivery Status Tasks completed Open tasks Identified issues

Lab scanner: Qualifications with DSpace

April Almost done

Tune of controller + measures

Qualification procedure/report

Glass disk brokenRotos – sharft

fixationStator resolver

fixation

Prototype 2:Qualifications with DSpace

MayJuly?

Waiting:proto 2

- Tune of controller + measures + report

Prototype 2:Calibration with DSpace

JuneSeptember?

Waiting:Cal.

Bench proto 2

Dspace system 100%Labview software 80%

Select/ordering optical componants +

mechanical mounting. comissioning

Lab scanner:Qualifications with SCMS

July-August Firmware started Complete SCMS

Prototype 2:Qualifications with SCMS

September Firmware started Complete SCMS

Prototype 2:Calibration with SCMS

October Labview software 80% Complete SCMS

Prototype 1 (SPS):Tests with SCMS

November Install SCMS

Prototype 1 (SPS):Qualifications with beam

December Install SCMS + ACQ

Summary

• Electronics prototyping on-going to be ready for first beam test at the end of run 2015

• More details will be given during next TB on the 2nd of July

• Good laboratory setup for electronics and software design

• Prototype 2 needed to develop the calibration bench and evaluating the accuracy of the system

BWSElectronics rack