62
COMPUTER ORGANIZATION CSNB123 CHAPTER 2 COMPUTER EVOLUTION CSNB123 COMPUTER ORGANIZATION Ver.1 Systems and Networking 1

CHAPTER 2 COMPUTER EVOLUTION

  • Upload
    dustin

  • View
    65

  • Download
    1

Embed Size (px)

DESCRIPTION

CHAPTER 2 COMPUTER EVOLUTION. CSNB123 coMPUTER oRGANIZATION. Evolution. First Generation. Second Generation. ENIAC. E lectronic N umerical I ntegrator A nd C omputer Eckert and Mauchly University of Pennsylvania Trajectory tables for weapons Started 1943 Finished 1946 - PowerPoint PPT Presentation

Citation preview

Page 1: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 1

CHAPTER 2COMPUTER EVOLUTIONCSNB123 COMPUTER ORGANIZATION

Ver.1

Page 2: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 2

Second Generation

First Generation

Evolution

Ver.1

Transistors Scale Integration

ENIACVon

Neumann Machine

UNIVAC IBM

Page 3: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 3Ver.1

ENIAC

Von Neumann /

Turing Machine

UNIVAC IBM

Page 4: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 4

ENIAC• Electronic Numerical Integrator And Computer• Eckert and Mauchly• University of Pennsylvania• Trajectory tables for weapons • Started 1943• Finished 1946

Too late for war effort• Used until 1955Ver.1

Page 5: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 5

ENIAC (2)• Decimal (not binary)• 20 accumulators of 10 digits• Programmed manually by switches• 18,000 vacuum tubes• 30 tons• 15,000 square feet• 140 kW power consumption• 5,000 additions per secondVer.1

Page 6: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 6Ver.1

ENIAC

Von Neumann /

Turing Machine

UNIVAC IBM

Page 7: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 7

Von Neumann / Turing Machine• Stored Program concept

Main memory storing programs and data ALU operating on binary data Control unit interpreting instructions from

memory and executing• Input and output equipment operated by

control unit

Ver.1

Page 8: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 8

Von Neumann / Turing Machine - Example

Ver.1

http://www.arcadefire.com/wp/wp-content/uploads/2010/10/turing11.jpg

Page 9: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 9

Von Neumann Machine - Structure

Ver.1

Main Memory (M)

I/O Equipment (I,O)

Central Processing Unit (CPU)

Arithmetic Logic Unit (CA)

Program Control Unit (CC)

Page 10: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 10

Von Neumann / Turing Machine (2)• Princeton Institute for Advanced Studies

IAS• Completed 1952

Ver.1

Page 11: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 11

IAS• 1000 x 40 bit words

Binary number 2 x 20 bit instructions

• Set of registers (storage in CPU) Memory Buffer Register Memory Address Register Instruction Register Instruction Buffer Register Program Counter Accumulator Multiplier Quotient

Ver.1

Page 12: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 12

IAS – Structure

Ver.1

I/O Equipment (I,O)

Main Memory (M)

Arithmetic-logic Unit (ALU)

AC MQ

Arithmetic-logic Circuits

MBR

Program Control Unit

IBR PC

Control Circuits

IR MAR

Control Signals

Page 13: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 13

IAS Computer - Example

Ver.1

http://www.comsci.us/history/images/ias.jpg

Page 14: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 14Ver.1

ENIAC

Von Neumann /

Turing Machine

UNIVAC IBM

Page 15: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 15

Universal Automatic Computer (UNIVAC)

1947UNIVAC IEckert-Mauchly Computer Corporation

Late 1950UNIVAC IIPart of Sperry-Rand CorporationFaster & more memory

Ver.1

Page 16: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 16

UNIVAC - Example

Ver.1

http://archive.computerhistory.org/resources/still-image/UNIVAC/Univac_1.charles_collingwood.1952.102645279.lg.jpg

Page 17: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 17Ver.1

ENIAC

Von Neumann /

Turing Machine

UNIVAC IBM

Page 18: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 18

IBM

1953The 701IBM 1st stored program computerScientific Calculations

1955The 702Business Applications

700/7000 series

Ver.1

Page 19: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 19

IBM 701

Ver.1

http://www-03.ibm.com/ibm/history/exhibits/701/images/141511_Large.jpg

Page 20: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 20

IBM 702

Ver.1

http://www.ed-thelen.org/comp-hist/BRL61-0396.jpg

Page 21: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 21

IBM 700/7000

Ver.1

https://upload.wikimedia.org/wikipedia/commons/thumb/b/b9/NASAComputerRoom7090.NARA.jpg/280px-NASAComputerRoom7090.NARA.jpg

Page 22: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 22

Second Generation Machine

Ver.1

Page 23: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 23

Transistors• Made from Silicon (Sand)• Invented 1947 at Bell Labs• William Shockley et al.• Replaced vacuum tubes• Solid State device

Ver.1

Page 24: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 24

Advantages of Transistors• Smaller• Cheaper• Less heat dissipation

Ver.1

Page 25: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 25

Transistors Based Computers• Second generation machines• NCR & RCA produced small transistor

machines• IBM 7000• DEC - 1957

Produced PDP-1

Ver.1

Page 26: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 26

Microelectronics• Literally - “small electronics”• A computer is made up of gates, memory cells

and interconnections• These can be manufactured on a

semiconductor

Ver.1

Page 27: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 27

Overall Generations of Computer

Ver.1

1946 -1957

1958 -1964

1965 1971 1971 -1977

1978 -1991

1991

Vacuum tube

Transistor Small scale integration

Medium scale integration

Large scale integration

Very large scale integration

Ultra large scale integration

Page 28: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 28

Moore’s Law

Ver.1

Number of transistors on a chip will double every year

Page 29: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 29

Moore’s Law (2)• Gordon Moore – co-founder of Intel• Increased density of components on chip• Since 1970’s development has slowed a little

Number of transistors doubles every 18 months

Ver.1

Page 30: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 30

Moore’s Law (3)• Cost of a chip has remained almost unchanged• Higher packing density means shorter

electrical paths, giving higher performance• Smaller size gives increased flexibility• Reduced power and cooling requirements• Fewer interconnections increases reliability

Ver.1

Page 31: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 31

Growth in CPU Transistor Count

Ver.1

Page 32: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 32

IBM 360 series• 1964• Replaced (& not compatible with) 7000 series• First planned “family” of computers

Similar or identical instruction sets Similar or identical O/S Increasing speed Increasing number of I/O ports (i.e. more terminals) Increased memory size Increased cost

• Multiplexed switch structure

Ver.1

Page 33: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 33

DEC PDP-8• 1964• First minicomputer (after miniskirt!)• Did not need air conditioned room• Small enough to sit on a lab bench• $16,000

$100k+ for IBM 360• Embedded applications & OEM• Bus StructureVer.1

Page 34: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 34

DEC PDP-8 – Bus Structure

Ver.1

Page 35: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 35

Semiconductor Memory• 1970• Fairchild• Size of a single core

i.e. 1 bit of magnetic core storage• Holds 256 bits• Non-destructive read• Much faster than core• Capacity approximately doubles each yearVer.1

Page 36: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 36

Intel

Ver.1

Year Computer Name

Description

1971 4004 • First microprocessor• All CPU components on a single

chip• 4 bit

1972 8008 • 8 bit• Both designed for specific

applications1974 8080 • Intel’s first general purpose

microprocessor

Page 37: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 37

Speed Up• Pipelining• On board cache• On board L1 & L2 cache• Branch prediction• Data flow analysis• Speculative execution

Ver.1

Page 38: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 38

Performance Balance• Processor speed increased• Memory capacity increased• Memory speed lags behind processor speed

Ver.1

Page 39: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 39

Logic and Memory Performance Gap

Ver.1

Page 40: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 40

Logic and Memory Performance Gap - Solutions

• Increase number of bits retrieved at one time Make DRAM “wider” rather than “deeper”

• Change DRAM interface Cache

• Reduce frequency of memory access More complex cache and cache on chip

• Increase interconnection bandwidth High speed buses Hierarchy of buses

Ver.1

Page 41: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 41

I/O Devices• Peripherals with intensive I/O demands• Large data throughput demands• Processors can handle this• Problem moving data

Ver.1

Page 42: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 42

I/O Devices - Solutions• Caching• Buffering• Higher-speed interconnection buses• More elaborate bus structures• Multiple-processor configurations

Ver.1

Page 43: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 43

Typical I/O Device Data Rates

Ver.1

Page 44: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 44

Key is Balance• Processor components• Main memory• I/O devices• Interconnection structures

Ver.1

Page 45: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 45

Improvements in Chip Organization and Architecture

• Increase hardware speed of processor Fundamentally due to shrinking logic gate size• More gates, packed more tightly, increasing clock rate• Propagation time for signals reduced

• Increase size and speed of caches Dedicating part of processor chip • Cache access times drop significantly

Ver.1

Page 46: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 46

Improvements in Chip Organization and Architecture (2)

• Change processor organization and architecture Increase effective speed of execution Parallelism

Ver.1

Page 47: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 47

Problems with Clock Speed and Login Density

• Power Power density increases with density of logic and clock speed Dissipating heat

• RC delay Speed at which electrons flow limited by resistance and

capacitance of metal wires connecting them Delay increases as RC product increases Wire interconnects thinner, increasing resistance Wires closer together, increasing capacitance

• Memory latency Memory speeds lag processor speeds

Ver.1

Page 48: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 48

Problems with Clock Speed and Login Density - Solution

• More emphasis on organizational and architectural approaches

Ver.1

Page 49: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 49

Intel Microprocessor Performance

Ver.1

Page 50: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 50

Increased Cache Capacity• Typically two or three levels of cache between

processor and main memory• Chip density increased

More cache memory on chip• Faster cache access

• Pentium chip devoted about 10% of chip area to cache

• Pentium 4 devotes about 50%

Ver.1

Page 51: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 51

More Complex Execution Logic• Enable parallel execution of instructions• Pipeline works like assembly line

Different stages of execution of different instructions at same time along pipeline

• Superscalar allows multiple pipelines within single processor Instructions that do not depend on one another

can be executed in parallel

Ver.1

Page 52: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 52

Diminishing Returns• Internal organization of processors complex

Can get a great deal of parallelism Further significant increases likely to be relatively

modest• Benefits from cache are reaching limit• Increasing clock rate runs into power

dissipation problem Some fundamental physical limits are being

reached

Ver.1

Page 53: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 53

New Approach – Multiple Cores• Multiple processors on single chip

Large shared cache• Within a processor, increase in performance

proportional to square root of increase in complexity

Ver.1

Page 54: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 54

New Approach – Multiple Cores (2)• If software can use multiple processors,

doubling number of processors almost doubles performance

• So, use two simpler processors on the chip rather than one more complex processor

Ver.1

Page 55: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 55

New Approach – Multiple Cores (3)• With two processors, larger caches are

justified Power consumption of memory logic less than

processing logic

Ver.1

Page 56: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 56

x86 Evolution

Ver.1

• x86 architecture dominant outside embedded systems

• Organization and technology changed dramatically• Instruction set architecture evolved with

backwards compatibility• ~1 instruction per month added• 500 instructions available• See Intel web pages for detailed information on

processors

Page 57: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 57

x86 Evolution (2)Version Description

8080 • first general purpose microprocessor• 8 bit data path• Used in first personal computer – Altair

8086 • 5MHz – 29,000 transistors• much more powerful• 16 bit • instruction cache, prefetch few instructions

8088 • (8 bit external bus) used in first IBM PC• 1Mb

80286 • 16 Mbyte memory addressable• up from 1Mb

80386 • 32 bit• Support for multitasking

80486 • sophisticated powerful cache and instruction pipelining• built in maths co-processor

Ver.1

Page 58: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 58

x86 - 8080

Ver.1

http://www.antiquetech.com/pictures%20full-size/C8080A.jpg

Page 59: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 59

x86 Evolution (3)Version Description

Pentium • Superscalar• Multiple instructions executed in parallel

Pentium Pro

• Increased superscalar organization• Aggressive register renaming• branch prediction• data flow analysis• speculative execution

Pentium II • MMX technology• graphics, video & audio processing

Pentium III • Additional floating point instructions for 3D graphics

Pentium 4 • Note Arabic rather than Roman numerals• Further floating point and multimedia

enhancements

Ver.1

Page 60: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 60

x86 - Pentium

Ver.1

http://www.notebookcheck.net/uploads/tx_nbc2/intel_pentium_e5700_03.jpg

Page 61: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 61

x86 Evolution (4)Version DescriptionCore • First x86 with dual coreCore 2 • 64 bit architectureCore 2 Quad • 3GHz – 820 million transistors

• Four processors on chip

Ver.1

Page 62: CHAPTER 2 COMPUTER EVOLUTION

COMPUTER ORGANIZATIONCSNB123

Systems and Networking 62

x86 – Core 2

Ver.1

http://www.starbaseonline.com/hardware/Core2Duo.jpg