Communication Systems Lab Manual(1)

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SRI RAMAKRISHNA INSTITUTE OF TECHNOLOGY

DEPARTMENT OF ECE

EC2307 – COMMUNICATION SYSTEMS LABORATORY

LAB MANUAL

(FOR III YEAR, V SEM –ECE STUDENTS)

Academic year 2013-2014

Student Name : _______________________ Class: III BE (ECE) - ___ Sec

Register No. : ________________________ Batch No. : _________________

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S.No.

Date Title of the ExperimentMarks

AwardedSignature

Amplitude modulation and Demodulation

Frequency Modulation and Demodulation

Pulse Modulation – PAM / PWM / PPM

Pulse Code Modulation

Delta Modulation, Adaptive Delta Modulation

Digital Modulation & Demodulation –ASK, PSK, QPSK, FSK (Hardware)

Digital Modulation & Demodulation –ASK, PSK, QPSK, FSK (simulation)

Designing, Assembling and Testing of Pre-Emphasis / De-emphasis Circuits

PLL and Frequency Synthesizer

Line Coding

Error Control Coding using MATLAB

Sampling & Time Division Multiplexing

Frequency Division Multiplexing

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UNIVERSITY SYLLABUS

EC2307 COMMUNICATION SYSTEMS LAB L T P C 0 0 3 2

LIST OF EXPERIMENTS

1. Amplitude modulation and Demodulation.

2. Frequency Modulation and Demodulation.

3. Pulse Modulation – PAM / PWM / PPM.

4. Pulse Code Modulation.

5. Delta Modulation, Adaptive Delta Modulation.

6. Digital Modulation & Demodulation – ASK, PSK, QPSK, FSK

(Hardware & MATLAB)

7. Designing, Assembling and Testing of Pre-Emphasis / De-emphasis Circuits.

8. PLL and Frequency Synthesizer

9. Line Coding.

10. Error Control Coding using MATLAB.

11. Sampling & Time Division Multiplexing.

12. Frequency Division Multiplexing.

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EXP. NO:

DATE:

AMPLITUDE MODULATION AND DEMODULATION

AIM:

To study the amplitude modulation and demodulation using VCT-03 and calculate modulation index for various modulating voltages.

APPARATUS REQUIRED:

VCT-03 kit, CRO, Patch chords, Power chords, CRO probes.

CIRCUIT DIAGRAM:

AMPLITUDE MODULATION:

R122k

RL

1.2kR21.2k

Re1.2k

Vcc

10v

Rc10k

Q1

BC107

C2

0.01u

1 2

C1

0.1u

1 2

Vc10kHz

3Vpp Vm

1kHz1Vpp

5

C1

10u

1 2

C0.01u

1

2

1N4001

R15.9k

AMPLITUDE DEMODULATION:

AM SIGNAL OUTPUT

TABULAR COLUMN:

S.NO SIGNAL AMPLITUDE (V) TIME (ms)

1.

2.

3.

4.

Modulating signal

Carrier signal

Modulated signal

Demodulated signal

Vm (p – p)Volts

E maxVolts

E minVolts

PracticalM= E max – E min E max + E min

%

TheoreticalM= A max – A min A max + A min

%

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MODEL GRAPH:MODULATING WAVE / MESSAGE SIGNAL

Vm

T(ms)

Amplitude(V)

CARRIER WAVEVc

MODULATED WAVE

Vmax

+Vmin

-Vmin T(msec)

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-Vmax

DEMODULATED WAVE

Amplitude (V)

T msec

THEORY:

Amplitude Modulation:

Amplitude Modulation is the type of modulation where the amplitude of the carrier signal

is varied in accordance with the information bearing signal or modulating signal. The envelope,

or boundary, of amplitude modulated signal embeds the information bearing signal. The total

power of the transmitted signal varies with the modulating signal, whereas the carrier power

remains constant. A nonlinear device is used to combine the carrier and the modulating signal to

generate an amplitude modulated signal. The output of the nonlinear device consists of discrete

upper & lower sidebands. The output of a nonlinear device does not vary in direct proportion

with the input. Amplitude modulation (AM) is a technique used in electronic communication,

most commonly for transmitting information via a radio carrier wave. AM works by varying the

strength of the transmitted signal in relation to the information being sent. For example, changes

in the signal strength can be used to reflect the sounds to be reproduced by a speaker, or to

specify the light intensity of television pixels.

Let the Carrier signal is given as Vc & the message signal is considered as Vm respectively.

Vc = Vc Sin ct

Vm = Vm Sin mt

The frequencies present in the AM wave are carrier frequency and the first pair of sideband

frequencies. There are two types of AM methods. They are,

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Transistor biased AM

Diode based AM

Transistor based AM circuit essentially uses a CE amplifier having a voltage gain of A. The

carrier signal is the input to the amplifier. The modulating signal is applied in the emitter

resistance circuit. The carrier is applied at the input of the amplifier & the modulating signal is

applied in the emitter resistance circuit. The amplifier circuit amplifies the carrier by the factor

A. The modulating signal is the part of the biasing circuit, it produces low frequency variations

in the emitter circuit, which in turn causes variation in A. The result is that the amplitude of the

carrier varies in accordance with the strength of the signal. Consequently the amplitude

modulated signal is obtained across LC. It is noted that the carrier should not influence the

voltage gain A, only the modulating signal should do this to achieve this objective, carrier should

have a small magnitude and signal should have larger magnitude.

The Diode based AM employs solid state devices. It is composed of video signal

modulated with carrier frequency using low level amplitude modulation. The output of the

carrier is varied with frequency. In this, a carrier signal is given at two junctions of the bridge. A

modulated signal is given with same input voltage at two other ends. The final output is obtained

at two ends and a resistor is connected in the unit before the output is obtained.

Amplitude Demodulation:

Demodulation is the act of extracting the original information – bearing signal from a

modulated carrier wave. A demodulator is an electronic circuit used to recover the information

content from the modulated carrier wave. The amplitude demodulation refers to any method of

modulating an electromagnetic carrier frequency by varying its amplitude in accordance with the

message intelligence that is to be transmitted. It is the reverse process of AM modulation.

Usually the AM demodulation is done by using envelope detector or peak detector or diode

detector. Because a diode is a non-linear device, non-linear mixing takes place in D1 when two

or more signals are applied to its input. The difference between AM modulator & demodulator is

the output of the modulator is tuned to some frequencies whereas the output of the demodulator

is tuned to different frequencies. The diode detects the peak of the input envelope or a shape

because it detects the shape because it detects the shape of the input envelope. The diode detects

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the positive peak of the input AM signal and the low pass filter will filter the high frequency

carrier therefore the original modulating signal of same frequency but not the same amplitude

can be obtained.

PROCEDURE: (modulator)

1. The connections are made as per the circuit diagram (fig 1).2. The power supply is given to the collector of transistor.3. The carrier signal VC at 1MHz and 2 Vpp is given to the base of the amplifier. The

carrier signal gets amplified.4. The modulating signal Vm at 1KHz & 0.5 Vpp is given to the emitter of the transistor.5. The amplitude modulated output is taken at the collector of the circuit.6. By varying the amplitude of modulating signal corresponding Emax and Emin are noted and

tabulated.7. The practical modulation index is calculated and compared with theoretical value.

PROCEDURE: (demodulator)

1. The Connections are made with OA79 or 1N4007 as shown in circuit diagram.2. The amplitude modulated signal from the AM generator is fed into the circuit.3. The demodulated output is measured through the CRO.4. For various values of AM signal frequency, corresponding demodulated voltage and

frequencies are noted and readings are tabulated.

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RESULT:

The amplitude modulation and demodulation circuit has been designed and its modulation index has been calculated for various modulating voltages and compared with theoretical values.

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EXP. NO.:

DATE:

FREQUENCY MODULATION AND DEMODULATION

AIM:

To study the factors about frequency, modulating and demodulating using ST2203 trainer kit.

APPARATUS REQUIRED:

VCT - 11, CRO, Patch chords, Power chords, CRO probes.

THEORY:

There are essentially two basic methods of generating frequency modulated signals,

namely, direct method and indirect method. In direct method the carrier frequency is directly

varied in accordance with the input base band signal, which is readily accomplished using a

voltage controlled oscillator. In the indirect method, the modulating signal is first used to

produce a narrowband FM signal, and frequency multiplication is next used to increase the

frequency deviation to the desired level. The indirect method is the preferred choice for

frequency modulation when the stability of carrier frequency is of major concern as in

commercial radio broad casting.

Frequency Modulator

In this section a function generator IC XR 2206 is used. In essence the deviation sensitivity of

voltage controlled oscillator is the transfer function of the modulator (i.e its output frequency

versus input voltage characteristics)., The input to voltage controlled oscillator is a control

voltage and the output is a frequency. Therefore the deviation sensitivity for a VCO FM

modulator is a change in output frequency to change in input voltage. The deviation of a VCO is

its voltage to frequency converter ratio. In real, the frequency of oscillation for the XR 2206

function generator is controlled by its input current however the input current can be controlled

by an external control voltage. The frequency of oscillation for the FM modulator varies

inversely with the polarity of the control voltage.

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FM Demodulator

FM demodulation can be accomplished quite simply with a phase locked loop (PLL). The

Operation of a PLL FM demodulator requires no tuned circuits and automatically compensates

for changes in the carrier frequency due to instability in the transmit oscillator. The basic phase

locked loop circuit consists of four primary blocks a phase comparator (mixer), a low pass filter,

amplifier and a voltage controlled oscillator (VCO). With no external input signal, the output

voltage, Vout is equal to zero. The VCO operates at a set frequency called its natural or free

running frequency (fn), which is set by external resistor (Rt) and capacitor (Ct). If an input signal

is applied to the system, the phase comparator compares the phase and frequency of the input

signal with the VCO natural frequency and generates an error voltage Vd (t), that is related to the

phase and frequency difference between the two signals. This error voltage is then filtered,

amplified and applied to the input terminal of the VCO. If the input frequency fi is sufficiently

close to the VCO natural frequency, fn the feedback nature of the LL causes the VCO to

synchronize or lock, to the incoming signal. After frequency lock had occurred the VCO would

track frequency changes in the input signal by maintaining a phase error at the input of the phase

comparator. Therefore if the PLL input is a deviated FM signal and the VCO nature. Frequency

If the PLL input is a deviated FM signal and the VCO nature frequency is equal to the If center

frequency, the correction voltage produced at the output of the phase comparator and fed back to

the input of the VCO is proportional to the frequency deviation and is thus the demodulated

information signal.

PROCEDURE:

1. Ensure that the initial conditions are made in the kit.2. Turn the audio oscillator amplitude present to its maximum position. This is audio

frequency sine wave used as modulating signal.3. Connect the output socket of audio oscillator block to the input socket of the modulator

circuit block.4. Set the selector switch to varactor position.5. Measure the output form MIXER/AMPLIFIER block.6. Connect the FM output to the input of the amplitude limiter.7. Connect the output of amplitude limiter to the input of quadrature detector.8. Connect the output of quadrature detector to the input of the low pass filter block.9. Measure the output from the low pass filter. This is the demodulated message signal.

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CONNECTION DIAGRAM:

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MODEL GRAPH:

DEMODULATED WAVE:

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TABULATION:

S.NO SIGNAL AMPLITUDE (V) TIME (ms)

1.

2.

3.

4.

Modulating signal

Carrier signal

Modulated signal

Demodulated signal

RESULT:The frequency modulation circuit has been designed and its modulation index was

calculated for various modulating voltages and compared with theoretical values.

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EXP. NO.:

DATE:

PULSE MODULATION – PAM / PWM / PPM

AIM:

To study the various pulse modulation techniques and to draw the waveforms.

APPARATUS REQUIRED:

Pulse modulation trainer kit, CRO, Patch and power chords, CRO probes.

THEORY:

In the pulse modulation techniques the amplitude of the modulating signal modulates some parameters of the pulse train. These parameters are amplitude, width and position.

PULSE AMPLITUDE MODULATION:Pulse amplitude modulation is defined as an analog modulation technique in which the

signal is sampled at regular intervals such that each sample is proportional to the amplitude of the signal, at the instant of sampling.PULSE WIDTH MODULATION:

PWM is also called as PDM/pulse division modulation. Pulse width modulation is defined as an analog modulation technique in which the width of each pulse is made proportional to the instantaneous amplitude of the signal at the sampling instant.PULSE POSITION MODULATION:

Pulse position modulation is defined as an analog modulation technique in which the signal is sampled at regular intervals such that the shift in position of each sample is proportional to the instantaneous value of the signal at the sampling instant.

PROCEDURE:

PAM: Connect the circuit as in the given block diagram. Connect the 16 kHz pulse output from the square pulse block to pulse 1N of pulse

amplitude modulator and sine wave from the function generator block to MOD sign of the pulse amplitude modulator.

Observe the “natural frequency” output from sample output and flat top sampling from output tabulation is drawn.

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CONNECTION DIAGRAM

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PWM: Connect the circuit as in the given block diagram. Connect the 16 kHz square pulse output from the square pulse block to pulse in width

modulator and sine wave from the function generator block to MOD sign of the pulse width modulator.


PPM: Connect the circuit as in the given block diagram. Connect the 16 kHz square pulse output from the square pulse block to pulse in width

modulator and sine wave from the function generator block to MOD sign of the pulse position modulator.


MODEL GRAPH: (a) PAM

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TABULATION: PAM

PARAMETRES MODULATION DEMODULATION

INPUT SINEWAVE

PULSE INPUT PAM OUTPUT

OUTPUT SINE WAVE

MODEL GRAPH: (b) PPM

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TABULATION: PPM


INPUT SINEWAVE

PULSE INPUT PPM OUTPUT

OUTPUT SINE WAVE

MODEL GRAPH: (c) PWM

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TABULATION: PWM


INPUT SINEWAVE

PULSE INPUT PWM OUTPUT

OUTPUT SINE WAVE

RESULT:

Thus the pulse modulation techniques (PAM, PWM and PPM) have been studied and their waveforms have been plotted.

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EXP. NO.:

DATE:

PULSE CODE MODULATION

AIM:

To study the pulse code modulation and demodulation techniques using ST2103 trainer kit.

APPARATUS REQUIRED:

ST 2103 Trainer Kit, CRO, Patch Chords, Power Chords, CRO Probes

THEORY:

Pulse Code Modulation:Pulse code modulation is a technique, where the samples are transmitted as coded words

of finite bit length. In pulse code modulation, first the samples are quantized and then encoded before transmitting as a serial bit stream. “Quantizing” is the process where the samples are made to assume one of the finite sets of the discrete levels.

Here first the whole signal level is divided into a fixed number of discrete levels. The samples are round off to nearest discrete level. Then the corresponding to the level chosen, a code word is assigned to the sample. The parallel data word available after the analog to digital conversion is covered to a serial data stream after coding and sent through the channel. This coded data stream is said to be a PCM coded data and is transmitted serially.Pulse Code Demodulation:

For recovering the data from the several data stream, first the serial data is converted to a parallel finite bit length code word. The functional block that performs this false of accepting sequence of binary digits and generating appropriate sequence of levels is called “ digital to analog converter” D/A converter is filtered to recover back the base band signal.

PROCEDURE:

Initial set up for trainer ST2103:

Mode Switch Position: FAST positionFunction generator setting: DC l & DC 2 amplitude controls: fully clockwise direction.1 KHz & 2 KHz signal levels: 10 V peak -peak.Pseudo random sync code generator switch: OFF positionError check code selector switches A & B: A = 0 & B =0 Position ('Off' Mode).All switched faults: OFF position.

i. Connections are made as per the diagram.

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ii. With the help of digital voltmeter / oscilloscope, adjust the DC l amplitude control until the

DC 1 output measures 0V: The accuracy should be within +/-20mV. Turn the DC 2

amplitude control, fully counter clockwise.

iii. Observe the output on the A/D converter block LEDs (D0 to D6).

iv. Adjust the DC1 amplitude control clockwise to increase the amplitude & anticlockwise to

decrease it. Try varying the DC input from + 5V to - 5V in steps of 1V.

v. Turn the DC 1 control fully anti-clockwise and repeat the above procedure by varying DC 2

control. Check that the digital code for the set voltage value is identical to that of the DC 1

setting.

vi. Switch 'Off' the trainer. Disconnect the DC 1 & DC 2 supply from CH 0 & CH1.

vii. Connect ~1 KHz signal to CH 0 & 2 KHz signal to CH 1 input as shown in figure 2.

viii. Trigger the dual trace oscilloscope externally by the CH 1 signal available at TP12. Observe

the signal at CH 0 & CH 1 sample output (TP5) with reference to the SC Signal (TP7) on the

second trace. Give a special attention to the phase relation between the two signals.

ix. Now connect the oscilloscope channel 1 to CH 1 sample (TP6) sketch the three Waveforms

with utmost importance to the relationship between the three waveforms.

x. Connect oscilloscope channel 1 input to SC test points (TP7) & oscilloscope channel 2 inputs

to EC test point (TP8).

xi. Observe the phase relation between the two SC & EC test point. Notice that EC goes high at

the end of conversion & remains latched until next SC Pulse.

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CONNECTION DIAGRAM - PCM:

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MODEL GRAPH:

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TABULATION:

Modulating Signal

PCM (Hex)

Demodulated signal

Amplitude

(Volts)

Time

(ms)

Amplitude

(Volts)

Time

(ms)

RESULT:Thus the Pulse Code Modulation has been studied and their waveforms have been

plotted.

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EXP. NO.:

DATE:

DELTA MODULATION, ADAPTIVE DELTA MODULATION

AIM: a) To study Delta Modulation and Demodulation.b) To study Adaptive Delta Modulation and demodulation.

APPARATUS REQUIRED: ST2105 Trainer Kit, CRO, Patch Chords, Power Chords, CRO Probes, Dynamic mic and loud speaker

THEORY:

Delta modulation is a one - bit version of differential pulse code modulation, it provides

staircase approximation for the given input baseband signal. The difference between the input

and staircase approximation is quantized into two levels called, ± . A comparator senses

whether or not the instantaneous level of the analog input signal is greater or less than the

feedback signal (staircase approximation). The comparator output is clocked by a flip flop to

form a continuous NRZ digital data stream. This digital data is converted back to analog

staircase signal using DAC and feed to the comparator. The feedback signal never stands still; it

always travels up or down by a fixed amount (± ) in any clock period. Because of its fixed

feedback output slope, the linear delta modulator is less than ideal for encoding human voice,

also the accumulator (or) feedback section cannot track large, high frequency signals with its

fixed slope.

The delta demodulator is a simple one which have only feedback system of delta

modulator and a low-pass filter. The demodulator recovers staircase approximation from the

encoded signal and which will be smoothened by a low pass filter to get back original analog

information.

PROCEDURE – DELTA MODULATION:

i. Connect the test points P1 to P7, P3 to P11 and P10 to P23 using patch chords.

ii. Ensure that all switches in switched faults block in OFF position and all potentiometers

POT1, POT2 & POT3 in minimum position.

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iii. Display the modulating signal at test point P1 using a probe on channel 1 of oscilloscope.

Increase sine wave amplitude by rotating POT 1 in clockwise direction and set sinewave

amplitude to 3Vpp and note down.

iv. Display the clock signal at test point P3 on channel 2 of oscilloscope and note down the

waveform. Replace the channel2 by digital-to-analog converter waveform (test point P8)

and note down staircase waveform with respect to the modulating signal.

v. Now replace the channel 1 waveform by the delta modulated waveform (test point P10)

and note down the modulated waveform with respect to the staircase signal.

vi. Plot all the noted waveforms such as modulating signal, clock, staircase and modulated

signal on a linear graph sheet.

vii. Display the modulated waveform (P23) on channel 1 and demodulated staircase

waveform (P34) on channel 2 of oscilloscope, increase gain control potentiometer POT 3

and set staircase signal amplitude to 3Vpp, note down waveforms.

viii. Display the demodulated signal (test point P38) on channel 1 of oscilloscope and note

down. Plot all the noted waveforms such as modulated signal, staircase waveform and

demodulated signal on a linear graph sheet.

ix. Repeat the above procedure for the variable clock frequencies of 32KHz and 128KHz.

MODEL GRAPH:

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CONNECTION DIAGRAM – DELTA MODULATION:

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PROCEDURE - ADAPTIVE DELTA MODULATION:

1. Connect the mains supply.

2. Connect the board as given in the figure.

3. Ensure that the clock frequency selector switches A & B are in A=0 & B=0 position.

4. Ensure that the switches in TX. Integrator gain control block are in following positions.

a) Gain control switch at the L.H.S. position. (towards switches A & B)

b) Switches A & B in position A=0 & B=0.

5. Ensure that the switches in receiver's integrator gain control block are in following positions:

a) Gain control switches at the R.H.S. position. (towards switches A & B)

b) Switches A & B in Position A=0 & B=0.

6. Turn all the potentiometers of function, generator block namely 250Hz to 2 KHz to their fully

clockwise positions.

7. Turn ON the supply.

8. Connect the voltage comparator's +ve input to 0V & check whether the modulator &

demodulator are balanced for correct operation as in delta modulation experimentation.

Change the clock frequency selector switches to the A=1, B=1, positions (256 KHz Clock

Frequency) before continuing.

9. Disconnect the voltage comparators '+' input from 0V and reconnect it to the 2 KHz output

from the function generator block.

10. Monitor the 2 KHz analog input at TP9 and the output of integrator 1 at TP17.

11. At the transmitter, move the slider of the gain control switch in the integrator 1 block to the

right-hand position (towards the sockets labeled A, B). At the receiver, move the slider of the

gain control switch in the integrator 2 blocks to the left-hand position (again towards the sockets

labeled A, B). The gain of each integrator is now controlled by the outputs of the counter

connected to it.

12. Once again examine the 2 KHz analog input at TP9 and the output of integrator 1 at TP17,

noting that the" slope overloading problem has been eliminated, and that the integrator's output

once again follows the analog input signal. Again, it may be necessary to adjust slightly the

transmitter's level adjust preset, in order to obtain a stable trace of the integrator's output signal.

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13. Compare the output of integrator 1 (TP17) with that of integrator 2 (TP47); noting that, as

expected, both are identical in appearance.

14. Examine the output of the low pass filter (TP51) and the output of integrator 2 (TP47). The

filter has removed the high-frequency components from the integrator's output signal, to leave

goods, clean 2 KHz sine wave.

15. Compare the original 2 KHz analog input signal (at TP9) with the output signal from the

receiver's low pass filter at TP47).

Note that the demodulator's output signal is equal in amplitude to the modulator's input signal,

but is delayed somewhat.

16. Disconnect the voltage comparator’s '+' input from the 2 KHz function generator output, and

reconnected it in turn to the 1 KHz, 500Hz and 250Hz outputs, noting in each case that the

demodulator’s output signal is identical to the modulator's input signal, but delayed in time.

17. The adaptive delta modulator/demodulator system has therefore eliminated any slope

overloading problems. To examine in detail how it does this, reconnect the voltage comparator's

'+' input to the function generator's 2 KHz output, then reduce the system clock (i.e. sampling)

frequency to 32 KHz, by putting the clock frequency selector switches in the A=0, B=0

positions. Although a 32 KHz sampling frequency is too low to ensure that an undistorted

output is obtained from the demodulator's low pass filter, it does increase the step size to a level,

which makes it easier to understand how the system is operating.

18. Monitor the 2 KHz analog input signal at TP9 and at the output of integrator 1 (TP17).

19. Examine also the test points in the adaptive control circuit 1 block (TP20-24), to ensure you

have a complete understanding of how the adaptive delta modulator is operating.

20. While monitoring the outputs of the modulator's binary counter (TP21 and 22), slowly turn

the 2 KHz preset anticlockwise, in order to reduce the amplitude of the 2 KHz analog input

signal. Notice that once the analog input signal becomes small enough, both the counter's outputs

becomes permanently low, causing the integrator to have minimum gain. This happens because

the input signal is now so small that the integrator can always follow it, even with minimum

gain. The result is that small-amplitude input signals can be transmitted with minimum integrator

gain, thereby keeping quantization noise to a minimum at the demodulator’s output.

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RESULT:

Thus the delta and adaptive delta modulation techniques have been studied and the corresponding graphs have been plotted.

33

EXP. NO.:

DATE:

DIGITAL MODULATION TECHNIQUES-ASK, PSK & FSK (HARDWARE)AIM:To study the following digital modulation techniques

1) Amplitude shift keying.2) Frequency shift keying.3) Phase shift keying

APPARATUS REQUIRED:

S.NO COMPONENTS RANGE QUANTITY1 binary data generator - 12 Data formatting and carrier

modulation trainer kit- 1

3 Patch chords - 154 CRO - 25 CRO probes - 4

THEORY:Amplitude Shift Keying (ASK):

Many transmission channels (especially radio frequency channel) do not allow the digital

signals to be transmitted directly, but they can be transmitted through RF after modulating the

higher frequency sine wave carrier. The simplest form of digital RF modulation is Amplitude

Shift Keying, say simply ASK.

There are two types in ASK, one is ON-OFF keying and other one continuous keying. In

ON-OFF keying ASK, sine wave carrier transmitted only for data is ‘1’ while sine wave carrier

eliminated for data is ‘0’. In continuous ASK keying, higher voltage level of sine wave carrier

transmitted for data of ‘1’ while lower voltage level of sine wave carrier transmitted for data of

‘0’. Among two types, ON-OFF keying is a simplest form of ASK which will be studied through

our trainer kit.

To generate an amplitude shift keyed waveform at the transmitter, a double balanced

modulator circuit is used. This device simply multiples the two input (Data and Carrier) and

produce resultant product voltage level at the output. During the data bit of ‘1’ the carrier is

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multiplied by a constant (positive voltage) which allow the carrier to output without change of

carrier phase. During the data bit of ‘0’, the carrier is multiplied by a zero volt giving zero

voltage to the output of modulator. The ASK receiver also simpler, one needs a simple rectifier

filter circuit. The filter’s output look like a rounded version of original data pattern and it cannot

be used by the digital circuit. To overcome this, the filter’s output waveform converted to TTL

signal by a threshold detector (simply a comparator).

Frequency Shift Keying (FSK):

In frequency shift keying, the signal at the transmitter’s output is switched from one

frequency to another while data change occur in the modulation signal. For example, if the low

frequency is used to represent a data ‘1’ and the higher frequency used to represent a data ‘0’.

The frequency change should be in ratio of integer, i.e. M: N, M and N are integer. To generate

the FSK waveform, the VCT- 14A trainer add the two different frequency ASK signal. At the

receiver, the frequency shift keyed signal is decoded by means of a phase locked loop (PLL)

detector. In VCT-14A kit, the PLL detector has been designed to get approximate zero error

voltage for 960 KHz of carrier signal which indicates data is ‘0’. While frequency change occur

from 960 KHz to 1.44MHz, the error voltage increase in positive voltage to compensate for PLL

frequency change which indicates data is ‘1’. The error voltage contains two high frequency

components, which will be reduced by means of low pass filter. The filter’s output look like a

rounded version or original data pattern, and it cannot be used by the digital circuitry. To

overcome this, the filter’s output waveform converted to TTL signal by a threshold detector.

PROCEDURE:

Connect the data 1, clock ground output of the binary data generator to the TX data input, TX clock input and ground the data formatting trainer kit. Give the connections as given below

AMPLITUDE SHIFT KEYING: Connect the 1.44MHZ carrier signal to the carrier input of the balanced modulator 1. Connect the NRZ (L) output to the modulating input of the balanced modulator 1. Observe the message signal input and the ASK output in the CRO from the modulating

input point and the output point of the balanced modulator 1 and then plot the graph.

FREQUENCY SHIFT KEYING:

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Connect the 1.44 MHZ carrier signal to the carrier input of the balanced modulator 1. Connect the NRZ (L) output to the modulating input of the balanced modulator 1 and to

the input of the data inverted. Connect the 960KHZ carrier signal to the carrier input of the balanced modulator 2. Connect the data inverter input to the modulating input of the balanced modulator 2. Connect the balanced modulator 1 & 2 output to the A & B input of the summing

amplifier. Observe the message signal input of the balanced modulator 1 and the output point of the

summing amplifier and then plot the graph.

PHASE SHIFT KEYING: Connect the 960KHZ carrier signal to the carrier input of the balanced modulator 1. Connect the NRZ(M) output to the input of the unipolar-bipolar convert 1. Connect the unipolar-bipolar converter 1 output to the balanced modulator 1. Observe the message signal input and the PSK output in the CRO from the modulating

input point and the output point of the balanced modulator 1 and then plot the graph.

MODELGRAPH:

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37

CONNECTION DIAGRAM – ASK

FSK:

38

PSK:

TABULATION:

S.NO SIGNAL AMPLITUDE FREQUENCY

RESULT:Thus the various digital modulation techniques are studied and output waveforms were plotted.

39

EXP. NO.:

DATE:

DIGITAL MODULATION TECHNIQUES-ASK, PSK & FSK (SIMULATION)

AIM:

To simulate the digital modulation and demodulation techniques using MATLAB.

SOFTWARE REQUIRED:

MATLAB

PROCEDURE:

1. Open MATLAB software and open the new command editor window.

2. Type the coding of ASK, PSK, QPSK, FSK techniques.

3. Save the coding using “.m” extension.

4. Run the coding using the toolbar given.

5. Enter the input values if required.

6. Plot the obtained output waveforms.

PROGRAM:

(A) ASK:

clc;clear all;close all;x=input(‘Enter the input digital sequence’);N=length(x);t=0.01:0.01:N;c=2*sin(2*pi*t);for i=1:1:Nm((i-1)*100+1:i*100)=x(i);endy=c.*m;subplot(3,1,1);plot(t,m);xlabel(‘time’);ylabel(‘amplitude’);

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title(‘digital input signal’);subplot(3,1,2);plot(t,c);xlabel(‘time’);ylabel(‘amplitude’);title(‘sinusoidal signal’);subplot(3,1,3);plot(t,y);xlabel(‘time’);ylabel(‘amplitude’);title(‘PSK modulated signal’);r=randn(1,length(y));k=y+r;figure;plot(t,k);xlabel(‘time’);ylabel(‘amplitude’);title(‘noise added PSK signal’);t1=0:0.01:.99;r1=sin(2*pi*t1);r2=fliplr(r1);l=length(k)+length(r2)-1;d1=fft(k,l);d2=fft(r2,l);d=d1.*d2;p=ifft(d,l);figure;plot(p);xlabel(‘time’);ylabel(‘amplitude’);title(‘correlated signal’);for j=1:length(x)q(j)=p(100*j);if q(j)>15m1(j)=1;elsem1(j)=0;endendfor i=1:1:Ns((i-1)*100+1:i*100)=m1(i);endfigure;plot(s);

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xlabel(‘time’);ylabel(‘amplitude’);title(‘demodulated signal’);

OUTPUT :

(B) PSK:

clc;clear all;close all;x=input(‘Enter the input binary sequence’);N=length(x);x(x==0)=-1;t=0.01:0.01:N;c=2*sin(2*pi*t);for i=1:1:Nm((i-1)*100+1:i*100)=x(i);endy=c.*m;subplot(3,1,1);plot(t,m);xlabel(‘time’);

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ylabel(‘amplitude’);title(‘digital input signal’);subplot(3,1,2);plot(t,c);xlabel(‘time’);ylabel(‘amplitude’);title(‘sinusoidal signal’);subplot(3,1,3);plot(t,y);xlabel(‘time’);ylabel(‘amplitude’);title(‘PSK modulated signal’);r=randn(1,length(y));k=y+r;figure;plot(t,k);xlabel(‘time’);ylabel(‘amplitude’);title(‘noise added PSK signal’);t1=0:0.01:.99;r1=sin(2*pi*t1);r2=fliplr(r1);l=length(k)+length(r2)-1;d1=fft(k,l);d2=fft(r2,l);d=d1.*d2;p=ifft(d,l);figure;plot(p);xlabel(‘time’);ylabel(‘amplitude’);title(‘correlated signal’);for j=1:length(x)q(j)=p(100*j);if q(j)>0n(j)=1;elsen(j)=0;endendfigure;stem(n);xlabel(‘time’);

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ylabel(‘amplitude’);title(‘demodulated signal’);

OUTPUT:

(C)QPSK:

QPSK MODULATION:

%MATLAB Script for a Binary PSK with two Phases

% Clear all variables and close all figures

clear all;close all;% The number of bits to send - Frame LengthN=input('enter the number of bits to be modulated : N = ');% Generate a random bit streambit_stream = round(rand(1,N));% 4 PHASE SHIFTSP1 = pi/4; %45degrees phase shiftP2 = 3/4*pi; %135 degrees phase shiftP3 = 5/4*pi; %225 degree phase shiftP4 = 7/4*pi; %315 degree phase shift

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% Frequency of Modulating Signalf = 1; %f --> time period

% Sampling rate of sine wave - This will define the resoultionfs = 100;% Time for one bitt = 0: 1/fs : 1;% This time variable is just for plottime = [];QPSK_signal = [];Digital_signal = [];carrier_signal=[];for ii = 1: 2: length(bit_stream)jj = ii + 1;%Code for generation of Original Digital SignalDigital_signal = [Digital_signal (bit_stream(ii)==0)*zeros(1,length(t)) + (bit_stream(jj)==1)*ones(1,length(t)) ];%Code for generation of carrier signalcarrier_signal=[carrier_signal (sin(2*pi*f*t))]; %Code for genearting QPSK signal modulated signalif bit_stream(ii)==0 if bit_stream(jj)==0 bit00 = (bit_stream(ii)==0)*sin(2*pi*f*t + P1); QPSK_signal = [QPSK_signal (bit00)]; else bit0 = (bit_stream(ii)==0)*sin(2*pi*f*t + P2); bit1 = (bit_stream(jj)==0)*sin(2*pi*f*t + P2); QPSK_signal = [QPSK_signal (bit0+bit1) ]; endendif bit_stream(ii)==1 if bit_stream(jj)==0 bit1 = (bit_stream(ii)==0)*sin(2*pi*f*t + P3); bit0 = (bit_stream(jj)==0)*sin(2*pi*f*t + P3); QPSK_signal = [QPSK_signal (bit1+bit0) ]; else bit11 = (bit_stream(jj)==1)*sin(2*pi*f*t + P4); QPSK_signal = [QPSK_signal (bit11) ];

endend time = [time t]; t = t + 1;end

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% Plot the Original Digital Signalsubplot(3,1,1);plot(time,Digital_signal,'r','LineWidth',2);xlabel('Time (bit period)');ylabel('Amplitude');title('Original Digital Signal');axis([0 8 -0.5 1.5]);grid on;% Plot the carrier Signalsubplot(3,1,2);plot(time,carrier_signal,'g','LineWidth',2);xlabel('Time (bit period)');ylabel('Amplitude');title('carrier Signal');axis([0 time(end) -1.5 1.5]);grid on;% Plot the QPSK Signalsubplot(3,1,3);plot(time, QPSK_signal,'LineWidth',2);xlabel('Time (bit period)');ylabel('Amplitude');title('QPSK Signal with two Phase Shifts');axis([0 8 -1.5 1.5]);grid on;

QPSK DEMODULATION:

%MATLAB Script for a Binary PSK with two Phases format long; % Clear all variables and close all figures clear all; close all; a=input('enter the number of elements: N = '); N=a; % Generate a random bit stream bit_stream =round(rand(1,N)); % 4 PHASE SHIFTS P1 = pi/4; %45degrees phase shift P2 = 3/4*pi; %135 degrees phase shift P3 = 5/4*pi; %225 degree phase shift P4 = 7/4*pi; %315 degree phase shift % Frequency of Modulating Signal f = 2; %f --> time period % Sampling rate of sine wave - This will define the resoultion

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fs = 100; % Time for one bit t = 0: 1/fs : 1; % This time variable is just for plot time = []; QPSK_signal = []; Digital_signal = []; carrier_signal=[]; for ii = 1: 2: length(bit_stream) jj=ii+1; % Checking for input and carrier wave phase if bit_stream(ii)==0 if bit_stream(jj)==0 bit00 = (bit_stream(ii)==0)*sin(2*pi*f*t + P1); QPSK_signal = [QPSK_signal (bit00)]; else bit0 = (bit_stream(ii)==0)*sin(2*pi*f*t + P2); bit1 = (bit_stream(jj)==0)*sin(2*pi*f*t + P2); QPSK_signal = [QPSK_signal (bit0+bit1) ]; end end if bit_stream(ii)==1 if bit_stream(jj)==0 bit1 = (bit_stream(ii)==0)*sin(2*pi*f*t + P3); bit0 = (bit_stream(jj)==0)*sin(2*pi*f*t + P3); QPSK_signal = [QPSK_signal (bit1+bit0) ]; else bit11 = (bit_stream(jj)==1)*sin(2*pi*f*t + P4); QPSK_signal = [QPSK_signal (bit11) ]; end end % Generating carrier wave bit00 = ((bit_stream(ii)==0)*sin(2*pi*f*t)); bit11 = ((bit_stream(ii)==1)*sin(2*pi*f*t )); carrier_signal=[carrier_signal (bit00 + bit11)]; %genearting Digital wave if (QPSK_signal (bit_stream(ii)==0)& carrier_signal (bit_stream(ii)==0)) Digital_signal = [Digital_signal (bit_stream(ii)==0)*zeros(1,length(t))]; else Digital_signal = [Digital_signal (bit_stream(ii)==1)*ones(1,length(t))]; end time = [time t]; t = t + 1; end

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%Plot the Original Digital Signal subplot(3,1,1); plot(time,Digital_signal,'r','LineWidth',2); xlabel('Time (bit period)'); ylabel('Amplitude'); title('Original Digital Signal'); axis([0 time(end) -0.5 1.5]); grid on; % Plot the carrier Signal subplot(3,1,2); plot(time,carrier_signal,'g','LineWidth',2); xlabel('Time (bit period)'); ylabel('Amplitude'); title('carrier Signal'); axis([0 time(end) -1.5 1.5]); grid on; % Plot the input BPSK Signal subplot(3,1,3); plot(time,QPSK_signal,'LineWidth',2); xlabel('Time (bit period)'); ylabel('Amplitude'); title('QPSK Signal with two Phase Shifts'); axis([0 time(end) -2.5 2.5]); grid on;

OUTPUT:

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(D)FSK:

clc;close all;clear all;x=input(‘enter the binary input’);l=length(x);for i=1:1:lm(((i-1)*100)+1:i*100)=x(i);endfigure;subplot(4,1,1);plot(m);xlabel(‘time’);ylabel(‘amplitude’);title(‘modulating signal’);f=100;t=0:(1/f):(l-(1/f));f1=10;f2=5;c1=sin(2*pi*f1*t);y1=m.*c1;subplot(4,1,2);plot(t,y1);xlabel(‘time’);ylabel(‘amplitude’);for j=1:lif x(j)==1x(j)=0;else x(j)=1;endm1((j-1)*100+1:j*100)=x(j);endc2=sin(2*pi*f2*t);y2=m1.*c2;subplot(4,1,3);plot(t,y2);xlabel(‘time’);ylabel(‘amplitude’);y=y1+y2;subplot(4,1,4);plot(t,y);xlabel(‘time’);ylabel(‘amplitude’);

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title(‘FSK modulated wave’);r=randn(size(y));F=y+r;figure;subplot(3,1,1);plot(F);xlabel(‘time’);ylabel(‘amplitude’);title(‘noise added FSK signal’);l1=length(F);t1=0:0.01:.99;r1=sin(2*pi*f1*t1);r1=fliplr(r1);l2=length(r1);l3=l1+l2-1;u=fft(F,l3);v=fft(r1,l3);k1=u.*v;k11=ifft(k1,l3);r2=sin(2*pi*f2*t1);r2=fliplr(r2);w=fft(r2,l3);k2=u.*w;k22=ifft(k2,l3);k=k11-k22;subplot(3,1,2);plot(k);xlabel(‘time’);ylabel(‘amplitude’);title(‘correlated signal’);for z=1:lt(z)=k(z*100);if t(z)>0s(z)=1;elses(z)=0;endendsubplot(3,1,3);stem(s);xlabel(‘time’);ylabel(‘amplitude’);title(‘Demodulated output signal’);

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OUTPUT:

RESULT:

Thus the digital modulation and demodulation techniques have been simulated and waveforms have been plotted.

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EXP. NO.:

DATE:

PRE-EMPHASIS / DE-EMPHASIS CIRCUITS

AIM:

To study the functioning of pre-emphasis and de-emphasis circuits.

APPARATUS REQUIRED:

Components Value Quantity

Resistors 1kΩ 1

Capacitor 0.047μF, 1

Function generator (0-1)MHz 1

CRO (0-20)MHz 1

THEORY:

PRE-EMPHASIS:

In processing electronic audio signals, pre-emphasis refers to a system process designed to

increase, within a band of frequencies, the magnitude of some (usually higher) frequencies with

respect to the magnitude of other (usually lower) frequencies in order to improve the overall

signal-to-noise ratio by minimizing the adverse effects of such phenomena as attenuation

distortion or saturation of recording media in subsequent parts of the system. Pre-emphasis is

commonly used in telecommunications, digital audio recording, record cutting, in FM

broadcasting transmissions, and in displaying the spectrograms of speech signals.

DE-EMPHASIS:In telecommunication, de-emphasis is a system process designed to decrease, within a band of

frequencies, the magnitude of some (usually higher) frequencies with respect to the magnitude of

other (usually lower) frequencies in order to improve the overall signal-to-noise ratio by

minimizing the adverse effects of such phenomena as attenuation differences or saturation of

recording media in subsequent parts of the system. In serial data transmission, de-emphasis has a

different meaning, which is to reduce the level of all bits except the first one after a transition.

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That causes the high frequency content due to the transition to be emphasized compared to the

low frequency content which is de-emphasized. This is a form of transmitter equalization; it

compensates for losses over the channel which is larger at higher frequencies.

PROCEDURE:

1. Connections are made as per the circuit diagram.

2. Set input signal amplitude using function generator.

3. Vary the input signal frequency from 0Hz to 100kHz in regular steps.

4. Note down the corresponding output voltage.

5. Plot the graph: Gain(dB) vs Frequency(Hz).

CIRCUIT DIAGRAM – PRE – EMPHASIS:

53

TABULATION:

PRE-EMPHASIS Vin:

S.NO.

INPUT

FREQUENCY

50HZ TO 20KHZ

OUTPUT VOLTAGE

Vo(VOLTS)GAIN = 20log(Vo/Vin)

MODEL GRAPH:

Gain (-db)

Frequency(Hz-khz)

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TABULATION - DE-EMPHASIS: Vin:

S.NO.

INPUT

FREQUENCY

50HZ TO 20KHZ

OUTPUT VOLTAGE

Vo(VOLTS)GAIN = 20log(Vo/Vin)

MODEL GRAPH:

55

RESULT:

Thus the study functioning of pr-emphasis and de-emphasis circuits using active and passive components have been done successfully.

56

EXP. NO.:

DATE:

PHASE LOCKED LOOP (PLL)

AIMTo study the response of a VCO when its control voltage is varied.

EQUIPMENTS REQUIRED

Components Value Quantity

PLL Trainer Kit VCT-57 1

Patch Chords - -

CRO probe - -

CRO (0-20)MHz 1

THEORY:A frequency synthesizer is not a frequency generator in the same sense as an Oscillator

but it is a frequency converter which uses electronics in the phase error feedback system to keep the output running in a fixed phase relation to the reference signal. A frequency synthesizer is used to generate many output frequencies through addition, subtraction, multiplication and division of a smaller number of fixed frequency sources. The objective of a synthesizer is twofold. It should produce as many frequencies as possible from a minimum number of sources, and each frequency should be as accurate and stable as every other frequency. A frequency synthesizer may be capable of simultaneously generating more than one output frequency, with each frequency being synchronous to a single reference or master oscillator frequency.

Essentially, there are two methods of frequency synthesis: direct and indirect. With directfrequency synthesis, multiple output frequencies are generated by mixing the outputs from two or more crystal controlled frequency sources or by dividing or multiplying the output frequency from a single crystal Oscillator. With indirect frequency synthesis, a feedback controlled divider/multiplier is used to generate multiple output frequencies. Indirect frequency synthesis is slower and more susceptible to noise; however, it is less expensive and requires few and less complicated filters than direct frequency synthesis.

COMPONENTS OF PLL

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The above block diagram shows the constituents of a PLL. The reference frequency Fref is fed in by an oscillator. The oscillator used can be of any type but the problem is that they could betuned only within a small range of frequencies due to their limited bandwidth. The divider is used to increase the range of frequencies the PLL can output. The divider divides the frequency from the VCO by N where ‘N’ is programmable. When the PLL locks to the phase, the VCO will be going N times faster than reference clock.

CONNECTION DIAGRAM

PROCEDURE

1. Switch ON the trainer.2. Set the frequency divider ratio 1 by press the switch SW1.3. Measure the error voltage generated by the LPF at test point P5.4. Measure the VCO output frequency at test point P7.5. Tabulate the readings.6. Increase the frequency divider ratio by pressing the switches (SW1, SW2, SW3).7. Repeat steps (3 to 6) get more value of error voltage and VCO frequency.8. Plot a graph with error voltage along x axis and VCO frequency along y axis.

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TABULATION

59

RESULT:

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EXP. NO.:

DATE:

LINE CODING AND DECODING TECHNIQUE

AIM:

To study and examine line coding and decoding using the following techniques

i. Unipolar RZ

ii. Unipolar NRZ

iii. Polar RZ

iv. Polar NRZ

v. Bipolar RZ

vi. Bipolar NRZ

vii. Manchester Coding

And also plot its output waveform.

EQUIPMENT S AND COMPONENTS REQUIRED:

S.No. Equipments and Components Type and range Quantity

1. Trainer Kit VCT-37 1

2. Patch Cords - As required

3. CRO 0-30MHz 1

THEORY:

Communication systems can be broadly divided into analog and digital systems. In an

analog system, the electric waveform that carries the information is a replica of the source

information signal. In digital system, the electrical waveforms are coded representations of the

original information. If the original information is an analog signal, this must be converted to a

series of discrete values that can be transmitted digitally. The process of converting the original

information into a data sequence is referred to as

SOURCE CODING.

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1. UNIPOLAR RZ:

In this line code, a binary 1 is represented by a non-zero voltage level during a portion of

bit duration usually for half of a bit period and a 0 voltage level for rest of the bit duration. A

binary 0 is represented by a zero voltage level during the entire bit duration.

2. UNIPOLAR NRZ:

In this line code, a binary 1 is represented by a non zero voltage level and a binary 0 is

represented by a zero voltage level. Data is just replicated in this technique.

3. POLAR RZ:

In this line code, a binary 0 is represented by a negative voltage level and returns to 0 for

half bit duration. A binary 1 is represented by alternating positive voltage level for half a bit

period and returns to 0 for another half bit duration.

4. POLAR NRZ:

In this line code, a binary 1 is represented by a positive voltage level +V and a binary 0 is

represented by a negative voltage level –V for the full bit period. The advantages of polar NRZ

are

1. Low bandwidth requirements

2. Very low error probability

3. Reduced DC

The disadvantages of polar NRZ is that there is no error detection capability and that a long

string of 1’s or 0’s could result in loss of synchronization and power supplies are required to

generate this code.

5. BIPOLAR RZ:

In this line code, a binary 1 is represented by alternating positive and negative voltage

levels for a half bit period duration and maintaining 0 for the other half of the period. A binary 1

is represented by a 0 voltage level during the entire bit duration. This code is also called as AMI.

6. BIPOLAR NRZ:

In this line code, a binary 1 is represented by positive and negative voltage levels in

alternating mark level in full bit period. A binary 0 is represented by 0 voltage levels during the

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entire bit period. This code is also called as AMI since 1’s are represented by alternating positive

and negative voltage levels.

7. MANCHESTER CODING:

In this line code, a binary 1 is represented by a pulse that has positive voltage level

during the first half of the bit duration and negative voltage during the second half of the bit

duration .

The advantage of this code includes a 0 dc content and so avoiding dc wandering

problems. The code having alternating positive and negative pulses and so timing recovery is

simple and it has good error rate performance.

The main disadvantage of this code is larger bandwidth. It has no error detection

possibility.

OBSERVATION

Coding techniquesAmplitude

(volts)

Time period

(ms)

i. Unipolar RZ

ii. Unipolar NRZ

iii. Polar RZ

iv. Polar NRZ

v. Bipolar RZ

vi. Bipolar NRZ


PROCEDURE:

i. UNIPOLAR RZ:

1. Connect the PRBS (test point P5) to test point P7.

2. Connect test point P8 to test point P18.

3. Set the SW1 in Rz position.

4. Set the potentiometer P1 in minimum position.

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5. Switch ON the power supply.

6. Press switch SW2 once.

7. Display the encoded signal at test point P8 on 1 channel of CRO and decoded signal at test

point P20 in another channel of CRO.

ii. UNIPOLAR NRZ:

1. Connect the PRBS (test point P3) to test point P7.


3. Set the SW1 in NRZ position.






iii. POLAR RZ:

1. Connect the PRBS (test point P5) to test point P9 and PRBS (P6) to test point P10.


3. Set the SW1 in RZ position.



6. Press switches SW2 once.



iv. POLAR NRZ:

1. Connect the PRBS (test point P5) to test point P9 and PRBS (P6) to test point P10.



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v. BIPOLAR RZ:

1. Connect the PRBS (test point P5) to test point P12 and CLK (test point P3) to P13.


3. Set the SW1 in RZ position.






vi. BIPOLAR NRZ:















65



MODEL GRAPH:

RESULT:

Thus the characteristics of line coding and decoding techniques were studied and

the output waveforms were plotted.

66

EXP. NO.:

DATE:

ERROR CONTROL CODING USING MATLAB

AIM:

To reduce the error rate in Channel Noise Model by using a Hamming code.

APPARATUS REQUIRED:MATLAB, Simulink, Communications Block set.

PROCEDURE: A. Start MATLAB by double-clicking the MATLAB icon or go to ‘start’ and ‘program’,

then search for the MATLAB program folder and then click the ‘MATLAB’. B. Type in simulink to open a new window. Click on the ‘Communications Blockset’, it will

open all sub-libraries of communications.

C. Building the Hamming Code Model1. Type channeldoc at the MATLAB prompt to open the channel noise model. Then save the

model as my_hamming in the directory where you keep your work files. 2. Drag the following two Communications Blockset blocks from the Simulink Library

Browser into the model window: Hamming Encoder block, from the Block sublibrary of the Error Detection and

Correction library

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Hamming Decoder block, from the Block sublibrary of the Error Detection and Correction library

3. Click the right border of the model and drag it to the right to widen the model window.4. Move the Binary Symmetric Channel block, the Error Rate Calculation block, and the

Display block to the right by clicking and dragging. This creates more space between the Binary Symmetric Channel block and the blocks next to it. The model should now look like the following figure.

5. Click the Hamming Encoder block and drag it on top of the line between the Bernoulli Binary Generator block and the Binary Symmetric Channel block, to the right of the branch point, as shown in the following figure. Then release the mouse button. The Hamming Encoder block should automatically connect to the line from the Bernoulli Binary Generator block to the Binary Symmetric Channel block.

6. Click the Hamming Decoder block and drag it on top of the line between the Binary Symmetric Channel block and the Error Rate Calculation block.D. Setting Parameters in the Hamming Code Model

Double-click the Bernoulli Binary Generator block and make the following changes to the parameter settings in the block's dialog box, as shown in the following figure:

E. Labeling the Display BlockYou can change the label that appears below a block to make it more informative. For example, to change the label below the Display block to "Error Rate Display," first select the label with the mouse. This causes a box to appear around the text. Enter the changes to the text in the box.

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F. Running the Hamming Code ModelTo run the model, select Simulation > Start. The model terminates after 100 errors occur. The error rate, displayed in the top window of the Display block, is approximately .001. Displaying Frame SizesYou can display the sizes of data frames in different parts of the model by selecting Signal dimensions from the Port/signal displays submenu of the Format menu at the top of the model window. This is shown in the following figure. The line leading out of the Bernoulli Binary Generator block is labeled [4x1], indicating that its output consists of column vectors of size 4. Because the Hamming Encoder block uses a [7,4] code, it converts frames of size 4 into frames of size 7, so its output is labeled [7x1].

Adding a Scope to the Model

To display the channel errors produced by the Binary Symmetric Channel block, add a Scope block to the model. This is a good way to see whether your model is functioning correctly. The example shown in the following figure shows where to insert the Scope block into the model.

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Setting Parameters in the Expanded ModelMake the following changes to the parameters for the blocks you added to the model.

Error Rate Calculation BlockDouble-click the Error Rate Calculation block and clear the box next to Stop simulation in the block's dialog box.

Scope BlockThe Scope block displays the channel errors and uncorrected errors. To configure the block,

Double-click the block to open the scope, if it is not already open. Click the Parameters button on the toolbar. Set Time range to 5000. Click the Data history tab. Type 30000 in the Limit data points to last field, and click OK.

The scope should now appear as shown.

70

To configure the axes, follow these steps: Right-click the vertical axis at the left side of the upper scope. In the context menu, select Axes properties. In the Y-min field, type -1. In the Y-max field, type 2, and click OK. Repeat the same steps for the vertical axis of the lower scope. Widen the scope window until it is roughly three times as wide as it is high. You can do

this by clicking the right border of the window and dragging the border to the right, while pressing the mouse button.

Relational OperatorSet Relational Operator to ~= in the block's dialog box. The Relational Operator block compares the transmitted signal, coming from the Bernoulli Random Generator block, with the received signal, coming from the Hamming Decoder block. The block outputs a 0 when the two signals agree and a 1 when they disagree.

Observing Channel Errors with the ScopeWhen you run the model, the Scope block displays the error data. At the end of each 5000 time steps, the scope appears as shown in the following figure. The scope then clears the displayed data and displays the next 5000 data points.Scope with Model Running

The upper scope shows the channel errors generated by the Binary Symmetric Channel block. The lower scope shows errors that are not corrected by channel coding.Click the Stop button on the toolbar at the top of the model window to stop the scope.To zoom in on the scope so that you can see individual errors, first click the middle magnifying glass button at the top left of the Scope window. Then click one of the lines in the lower scope. This zooms in horizontally on the line. Continue clicking the lines in the lower scope until the horizontal scale is fine enough to detect individual errors. A typical example of what you might see is shown in the figure below.

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Zooming In on the Scope

The wider rectangular pulse in the middle of the upper scope represents two 1s. These two errors, which occur in a single codeword, are not corrected. This accounts for the uncorrected errors in the lower scope. The narrower rectangular pulse to the right of the upper scope represents a single error, which is corrected.G. When you are done observing the errors, select Simulation > Stop.

RESULT:Thus the error controlling has been done using Hamming code and output has been

verified.

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EXP. NO.:

DATE:

SAMPLING AND TIME DIVISION MULTIPLEXING

AIM:

To study and verify sampling theorem and TDM techniques using trainer kit and to plot

its output waveform.

EQUIPMENT S AND COMPONENTS REQUIRED:

S.No. Equipments and Components Type and range Quantity

1. Trainer Kit VCT-02 1

2. Patch Cords - As required

3. CRO 0-30MHz 1

THEORY:

Multiplexing

Multiplexing is a process of combining signals from different information sources so that

they can be transmitted to a common channel. This is done by a multiplexer. Digital multiplexer

is a combinational circuit that selects data from 2 n input lines (or) group of lines and transmit

them through a single output line (or) group of lines. Multiplexing is advantageous in cases

where it is impractical and uneconomical to provide separate links for the different information

sources. The two most commonly used methods of multiplexing are Frequency division

multiplexing and Time division multiplexing.

Time division multiplexing:

It is a process of taking the samples from different information signals in time domain so

that they can be transmitted over the same channel. The main fact in the TDM technique is that

there are large intervals between the message samples. The samples from the other sources are

placed within these time intervals.

In modern electronic systems, most of the digital modulation systems are based on the

principle of Pulse modulation. It involves the variation of a pulse parameter in accordance with

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the information signal. The pulse modulation systems require analog information to be sampled

at predetermined time intervals. The receiver can then reconstruct the signals from the samples if

the sampling meets the Nyquist criteria. This states that for a band limited signal with a highest

frequency component fm , the signal must be sampled at a rate greater than twice the highest

frequency component in the signal for the sampled signal to be recovered exactly.

PROCEDURE:

1. Make the connections as per the figure.

2. Adjust the threshold level potentiometer (Pot) so that it is greater than the other

channels but lesser than the D.C level Pot.]

3. Adjust the D.C level to some point.

4. Check the input and output signals using CRO.

PRINCIPLE OF TDM PAM SIGNAL:

Transmission Medium

Direction of rotation

Transmitting EndReceiving End

TDM PAM Signal

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Model Graph:

RESULT:

Thus the characteristics of sampling and TDM techniques were studied and the output

waveforms were plotted.

Documents

Communication Systems Lab Manual(1)