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Master of Electrical and Computers Engineering. DC/DC Converter with Transparent Electronics for application on Photovoltaic Panels. Romano Torres 19th July 2013. Supervisor: Vitor Grade Tavares Second Supervisor: Pedro Miguel Cândido Barquinha - PowerPoint PPT Presentation
DC/DC Converter with Transparent Electronics for application on Photovoltaic Panels
DC/DC Converter with Transparent Electronics for application on Photovoltaic PanelsRomano Torres19th July 2013
1Supervisor: Vitor Grade TavaresSecond Supervisor: Pedro Miguel Cndido BarquinhaSecond Supervisor: Pydi Ganga BahubalindruniMaster of Electrical and Computers EngineeringOutlineMotivationObjectivesa-IGZO TFTsDC/DC ConverterAmplifierRegulatorFabricationConclusionsFuture Work
22MotivationTo construct circuits on flexible substracts, such as plastic, glass:Possible to embody in photovoltaic panels.
Low cost fabrication at room temperature.3
ObjectivesDesign of a boost DC/DC converter using transparent electronics in order to have an increased and stable voltage level with direct current.Vout > 1.5*Vin;Efficiency >= 40%
Fabrication of the circuit in CENIMAT/UNL.
4a-IGZO TFTsHigh parasitic resistance;
P-type transistors with low performance;
Threshold voltage shift.
5
Staggered bottom-gate TFT structureProblems:Voltage Boosting Stage DC/DC converter
6
Indutors are avoided due to their low performance in transparent technology;
Capacitor is used to save charge in electric field;
Vdd < Vout < 2*Vdd
Voltage Boosting Stage - out of phase clock signals
7
Lower variation of Vout level.2 Voltage Boosting Stages in Cascade
8
To increase the voltage level twice;
Parasitic effects reduce the efficiency;
4 TFTs of 320 m in parallel for each diode-connection are used;
Vdd < Vout > RL
Objectives: Vout 20 V 50% lower V
Advantage: More stable voltage leveleven with load variation.
Proposed Amplifier Block diagram19
Amplifier
20
Differential Stage
21
Positive Feedback Stage
22
Source-Follower Stages
23
Common-Source Stages
24
Phase Compensation
-In order to have higher phase margin.
25Gain and Phase Response
26Gain: 36.7dB
Phase Margin: 83.79
Proposed Amplifier - Layout
272383.8 m2450 m
Regulator
28Voltage levels
Vout = 17.65 VThe voltage variation with the load decreased 80%.Final Circuit - Layout
2918709.55 m14557.1 mFabrication30
DC/DC converter with bootstrapping and 2 boosting stagesConclusionsDC/DC converter:Wide transistors reduce parasitic resistance;Bootstrapping stage decreases settling time;10 converters in parallel reduce the parasitic resistance and allow more voltage boosting stages, increasing the output voltage level.Amplifier:Good phase margin was achieved;Voltage gain is enough for the regulation;Regulator:80% lower fluctuation of the voltage level with load variations.
31Improve the design of the amplifier to increase the gain;
PWM regulation with duty-cycle variation.Future Work
32The EndThank you!33