DIGITAL ELECTRONIC DEVICESLOGIC FAMILIES

INTRODUCTION OF ICS

4 ways f making ICs:1. Monolithic2. Thin film techniques3. Thick film techniques4. Hybrid circuits

INTRODUCTION OF ICS (CONT.)

Monolithic Constructed entirely on single chip of

silicon semiconductor material The most widely used method of

producing ICs

INTRODUCTION OF ICS (CONT.)

Thin and Thick Film Techniques Manufactured by depositing certain

material on a non-conducting base such as ceramic

Hybrid Circuits Made up of combination of monolithic, thin

film or thick film circuits.

CHARTS OF INTEGRATED CIRCUITS

Integrated Circuit

Monolithic

Digital (cont.) Linear

Hybrid

Digital Linear

Thin/Thick

CHARTS OF INTEGRATED CIRCUITS (CONT.)

Digital (cont.)

Bipolar (cont.) MOS

CMOSP or N

Channel

CHARTS OF INTEGRATED CIRCUITS (CONT.)

Bipolar (cont.)

RTL DTL TTL ECL HTL IIL CML HNIL

CHARTS OF INTEGRATED CIRCUITS (CONT.) RTL – Resistor transistor logic DTL – Diode transistor logic TTL – Transistor-transistor logic ECL – Emitter coupled logic HTL - High threshold logic IIL – Integrated injection logic CML – Current mode logic HNIL – High noise immunity logic CMOS – Complementary metal oxide

semiconductor

LIST OF IC TTL, ECL AND CMOS

IC TTL ECL CMOS

Inverter 7404 / 5404 74HC04 / 14049UB

Quad 2-input AND

7408 / 5408 10104 / 10504 74HC08 / 14081B

Quad 2-input NAND

7400 / 5400 74HC00 / 14011B

Quad 2-input NOR

7402 / 5402 10102 / 10502 74HC02 / 14001B

Quad 2-input OR 7432 / 5432 10103 / 10503 74HCT32 / 1407B

Quad 2-input X-OR

7486 / 5486 10113 / 10513 74HC86 / 14070B

TRANSISTOR-TRANSISTOR LOGIC (TTL) Use bipolar transistor in he circuit

technology to construct the gates at the chip level

Series of TTL logic circuit:1. Standard TTL2. Low power TTL3. Schottky TTL4. Low power Schottky TTL5. Advanced low power Schottky TTL6. Advanced Schottky TTL

TTL (CONT.)

1. Standard TTL (54/74) Power dissipation 10mW

2. Low power TTL (54L/74L) Low power consumption Power dissipation

3. Schottky TTL (54S/74S) Faster switching time

TTL (CONT.)

4. Low power Schottky TTL (54LS/74LS) Compromises speed to obtain lower

power dissipation

5. Advanced Schottky (AS) Advanced version of S series One version called F or FAST series

6. Advanced low power Schottky Advanced version of LS series

TTL CHARACTERISTICS

Type of logic: current sinking Propagation delay: 1 ~ 40ns Power dissipation: 1 ~ 25 mW Fan out: 10 ~ 30 Noise immunity: high Logic levels: binary 0 = +0.4V binary 1 = +3.6V Basic gate form: +NAND / -NOR Supply voltage Vcc: +5V ± 10%

COMPLEMENTARY METAL-OXIDE SEMICONDUCTOR (CMOS)

Use complementary pairs of transistors (N-type and P-type) called MOSFETs (metal-oxide-semiconductor field-effect transistors)

CMOS family series:1. 4000 series2. 40H00 series3. 74C00 series4. 74HC00 series5. 74HCT00 series

CMOS (CONT.)

1. 4000 series Original CMOS line Very low power consumption Could be used in battery power devices Slower than any TTL series

2. 40H00 series Faster than 4000 series Slower than LS TTL

CMOS (CONT.)

3. 74C00 series Pin compatible with TTL family, making

interchangeability easier Low power advantage over TTL family still

much slower than TTL

4. 74HC00 and 74HCT00 series 74HC00 (high speed CMOS), 74HCT00 (high

speed CMOS) Speedy as LS TTL series and still consume

less power

HANDLING MOS DEVICES

1. Store the integrated circuit in a conductive foam or leave in their original container.

2. Work on a conductive surface that is properly grounded

3. Ground all test equipments and soldering iron

4. Connect wrist to ground with length of wire and a 1MΩ series resistor.

HANDLING MOS DEVICES (CONT.)

5. Do not connect signals to the inputs while the device power supply is off

6. Connect all unused inputs to VDD or ground

7. Do not wear electrostatic-prone clothing such as wool, silk, or synthetic fibers

8. Do not remove or insert IC with the power on.

CMOS CHARACTERISTIC

Type of logic: current sinking and current sourcing

Propagation delay: 10 ~ 100ns Power dissipation: 1mW (1MHz), 10µW(static) Fan out: 50+ Noise immunity: very high (45% VDD) Logic levels: binary 0 = +0V binary 1 = +VDD

Basic gate form: +NOR / -NAND Supply voltage VDD: +3 ~ +15V

EMITTER-COUPLED LOGIC (ECL)

Designed for extremely high speed application

Well suited for large mainframe computer that require high number of operation per second

Family of ECL series:1. ECL 10K2. ECL 100K

ECL CHARACTERISTIC

Type of logic: unsaturated, current sourcing Propagation delay: 0.5 ~ 3ns Power dissipation: 40 ~ 60mW Fan out: 10 ~ 25 Noise immunity: high Logic levels: binary 0 = -1.75 V binary 1 = -0.9V Basic gate form: OR/NOR Supply voltage VEE: -5.2V