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CHNG 3

GII THIU S LT V VI IU KHIN DSPIC30F4011

3.1 c im:

C kin trc Harvard

Vi b cu trc lnh trong Cv ch a ch linh hot

C 84 lnh c bn

Cu lnh c di 24 bit, v ng dn d liu 16 bit

C 48Kbytes khng gian b nh chng trnh

2 Kbytes RAM d liu

512 Bytes SRAM

1 Kbytes EEPROM d liu khng mt khi mt ngun Hot ng ln n 30MIPS:

- DC n 40 MHz ng vo xung clockngoi

- 4 MHz-10MHz vi ng vo l b to dao ng, c th hot ng ch 4x, 8x, 16x

C 30 ngt:

- 3 ngt ngoi

- 8 n gt do ngi s dng chn la mc cho mi ln ngt

- 4 ngt cho b x l

16 thanh ghi lm vic 16 bit

Cc c tnh ngoi vi

Mc dng cho cc chn I/O l 25mA

Module Timer vi prescaler bng chng trnh:

- 5 timers/counters 16 bit; ch bt cp 2 timers 16 bit ta c 2module timer 32 bit

Hm ng vo capture 16 bit

Hm ng ra so sanh hay PWM 16 bit

Module 3 dy SPITM

(h tr ch 4 Frame)

Module I2C h trnhiu Master/Slave v 7-bit/10-bit a ch

2 module UART vi b m FIFO

1 module CAN

Module PWM iu khin ng c:

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6 knh ng ra PWM

- Ch ng rab hoc c lp

- Ch dng theo cnh v tm

3 b pht chu k cng sut

Ng ra phn cc bng chng trnh

iu khin thi gian cht cho ch b

iu khin tayng ra

Trigger cho chuyn i A/D

Module giao tip Encoder:

C ng vo l pha A, B v Index Pulse

B m v tr 16 bit up/down

Thit lp hng m

Ch o lng v tr (x2 hoc x4)

C kh nng lc tp nhiu ng vo

Ch chuyn i 16 bit timer/counter

Thit lp ngt cho b m v tr rollover/underflow

Analog:

10 bit cho b chuyn i A/D vi 4ng vo S/HL

- Tc chuyn i 500 Ksps

- 9 knh ng vo

- C th chuyn i trong lc sleep v idle

C th thit lp d tm Brown-out v Reset b pht

CMOS Technology:

in p thp, tc truy cp flash cao

Phm vi ca in p hot ng cao (2.5V n 5.5V)

Phm vi nhit cng nghip v mrng

Tiu th in nng t xem

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3.2 S chn:

Hnh 3.1S chn kiu PDIP v TQFP ca DsPIC30F4011

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3.3 Khi qut:

Hnh 3.2S khi ca dsPIC30F4011

Bng m t cc chn I/O ca dspic 30f4011

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Hnh 3. 3S khi ca cu trc DSP trong dsPIC30F4011

3.6 Cc PORT I/O

Tt c cc port chn c 3 thanh ghi trc tip lin h vi hot ng ca chnny. Thanh ghi d liu trc tip (TRISx) quyt nh tng chn l ng vo hay ng ra.Nu bit hng d liu l 1, th chn l input. Lu l tt c cc chn ca port cnh ngha l input sau khi reset. c t thanh ghi LATx, c b cht. Ghi ln bcht, ghi ln thanh ghi LATx. c t port (PORTx), c cc chn ca port, v ghi nchn ca port bng cch ghi ln b cht (LATx).

Tm li thanh ghi TRISx iu khin hng ca chn. Thanh ghi LATx cungcp du liu n ng ra, v c kh nng c cng nh ghi. c t trng thanh ghiPORTx trang thi ca cc chn ng vo trong khi ghi thanh ghi PORTx thay i nidung ca thanh ghi LATx.

3.7 TIMER1 MODULE

Timer 1 la loi Timer A. Module Timer1 l 1 Timer 16-bit, chng c th cungcp nh l mt b m thi gian cho xung clock thi gian thc, hoc hot ng nh

b m khong thi gian timer/counter chay ch t do. 16-bit timer c nhng ch hot ng sau:

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16-bit Timer

16-bit m ng b

16-bit m khng ng b

Hn na, cc c tnh hot ng sau th c h tr l:

S hot ng cng Timer

Thit lp chn la prescaler

S hot ng ca Timer trong khi CPU ch Idle v Sleep

Thanh ghi chu k ngt 16-bit bng match hoc xung cnh xung cacng tnh hiu ngoi

Ch hot ng c quyt nh bi vic thit lp cc bit tng ng trong thanh ghiT1CON 16-bit.

- Ch Timer 16-bit: ch Timer 16-bit, timer tng gi tr bin m ngvi mi vng lnh up n gi tr match, t trc trong thanh ghi PR1, sau reset v 0 v tip tc m. Khi CPU trng thi Idle, timer s dng m, trkhi TSIDL bit =0. Nu TSIDL =1, module logic timer s vn tip tc m ktqu ln n gi tr hyb ch CPU Idle.

- Ch m 16-bit ng b: trong ch ny tim m da vo xung cnhln ca xung clock tn hiu bn ngoi, iu ny c ng b ha vi phaclock ni. Timer m ln n gi tr match t trc PR1, sau reset v 0v tip tc. Khi CPU ch Idle tng t vi ch trn.

- Ch m 16-bit bt ng b: ch m ny timer s tng gi tr binm ng vi mi xung cnh ln ca xung clock bn ngoi. Timer m ln ngi tr match t trc PR1, sau b reset v 0 v tip tc. ch m btng b v CPU ch Idle, timer s dng m nu TSIDL=1.

Hnh 3. 4S khi ca module TIMER1 16-bit

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3.7.1 S hot ng cng timer

Timer 16-bit c th c t ch Gated Time Accumulation. Ch nycho php xung clock ni tng gi tr bin m timer tng ng khi tn hiu ng vocng (chn T1CK) c gi mc cao. iu khi bit TGATEphi c set enablech ny. Timerphi c enable (TON=1) v ngun xung clockphic set

ch xung ni (TCS=0).Khi CPU trng thi Idle, timer s dng m, tr khi TSIDL bit =0. Nu

TSIDL =1, module logic timer s vn tip tc m kt qu ln n gi tr hyb ch CPU Idle.

3.7.2 Timer Prescaler

Xung ng vo (FOSC/4 hoc xung clockngoi) n timer 16-bit, c th la chnprescale 1:1, 1:8, 1:64, v 1:256 c la chn iu khin bi cc bit TCKPS(T1CON). B prescaler th c xa khi c bt k trng hp no sau xy ra:

Mt lnh ghi gi tr ln thanh ghi TMR1 Xa bit TON

Thitb reset nh POR v BOR

TMR1 th khngb xa khi T1CON th c ghi.N s b xa bi vic ghi lnthanh ghi TMR1

3.7.3 S hot ng ca timer trong sut ch Sleep

Trong sut ch Sleep ca CPU, timer s hot ng nu:

Module timer th c enable (TON=1) v Ngun xung clockca timer th c chn l ngoi (TCS=1) v

Bit TSYNC c xc nhn mc logic 0, chng s nh ngha ngunxung clockngoi nh l bt ng b.

Khi tt c 3 iu kin trn tr thnh s tht, timer s tip tc m ln n thanhghi PR1 v reset v 0.

Khi 1 match gia timer v thanh ghi PR xut hin, 1 ngt c th cpht ra,nutng ng vibt chophp ngt timer c bt ln.

3.7.4 Timer Interrupt

Timer 16-bit c th pht ra mt ngt trong chu k match. Khi timer m vmatch vi thanh ghi PR, bit T1IF c xc nhn v 1 ngt c pht, nu c bt.Bit T1IFphi c xa bng phn mm. Cngt T1IF th c t thanh ghi iukhin IFS0 thanh ghi iu khin ngt.

Khi ch Gated Time Accumulation c bt, 1 ngt cng s cpht trnxung cnh ln ca tin hiu cng.

Vic cho php ngt c thit lp bng bit T1IE. Bit chophp ngt timer th

c t thanh ghi iu khin IEC0 trong thanh ghi iu khin.

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3.7.5 Real-Time Clock

Timer 1, khi hot ng ch Real-Time Clock (RTC), cung cp thi gianca ngy v cc s kin c th xy ra. c tnh hot ng ca RTC l:

Hot ng t b pht xung 32kHz

8-bit prescaler Ngun thp

Ngt RTC

3.8 Module timer 2/3

Timer 2l timer loi B v Timer3l timer loi C.

Module Timer 2/3 l timer 32-bit, chng c th thit lp thnh 2 timer 16-bit,vi s chn la ch hot ng. Timer ny c th c dng bi thit b ngoi vikhc nh l :

Input Capture

Output Compare/Simple PWM

Timer 32-bit c cc ch sau :

timer 16-bit c lp (Timer2 v Timer3) vi tt c cc ch ca 1timer 16-bit(ngoi tr ch m khng ng b)

Hot ng nh 1 timer n 32-bit

B m ng b n 32-bit

Ngoi ra c tnh hot ng ca n c h tr:

ADC Event Trigger

Timer gate Operation

Thit lp ch prescaler

S hot ng ca timer trong ch Idle v Sleep

Ngt trn thanh ghi chu ky match 32-bit

Cc ch hot ng ca ca chng c quyt nh bi vic thit lp cc bit

tng ng trn cc thanh thi 16-bit T2CON v T3CON.

- Ch 16-bit: ch ny, timer2 v timer3 c th c cu hnhthnh 2 timer 16-bit c lp. Mi timer c th c thit lp hoc ltimer 16-bit hoc l ch m ng b 16-bit. Ch c s khc nhaugia timer2 v timer3 l timer2 cung cp s ng b cho ng ra xungclock prescaler. iu ny c s dng cho ng vo xung clockngoi tng s cao.

- Ch 32-bit timer: trong ch ny, timer tng gi tr bin mmi chu k lnh m ln n gi tr match, t trc gi tr 32-bit

vo thanh ghi PR3/PR2, sau n reset v 0 v tip tc. Cho vicc ng b 32-bit ca cp timer2/timer3, vic c LS word(thanhghi TMR2) s lm cho MS word c c v cht ti thanh ghi gi

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16-bit(TMR3HLD). Cho vic ghi gi tr m ng b, thanh ghi giTMR3HLD phi c ghi u tin. Khi cho php ghi n thanh ghiTMR2, ni dung trong thanh ghi TMR3HLD s c chuyn v chtmMSB ca timer 32-bit.

- Ch m ng b 32-bit, trong ch ny timer tng gi tr bin

m trn mi cnh ln ca xung clockngoi, xung ny c ng bvi xung clock ni. Timer m n gi tr match c t trc trongthanh ghi PR3/PR2, sau c reset n 0v tip tc.

Hnh 3. 5S khi ca module TIMER2/3 32-bit3.9 Module Timer4/Timer5

Tng t vi module timer2/timer3.

3.10 Module giao tip m Encoder(QEI)

Module QEI cung cp giao tip vi loi encoder incremental cung cp d liuv v tr. c im ca b QEI bao gm:

knh ng vo cho 2 pha tn hiu A/B v 1 cho knh Z

B m v tr 16-bit Xc nh hng m

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Ch o lng v tr (x2v x4)

Lc nhiu ng vo

S thay i gia 2ch 16-bit timer/counter

Ngt QEI

Hnh 3. 6S khi ca module giao tip ENCODER

3.10.1 Blogic QEI

Loi encoder incremental c 3 ng ra: pha A, pha B, v index pulse(knh Z). 2knh, pha A/B th c mi lin h vi nhau. Nu pha A trc pha B th hng camotor th c cho l chiu dng hoc thun. Nu pha B trc ta c trng hpngc li.

Knh Z, chi xut hin khi quay c 1 vng.

3.10.2 Ch m v tr16-bit Up/Down

B m 16-bit Up/Down m ln hoc xung mi khi c xung m, v n nhnbit s khc nhau gia 2 pha A v B xc nh hng m. Hng m c xcnh bi bit UPDN, n cpht bi b QEI.

Bit cho php reset POSRES iu khin c hay khng reset v tr m khixung index th cpht hin. Bit ny ch c s dng khi QEIM=100 hoc

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110. Nu bit POSRES th c t gi tr 0, th b m v tr s khng reset khi xungindex c phat hin. B m v tr s vn m tip tc ln hoc xung v s b resetbi iu kin khc. Cc bit IMV chophp ngi s dng thit lp iu kin dreset thanh ghi POSCNT

3.10.3 Ch o v tr

Nhng ch ny c thit lp bi cc bit QEIM:

111= cho php QEI hot ng vi ch x4 vi b m v tr reset bimatch(MAXCNT)

110= chophp QEI hot ng vi ch x4 vi b m v tr reset index pulse

101= cho php QEI hot ng vi ch x2 vi b m v tr reset bimatch(MAXCNT)

100= chophp QEI hot ng vi ch x2 vi b m v tr reset index pulse

011= khng s dng010= khng s dng

001= bt timer 16-bit

000= QEI/timer off

3.10.4 Kh nng lc nhiu:

Bng cch thit lp cc bit QECK , QEOUT c th cho tn hiu ng ra sch.

3.10.5 Bin i timer/counter 16-bit

Khi module QEI c thit lp cho ch QEI, mo dule c th c thit lpnh 1 mu 16-bit timer/counter. Thit lp v iu khin timer ph c thc hinbng thanh ghi QEICON SFR. QEA c s dng nh l ng vo xung clock timer.Hm timer ny khaibo n timer1.

Khi thit b c xem nh mt timer, thanh ghi POSCNT s tr thanh thanhghi cha gi tr timer v MAXCNT s tr thnh thanh ghi Period. Khi mt match xuthin cngt QEI s cpht.

3.10.6 Module QEIhot ng trong trng thi Sleep ca CPU

QEI s vn hot ng khi CPU trng thi Sleep, nhng timer th khng vxung clock ni khng hot ng.

3.10.7 QEIhot ng trong tr ng thi Idle ca CPU

Khi CPU trang thai idle, module QEI sehoa t ng nu bi t QEISIDL=0. T ngtvi ch timer

3.10.8 Ngt QEI

B QEI s pht ra mt ngt khi xut hin nhng s kin sau:

Ngt trn b m v tr 16-bit khi rollover/underflow D tm xung index hoc nu bit CNTERR c set

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S kin matchTimer period

S kin Gate accumulation

3.11 Module iu khin PWM ng c

y l module n gin ha ca b pht nhiu ng ra iu ch rng xung.

Cc loi ngun sau v dng iu khin chuyn ng c p dng m module PWMh tr:

ng c 3 pha AC

Motor t tr ng ngt

Motor khng chi than DC

B chng ngt ngun (UPS)

Module PWM c cc c im sau:

6 chn I/O PWM vi 3 b pht xung khc nhau Ln n 16-bit

Thay i tng s PWM On-the-fly

Ch ng ng ra ging cnh v im gia

Ch pht xung n

H trngt cho Update bt i xng ch ging im gia

iu khin ghi ng ra cho hot ng ECM

S kin c bit so snh s kin ngoi vi khc

Chn FAULT chn la li mi chn ng ra PWM

Module ny cha 3 b pht xng c lp, c s t 1 n 3. Module c 6 ng raPWM, c nh s PWM1H/PWM1L n PWM3H/PWM3L. 6 chn I/O c nhmthnh cc cp high/low. ch ti b, chn low PWM th lun lun b cho chnp ng I/O high.

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Hnh 3. 7S khi ca module PWM

3.11.1C sthi gian PWM

C s thi gian PWM th c cung cp bi 1 timer 15-bit vi 1 prescaler vpostscaler. Bit PTMR l bit trng thi ch c, PTDIR, ch nh ny xc nhhng m hin ti ca c s thi gian PWM. Nu bit PTDIR th b xa, PTMR sm ln. Nu PTDIR c st, th PTMR s m xung. C s thi gian PWM ccu hnh qua thanh ghi PTCON SFR. B time base c cho php hay khng cho

php bi vic set/clear bit PTEN trn thanh ghi PTCON SFR. PTMR th khngb xakhi bit PTENb xa trong phn mm.

Thanh ghi PTPER SFR thit lp chu k m cho PTMR. Ngi s dng phighi gi tr 15-bit n PTPER. Khi gi tr trong PTMR match gi tr

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trong PTPER, time base s hoc reset n 0 hoc o ngc hng m chuk xung clock xut hin k tip.

Lu : nu thanh ghi Period th c set n 0x0000, timer s dng m, vngt v kchpht s kin c bit s khng cpht, thm ch nu gi tr s kin cbit cng l 0x0000. Module s khng update thanh ghi period, nu n sng sng

0x0000; v vy ngi s dngphi disable module lnh update thanh ghi period.B c s thi gian PWM c th c cu hnh cho 4 ch hot ng khc

nhau:

Ch chy t do

Ch single shot

Ch m lin tc up/down

Ch m lin tc up/down vi ngt cho 2 ln update

4 ch ny c chn bi cc bit PTMOD trong thanh ghi PTCON.Ch m up/down h trb pht PWM ging im gia. Ch single shot cho

php module PWM h tr iu khin xung ca ECMs.

Ch chy t do (Free running): ch ny, b time base PWM mln cho n khi gi tr trong thanh ghi PTPER c match. Thanh ghi PTMRth reset bng cnh xung clockng vo v time base s tip tc m ln min l

bit PTEN c set. Khi c s thi gian PWM ch Free running(PTMOD =00), 1 s kin ngt s cpht mi ln match vi thanh ghiPTPERxut hin v thanh ghi PTMR th c reset n 0. Cc bit postscalerc chn s dng trong ch ny s gim tng s s kin ngt.

Ch Single Shot: b c s thi gian PWM bt u m ln khi bitPTEN set. Khi gi tr trong thanh ghi PTMR match thanh ghi PTPER, thanhghi PTMR s reset bng cnh xung clockng vo v bit PTEN s c xa biphn cng n na time base. Khi c s thi gian PWM ch ny(PTMOD=01), mt s kin ngt c pht khi 1 match vi thanh ghiPTPER xut hin, thanh ghi PTMR c reset bng cnh xung clockng vo,v bit PTEN c xa. Chon la cc bit postscaler khng nh hng n ch ny ca timer.

Ch m lin tc Up/Down (continous up/down counting mode):

trong ch ny b c s thi gian PWM m ln cho n khi gi tr trongthanh ghi PTPER c match. Timer s bt u m xung cnh xung clockk tip. Bit PTDIR trong thanh ghi PTCON ch c c v ch nh hngm. Bit PTDIR c set khi timer m xung. Trong ch m up/down(PTMOD=10), 1 s kin ngt c pht mi khi gi tr trong thanh ghiPTMR trv 0 v time base PWM m ln tr li. Vic la chn cc bit iukhin postscaler c th c s dng trong ch ny gim tng s s kinngt.

Ch update kp (double update mode): trong ch ny(PTMOD=11), mt s kin ngt th cpht mi ln thanh ghi PTMR=0, tng t nh mi ln chu k match xut hin. Vic chn la cc bitpostscaler khng nh hng n timer ch ny. Ch update kp cung

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cp 2 hm cng thm cho ngi s dng. u tin,bng thng vng iu khinthi c double bi v chu k cng sut PWM c th c cp nht , 2 ln trongmt chu k. K tip, dng sng PWM ging theo im gia bt i xng c thcpht, chng c s dng cho bin dng dng sng ng ra min trongcc ng dng iu khin ng c chc chn.

Prescaler c s thi gian PWM: xung clock ng vo n PTMR(FOSC/4), c cc chn la 1:1, 1:4, 1:16 hoc 1:64, vic chn la c iukhin bi cc bit PTCKPS trn thanh ghi PTCON. Trng thi m

prescaler c xa khi xut hin cc trng hp sau:

- Mt ln ghi ln PTMR

- Mt ln ghi ln PTCON

- Reset thitb

Postscaler c s thi gian PWM: match ng ra c th c chn la postscaler bng 4-bit postscaler

3.11.2 Chu kPWM

Thanh ghi 15-bit PTPER v c s dng set chu k m cho c s thigian PWM. PTPER l mt thanh ghi m kp. Ni dung m PTPER th c ti vothanh ghi PTPER ti nhng trng hp sau:

Ch Free Running v Single Shot: khi thanh ghi PTMR th resetn 0 sau khi match vi thanh ghi PTPER.

Ch Up/Down couting: Khi PTMR c reset.

Gi tr c gi b m PTPER th t ng ti vo thanh ghi PTPER khi cs thi gian PWM th c disable.

Chu k PWM c th c quyt nh bng cch s dng cng thc sau:

TPWM= (3.1)

Nu c s thi gian PWM th c cu hnh cho ch m up/down, chu k

PWM s bng 2 ln cng thc trn.

3.11.3 Ging hng theo cnh

Tn hiu ging theo cnh c cung cp bi module khi c s thi gian PWMth ch Free Running hoc Single Shot.Ng ra PWM ging theo cnh, ng ra cchu k xc lp bi gi tr PTPER v chu k cng sut xc lp bi thanh ghi chu kcng sut.Ng ra ca PWM th c li hot ng ti thi im bt u ca chu k(PTMR=0) v n s dng hot ng khi gii tr trong thanh ghi chu k cng sutmatch PTMR.

Nu gi tr trong thanh ghi chu k cng sut bng 0, dn n p ng ng rachn PWM s ngng hot ng cho nguyn chu k PWM. Thm na, ng ra ca

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PWM s hot ng cho nguyn chu k PWM nu gii tr trong thanh ghi chu k cngsut ln hn gi tr gi trong thanh ghi PTPER

Hnh 3. 8 Xung PWM ging theo cnh

3.11.4 Ging theo im gia

Tn hiu PWM ging im gia c cung cp bi module khi c s thi gianPWM c cu hnh ch m Up/Down.

Ng ra so snh PWM th trng thi hot ng khi gi tr trong thanh ghi chuk cng sut match gi tr ca PTMR v b c s thi gian ang mxung(PTDIR=1).Ng ra s sanh PWM c li n trng thi ngng hotng khib c s thi gian PWM m ln v gi tr trong thanh ghi PTMR match gi tr chu kcng sut.

Nu gii tr trong thanh ghi chu k cng sut l 0, th ng ra p ng chnPWM s ngng hot ng trong nguyn chu k PWM. Ngoi ra, ng ra PWM s hotng trong nguyn chu k nu gii tr trong thanh ghi chu k cng sut tng ngvi gi tr c gi trong thanh ghi PTPER.

Hnh 3. 9 Xung PWM ging theo im gia

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3.11.5 Nhng bso snh thi gian T-on PWM

C 3 thanh ghi lnh 16-bit (PDC1, PDC2, PDC3) c s dng thit lp chuk cng sut cho module PWM.

Gi tr trong thanh ghi chu k cng sut s quyt nh thi gian duy tr trngthi tich cc ng ra PWM. Thanh ghi chu k cng sut c rng 16-bit. Bit LS cathanh ghi chu k cng sut quyt nh c hay khng xut hin cnh PWM trngthi bt u. Vy l phng php PWM c hiu sut gp i.

3.11.6Hot ngb ca PWM

Trong ch hot ngb, mi cp ng ra PWM t c bi tn hiu PWMb. Mt khong thi gian cht c th c chn vo khi chuyn mch thitb, khi mc 2 ng ra u khng hot ng trong 1 giai on ngn.

Trong ch b, b so snh chu k cng sut th c gn cho cc ng raPWM nh sau:

Thanh ghi PDC1iu khin ng ra PWM1H/PWM1L

Thanh ghi PDC2iu khin ng ra PWM2H/PWM2L

Thanh ghi PDC3iu khin ng ra PWM3H/PWM3L

Ch b th c chn cho mi cp chn bng vic xa bit PMODx tng ng trnthan ghi PWMCON1.

3.11.7 B pht thi gian cht

B pht thi gian cht c th c cung cp khi bt k cp chn PWM no hot

ng ch b. Ng ra PWM s dng mch li i xng. S bt lc ca thit bngun ng ra trong vic chuyn mch ngay lp tc, phi mt mt khong thi giangia vic turn off 1ng ra PWM trong 1 cpb v turn on ca transistor khc.

Module PWM cho php lp trnh 2khong thi gian cht. 2khong thi giancht ny c th c s dng 1 trong 2phng php m t bn di tng tnh linhhot cho ngi s dng:

Tn hiu ng ra PWM c th c nh gi khc nhau thi gian turnoff trong transistor high side v low side trong 1 cp b catransistor. Thi gian cht u tin c chn vo gia s kin turn

off ca transistor thp hn ca cp b v s kin turn on catransistor cao hn. Thi gian cht k tip c chn vo gia s kinturn offca transistor cao hn v turn on ca transistor thp hn.

khong thi gian cht c th c phn chia n c 2 chn PWM.Ch hot ng ny cho php module PWM li b transistor/loadkhc vi mi cp chnb PWM.

3.11.8 Ngra PWM c lp

Ch ng ra PWM c lp i hi vic li chc chn loi ca ti. Mt cpng ra PWM ch c lp, khi bit PMOD tng ng trong thanh ghi PWMCON1c set.

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Khng iu khin thi gian cht gia cc chn PWM lin k trong khi modulePWM ang hot ng trong trng thi c lp v c hai chn I/O th c cho phpcng lc.

ch c lp, mi b pht chu k cng sut c kt ni n c hai chnPWM trong mt cp ng ra. Bng cch s dng thanh ghi chu k cng sut cho mi

chn PWM trong ch c lp.

3.11.9 Hot ng PWM xung n

Module PWM iu ch xung n ng ra khi bit iu khin PTMOD=10.Ch ch ging cnh ng ra c th iu ch ch xung n. Trong ch xungn, chn PWM th c li trng thi active khi bit PTEN c set. Khi 1 matchvi thanh ghi chu k cng sut xut hin, chn PWM th s chuyn sang trng thiinactive. Khi mt match vi thanh ghi PTPER xut hin, thanh ghi PTMR s b xa,tt c cc chan PWM s c li sang trng thi inactive nu bit PTENb xa v mtngt cpht.

3.11.10 Tt ngra PWM

Bit ghi ng ra PWM chophp ngi s dng iu chnh li chn PWM ntrng thi logic l thuyt, c lp b so snh chu k cng sut. Tt c cc bt iukhin lin quan n tt ng ra PWM c cha trong thanh ghi OVDCON.

3.11.11Kch pht skin c bit PWM

Module PWM c th kchpht s kin c bit chophp chuyn i A/D ngb vi c s thi gian PWM. Vic ly mu v thi gian chuyn i c th c lp

trnh xut hin ti bt k im no trong chu k PWM. Kchpht s kin c bitcho php ngi s dng minimize khong delay gia thi gian trong khi kt quchuyn i A/D t c v thi gian khi gi tr chu k cng sut c update.

Kch pht s kin c bit PWM co thanh ghi tn SEVTCMP, v 5 bit iukhin hot ng ca n.

3.11.12 Hot ng ca bPWM trong tr ng thi Sleep ca CPU

Ng vo FAULT A cho kh nng nh thc CPU t trng thi Sleep. ModulePWMpht 1 ngt nu chn FAULT chuyn sang mc thp trong khi ang ng.

3.11.13Hot ng ca bPWM trong tr ng thi Idle ca CPUThanh ghi PTCON cha bit iu khin PTSIDL. Bit ny quyt nh nu module

PWM s tip tc hot ng hay dng khi thit b ang trng thi Idle

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CHNG 4

HNG DN S DNG PHN MM MPLAB IDE

4.1 MPLAB IDE overview

Phin bn ny c m rng vi cc i tng MCU PICmicro, file ngun cnc t trong 1 project. Code c th c xy dng da trn vic la chn cc cng cngn ng (assemblers, compilers, linkers, ). Trong MPLAB IDE, vic qun l projectiu khin vic x l ny.

Tt c cc project s c nhng bc c bn sau:

Chn la thitb

Kh nng ca MPLAB IDE thay i tng xng vi thitb c chn la.Vic chn la thitb nn hon thnh trc khi bt u mt project.

To Project

Cng c Project Wizard c th c s dng to Project

Chn la cng c ngn ng

Trong Project Wizard c c phn la chn cng c ngn ng. Trong tutorial ny sdng assembler v linker. Trong cc project khc, chng ta c th chon la dng chngtrinh bin dch hoc cng c ca hng th 3.

t file trong project

2 file cnphi c t trong project, 1 file mu v 1 linker script. C 2cng tn ti trong MPLAB IDE. Rt d chng ta ly 2 file ny.

To code

Mt s code s c add n file mu gi gi tr gia tng ra ngoi 1 portI/O.

Cu trc Project

Project s c to v khi file ngun c t vo m my th chng ta cth chy trn MCU PICmicro c chn.

Test code v mphng

Cui cng code s c test bng chng trnh mphng.

Project wizard s lm n gin ha cc bc trn ca chng ta.

4.2 Chn la thit b

Sau khi ci t MPLAB IDE ta m chng trnh v bt u to mt project mi.

hin th cc menu chon la trong ti liu ny, cc mc chn menu t hng trn trongMPLAB IDE s hin th vi ci tn ging nh sau MenuName>MenuItem. chn

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Select Deviceta chn menuConfigure, ta c th ghi gn li nh sauConfigure>SelectDevice.

ChnConfigure>Select Device. Trong hp thoi Device, chn tn vi iu khinm chng ta ang s dng vi d nh PIC 18F8722t list nu n cha c chn.

Hnh 4.1 Hp thoi chn thit b

Nhng ch th bng mu cho thy cc thnh phn m MPLAB IDE h trcho thit

b ny.

Ch th mu xanh cho bit c h tr y .

Ch th mu xanh cho bit h tr s b cho phn cp nht thm bi cc toolthnh phn c bit khc ca MPLAB IDE. Cc thnh phn vi mu vng thayth cho mu xanh th thng dng l s cp nht sau nu ai cn h trthmphn ny v c hiu nh l mt s hm v hot ng c th khng c khnng thc thi.

Ch th mu cho thy thitb nay khng c h trchc nng .

4.3 To PROJECT

Bc k tip l to 1 project s dng cng c Project Wizard ca MPLAB IDE.Mt Project l cch h thng ha cc file cho vic bin dch v tng hp. Chng ta ss dng nhng khi file n cho Project ny v linker script. Chn Project>ProjectWizard.

T hp thoi Welcome, clickNext> i tip.

Hp thoi k tip chophpbn chn thitb, chng ta hon thnh bc tip theov chc rng thit b c chn y l PIC18F8722. Nu n khng c mc nh,

chng taphi chn t menu rt xung. ClickNext>.

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Hnh 4.2 Hp thoi chn thit b bng cng c Wizard

4.4 Thit lp cng c ngn ng

Bc 2 ca Project Wizard l thit lp cng c ngn ng m chng ta s dng choproject ny. Chn Microchip MPASM Toolsuite trong hp list Active Toolsuite. SauMPASM v MPLINK ta nn hp Toolsuite Contents. Click mt ln nhn thyng dn. Nu MPLAB IDE c install n danh b mc nh, hp ng thc thiMPASM s nm ng dn:

C:\Program Files\Microchip\MPASM Suite\mpasmwin.exe

File lin kt thc thi MPLINK s nm :

C:\Program Files\Microchip\MPASM Suite\mplink.exe

V file th vin thc thi MPLIB s nm :

C:\Program Files\Microchip\MPASM Suite\mplip.exe

Nu n khng hin th ng, s dng nt Browse st ng dn cho chngtrong th mc cha MPLAB IDE.

Hnh 4.3 Hp thoi la chn ngn nglp trnh

Khibn hon thnh, clickNext>.

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4.5 t tn Project

Bc 3 ca wizard chophpbn t tn cho Project v ni t folder. Project muny s c gi l MyProject. S dng nt Browse, chn folder cha project lProject32. ClickNext>.

Hnh 4.4 Hp thoi t tn v ng dn cho project

4.6 Cng thm file vo Project

Bc 4 ca Project Wizard cho php chn file cho project. Mt file ngun nucha c chn chng ta s s dng file mu ca MPLAB IDE. File mu l file n ginc th s dng bt u 1 project. Chng c th thnh phn c bn cho mt file ngun,

c chac nhng thng tin s gip chobn vit v h thng ha code ca mnh. C 1 filemu cho mi MCU PICmicro v thitb dsPIC DSC.

Chn tn file l 8722tmpo.asm. Nu MPLAB IDE c install vi ng dn mcnh, ng dn y ca file s l :

C:\Program Files\Microchip\MPASM

Suite\Template\Object\8722tmpo.asm

Hnh 4.5 Hp thoi chn file mu cho project

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Nhn Add>> di chuyn tn file n panel bn phi, v click ln checkbox tiim bt u ca dng vi tn file c chn copy file n danh mc project.

K tip, add thm file k tip cho project ca chng ta, tp lnh lin kt. C mttp lnh lin kt cho mi thitb. File ny nh ngha cu hnh b nh v tn thanh ghicho cc phn khc nhau. S dng tn file 18F8722. ng dn y l:

C:\Program Files\Microchip\MPASM Suite\LKR\18F8722.lkr

copy tp lnh lin kt ny n project ca chng ta, click ln checkbox.

Hnh 4.6 Hp thoi chn linker script

Chc chn rng hp thoi ca bn trng ging nh trong hnh trn, vi c 2checkbox c check, sau nhn Next> hon thnh Project Wizard.

Hnh cui cng ca Project Wizard l mt bn xc nhn thit b c chn,toolsuite v tn ca project mi.

Hnh 4.7Bng thng bo kt qu ca WIZARD

Sau nhn nt Finish, xem ca s Project Window trn mn hnh MPLAB IDE.N nn ging vi hnh sau. Nu Project Window khng c m, chnView>Project.

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Hnh 4.8 Ca s Project

4.7 Cu trc Project

T menu Project, chng ta c th h thng v lin kt cc file hin hnh. Chngkhng cha c code ca chng ta, nhng chc chn rng project ny c thit lp ng.

xy dng project, chn mt trong cc cch sau:

Project>Build All

Clickphi ln tn project trong ca s project v chn Build All

Click icon Build All trn Project toolbar.

Ca skt qu cho thy kt qu ca tin trnh build. C li bt cbc no hay khng.

List bo co li hnh di s khng cn tr hot ng ca chngtrnh. Chng ch thng bo 1 ch th rng c s c, chng s tip tc cchot ng khc. tt mn hnhbo ng, ta lam theo cch sau:

ChnProject>Build Options>Projectv click ln tab MPASMAssembler.

Chn Output t list rt xung Categories.

Chn Errors only t danh mc rt xung Diagnostic level

Click OK.

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Hnh 4.9 Ca s ng ra

4.8 To code

M file mu trong project bng cch nhn double ln tn trong ca s Project,hoc chn n vi con tr v s dngphi chut a ra ni dung menu

File c mt s ch gii phn m u, v khu vc ny c th c s dng nh lcc ch dn thng tin chun cho phn u ca mt file. By gi bn s b qua phn ny,nhng nubn mun sa i thng tin theo mnh th c th thm vo.

Hnh 4.10 Ni dung file mu

Code trong phn u tin ca file dnh cho phn hm khai bo nh l thit lpngt v cc bit cu hnh trong 1 ng dng. Phn code mi s c t trong file ti imsau nhng khaibo chnh c nh ngha.

Cun xung y ca file.

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Kim tra li h thng ( hp ng ASM) v lin kt cho thitb MCU PICmicroc s dng. ChnProject>Set Language Tool Locations. Click ln hp cng m rng toolsuite MPASM v thc thi. Click MPASM Assembler(mpasmwin.exe) v xem ng dn ca chng trn mn hnh. Nu ng dnng, clickCancel. Nu sai, thay i ng dn v clickOK.

Vi mt cu trc thnh cng, file ng ra cpht bi tool ngn ng s c ti.File ny cha code i tng c th lp trnh cho MCU PICmicro v thng tin sa li vyl m ngun c th sa li v bin ngun c th c theo di thng qua ca s Watch.

Chn cng c m phng ging nh cng c thc thi g li. iu ny c thchin bng cch chnDebugger>Select Tool menu s xung. Sau khi chn MPLAB SIM,chng ta s thy c nhng thay i sau:

1) Thanh trng thi y ca ca s MPLAB IDE nn thay thnh MPLABSIM.

2) Danh mc menu cng thm s xut hin trong menu Debugger.3) Bng cng c cng thm xut hin trn thanh cng c Debug.

4) Mt tab MPLAB SIM c cng thm vo ca s Output.

Hnh 4.13 Thanh cng c MPLAB SIM

K tip, chnDebugger>Reset>Processor Reset v mt mi tn xanh cho thyni chng trnh bt u.

xem tng bc thc thin trong chng trnh, chnDebugger>Step Into. iuny s thc thi tng dng lnh v di chuyn mi tn n dng k tip thc thi.

y l cc menu tt thng s dng trong cng c Debug.

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Bng 4.1Cc thanh cng c ca menu debug

K tip, nhn chn icon Step Into hoc chnDebugger>Step Into kim tra tngbc trong m chnh.

thy c cc bin trong chng trinh hay cc thanh ghi thay i nh th nokhi chy cc m lnh ta c th bt ca s Watch theo di bn cch chnView>Watch,khi mt ca s trng s xut hin. C 2 thanh ko xung nmpha trn cng ca cas Watch. Ci bn tri c nhn Add SFR c ths dng cng thm cc thnh ghilnh c bit, v d nh y ta chn PORTC. theo di cc bin ta s dng thanh bn

phi c nhn l Add Symbol. V d ta chn bin COUNT. Sau khi la chn cc bin vthanh ghi cn quan st ta c bng kt qu sau.

Hnh 4.14 Bng theo di cc gi tr khi chy m phng