29
FPCCD Flavor Tagging C. Calancha 1 , A. Dubey 2 , H. Ikeda 3 , A. Ishikawa 2 , S. Ito 2 , E. Kato 2 , A. Miyamoto 1 , T. Mori 4 , H. Sato 5 , T. Suehara 6 , Y. Sugimoto 1 , J. Strube 2 , H. Yamamoto 2 1 High Energy Accelerator Research Organization 2 Tohoku University 3 Institute of Space and Astronautical Science, JAXA 4 University of Tokyo 5 Shinshu University 6 Kyushu University

FPCCD Flavor Tagging · 80% efficiency c-tag purity @ 60% efficiency CMOS DBD - 82.8% 56.4% CMOS DBD + 30.4% 20.0% CMOS FPCCD TF - 83.0% 58.1% CMOS FPCCD TF + 40.8% 22.8% FPCCD FPCCD

  • Upload
    others

  • View
    2

  • Download
    0

Embed Size (px)

Citation preview

Page 1: FPCCD Flavor Tagging · 80% efficiency c-tag purity @ 60% efficiency CMOS DBD - 82.8% 56.4% CMOS DBD + 30.4% 20.0% CMOS FPCCD TF - 83.0% 58.1% CMOS FPCCD TF + 40.8% 22.8% FPCCD FPCCD

FPCCD Flavor Tagging C. Calancha1, A. Dubey2, H. Ikeda3, A. Ishikawa2, S. Ito2 , E. Kato2,

A. Miyamoto1, T. Mori4, H. Sato5, T. Suehara6, Y. Sugimoto1, J. Strube2,

H. Yamamoto2

1High Energy Accelerator Research Organization 2Tohoku University

3Institute of Space and Astronautical Science, JAXA 4University of Tokyo 5Shinshu University 6Kyushu University

Page 2: FPCCD Flavor Tagging · 80% efficiency c-tag purity @ 60% efficiency CMOS DBD - 82.8% 56.4% CMOS DBD + 30.4% 20.0% CMOS FPCCD TF - 83.0% 58.1% CMOS FPCCD TF + 40.8% 22.8% FPCCD FPCCD

Introduction: Vertex detector

ILC beams:

resolution (µm) # BX readout

layer FPCCD CMOS FPCCD CMOS

1 1.4 2.8 1312 90

2 1.4 6.0 1312 18

3 2.8 4.0 1312 180

4 2.8 4.0 1312 180

5 2.8 4.0 1312 180

6 2.8 4.0 1312 180

ILD Vertex Detector:

3 double layers

Page 3: FPCCD Flavor Tagging · 80% efficiency c-tag purity @ 60% efficiency CMOS DBD - 82.8% 56.4% CMOS DBD + 30.4% 20.0% CMOS FPCCD TF - 83.0% 58.1% CMOS FPCCD TF + 40.8% 22.8% FPCCD FPCCD

Introduction: Flavor Tagging

physics requirements

Excellent flavor tagging requirements of b and c jets put a tight constraint on

the spatial resolution and material budget of the vertex detector

Page 4: FPCCD Flavor Tagging · 80% efficiency c-tag purity @ 60% efficiency CMOS DBD - 82.8% 56.4% CMOS DBD + 30.4% 20.0% CMOS FPCCD TF - 83.0% 58.1% CMOS FPCCD TF + 40.8% 22.8% FPCCD FPCCD

Setup

● CMOS + DBD tracking

● CMOS + FPCCD tracking

● FPCCD + FPCCD tracking

2000 Events

Z → bb, cc, uds @ 250 GeV, including

one bunch train of pair background

LCFIPlus trained on 14000 events without

background

layer FPCCD CMOS

1 1312 90

2 1312 18

3 1312 180

4 1312 180

5 1312 180

6 1312 180

# of BX per readout

Page 5: FPCCD Flavor Tagging · 80% efficiency c-tag purity @ 60% efficiency CMOS DBD - 82.8% 56.4% CMOS DBD + 30.4% 20.0% CMOS FPCCD TF - 83.0% 58.1% CMOS FPCCD TF + 40.8% 22.8% FPCCD FPCCD

Digitization

Sensitive layer: 15 µm

Total thickness: 50 µm

Pixel size:

5 µm x 5 µm

10 µm x 10 µm

Digitization of GEANT4 energy depositions based on

track path in material and Landau distribution

Digitization for both signal and background in FPCCD

Page 6: FPCCD Flavor Tagging · 80% efficiency c-tag purity @ 60% efficiency CMOS DBD - 82.8% 56.4% CMOS DBD + 30.4% 20.0% CMOS FPCCD TF - 83.0% 58.1% CMOS FPCCD TF + 40.8% 22.8% FPCCD FPCCD

Reminder: FPCCD Tracking

All Silicon Tracking modified

to cope with pair background

in FPCCD vertex detector:

- Kalman filter

- Flexible rather than fixed

window for extrapolation

→ Increases all-silicon tracking efficiency

Details presented at LCWS13

Page 7: FPCCD Flavor Tagging · 80% efficiency c-tag purity @ 60% efficiency CMOS DBD - 82.8% 56.4% CMOS DBD + 30.4% 20.0% CMOS FPCCD TF - 83.0% 58.1% CMOS FPCCD TF + 40.8% 22.8% FPCCD FPCCD

Performance with and without pair

background

● FPCCD TrackFinder outperforms current DBD tracking

● Time stamping is an important ingredient in background

suppression

Page 8: FPCCD Flavor Tagging · 80% efficiency c-tag purity @ 60% efficiency CMOS DBD - 82.8% 56.4% CMOS DBD + 30.4% 20.0% CMOS FPCCD TF - 83.0% 58.1% CMOS FPCCD TF + 40.8% 22.8% FPCCD FPCCD

Degradation by pairs

Techology tracking pair

s

b-tag purity @

80%

efficiency

c-tag purity @

60% efficiency

CMOS DBD - 82.8% 56.4%

CMOS DBD + 30.4% 20.0%

CMOS FPCCD TF - 83.0% 58.1%

CMOS FPCCD TF + 40.8% 22.8%

FPCCD FPCCD TF - 85.5% 63.9%

FPCCD FPCCD TF + 21.5% 18.7%

Page 9: FPCCD Flavor Tagging · 80% efficiency c-tag purity @ 60% efficiency CMOS DBD - 82.8% 56.4% CMOS DBD + 30.4% 20.0% CMOS FPCCD TF - 83.0% 58.1% CMOS FPCCD TF + 40.8% 22.8% FPCCD FPCCD

Pt-distribution of tracks in b-jets FPCCD vertex detector, FPCCDTrackFinder

Track requirement: #SIT hit >= 1 || TPC hit >= 10 || |cosθ| > 0.9

→ most tracks from pairs don’t have SIT or TPC hits

→ signal tracks with coverage |cosθ| > 0.9 don’t have those hits, either

red: all tracks

blue: tracks with purity > 0.75

black: tracks with purity ∈ [0, 0.75]

b-tag purity: 85.5%

@ 80% efficiency

b-tag purity: 84.1%

@ 80% efficiency

Page 10: FPCCD Flavor Tagging · 80% efficiency c-tag purity @ 60% efficiency CMOS DBD - 82.8% 56.4% CMOS DBD + 30.4% 20.0% CMOS FPCCD TF - 83.0% 58.1% CMOS FPCCD TF + 40.8% 22.8% FPCCD FPCCD

Pt-distribution of tracks in b-jets

with pair background

red: all tracks

blue: tracks with purity > 0.75

black: tracks with purity ∈ [0, 0.75]

purple: pair background

b-tag purity: 21.5%

@ 80% efficiency

b-tag purity: 67.8%

@ 80% efficiency

Pair background increases number of tracks with low purity

Track requirements reduce pair background, but not these low quality tracks

Page 11: FPCCD Flavor Tagging · 80% efficiency c-tag purity @ 60% efficiency CMOS DBD - 82.8% 56.4% CMOS DBD + 30.4% 20.0% CMOS FPCCD TF - 83.0% 58.1% CMOS FPCCD TF + 40.8% 22.8% FPCCD FPCCD

Performance with pairs after track

selection

FPCCD CMOS

Track requirement recovers largely performance without pair background

CMOS advantage comes from time stamping capability

disclaimer: LCFI+ performance in

forward region not optimized,

background not overlaid in FTD

Page 12: FPCCD Flavor Tagging · 80% efficiency c-tag purity @ 60% efficiency CMOS DBD - 82.8% 56.4% CMOS DBD + 30.4% 20.0% CMOS FPCCD TF - 83.0% 58.1% CMOS FPCCD TF + 40.8% 22.8% FPCCD FPCCD

Flavor Tagging Performance

Summary

Technology Tracking pairs Track

Requirement

b-tag purity

@ 80% effficiency

c-tag purity

@ 60% effficiency

CMOS DBD - - 82.8% 56.4%

CMOS DBD + - 30.4% 20.0%

CMOS FPCCD - - 83.0% 58.1%

CMOS FPCCD - + 82.9% 57.4%

CMOS FPCCD + - 40.8% 22.8%

CMOS FPCCD + + 77.6% 49.4%

FPCCD FPCCD - - 85.5% 63.9%

FPCCD FPCCD - + 84.1% 65.5%

FPCCD FPCCD + - 21.5% 18.7%

FPCCD FPCCD + + 67.8% 41.6%

Page 13: FPCCD Flavor Tagging · 80% efficiency c-tag purity @ 60% efficiency CMOS DBD - 82.8% 56.4% CMOS DBD + 30.4% 20.0% CMOS FPCCD TF - 83.0% 58.1% CMOS FPCCD TF + 40.8% 22.8% FPCCD FPCCD

CPU and Memory use

Tracking Algorithm

CPU time (s)

Memory

Technology pairs Silicon Full (GB / evt)

CMOS DBD - 0.2 1.1 408.7

CMOS DBD + 342.0 6.8 561.5

CMOS FPCCD TF - 7.2 1.0 619.5

CMOS FPCCD TF + 34.0 3.0 709.6

FPCCD FPCCD TF - 5.6 1.0 623.0

FPCCD FPCCD TF + 407.6 27.7 2276.0

Values are mean of 2000 events of Z → bb at 250 GeV

Page 14: FPCCD Flavor Tagging · 80% efficiency c-tag purity @ 60% efficiency CMOS DBD - 82.8% 56.4% CMOS DBD + 30.4% 20.0% CMOS FPCCD TF - 83.0% 58.1% CMOS FPCCD TF + 40.8% 22.8% FPCCD FPCCD

Code Development

● FPCCD code is running in Coverity Code

Analyzer o reports on memory leaks: new without delete o checks for data corruption:int x[3]; int y=x[3]; o http://coverity.cern.ch/ needs CERN account

● FPCCD code is running in Intel VTunes

Suite o reports bottlenecks in CPU, Memory consumption

o https://twiki.cern.ch/twiki/bin/view/Openlab/IntelTools

needs CERN account

Page 15: FPCCD Flavor Tagging · 80% efficiency c-tag purity @ 60% efficiency CMOS DBD - 82.8% 56.4% CMOS DBD + 30.4% 20.0% CMOS FPCCD TF - 83.0% 58.1% CMOS FPCCD TF + 40.8% 22.8% FPCCD FPCCD

Profiling

Using the Intel VTunes installed at CERN Function Module CPU HelixClass_double::Initialize_Canonical libMarlinUtil.so.1.5 411.666 HelixClass_double::getDistanceToPoint libMarlinUtil.so.1.5 257.823 FPCCDSiliconTracking_MarlinTrk::AttachRemainingVTXHitsSlow libMarlinTrkProcessors.so 131.087 MarlinTrk::HelixFit::fastHelixFit libMarlinTrk.so.1.10 88.044 TrackerHitExtended::getTrackerHit libMarlinUtil.so.1.5 49.421 TStopwatch::GetCPUTime libCore.so.5.28 41.471 FPCCDSiliconTracking_MarlinTrk::TestTriplet libMarlinTrkProcessors.so 30.109 IMPL::TrackerHitPlaneImpl::getCellID0 liblcio.so.2.3.1 19.076 [[vsyscall]] [vsyscall] 5.420 FPCCDSiliconTracking_MarlinTrk::ProcessOneSector libMarlinTrkProcessors.so 4.031 operator<<unsigned int, unsigned int> libMarlinReco.so 3.433 HelixClass::Initialize_Canonical libMarlinUtil.so.1.5 2.864 SIO_stream::write libsio.so.2.3.1 2.620

Page 16: FPCCD Flavor Tagging · 80% efficiency c-tag purity @ 60% efficiency CMOS DBD - 82.8% 56.4% CMOS DBD + 30.4% 20.0% CMOS FPCCD TF - 83.0% 58.1% CMOS FPCCD TF + 40.8% 22.8% FPCCD FPCCD

Summary and Outlook

Technology Tracking pairs Track

requirement

b-tag purity

@ 80% eff.

c-tag purity

@ 60% eff.

CMOS DBD + - 30.4 20.0

CMOS FPCCD TF + + 77.6 49.4

FPCCD FPCCD TF + + 67.8 41.6

Flavor tagging performance is degraded by pair

background events

Track requirement reduces tracks from pair background

Current status of flavor tagging performance is as follows

FPCCDTrackFinder with Track requirement reduces CPU time and greatly

increases flavor tagging performance in presence of background

More work needed on algorithm development and background mitigation

Page 17: FPCCD Flavor Tagging · 80% efficiency c-tag purity @ 60% efficiency CMOS DBD - 82.8% 56.4% CMOS DBD + 30.4% 20.0% CMOS FPCCD TF - 83.0% 58.1% CMOS FPCCD TF + 40.8% 22.8% FPCCD FPCCD

Thank you for your

attention

Page 18: FPCCD Flavor Tagging · 80% efficiency c-tag purity @ 60% efficiency CMOS DBD - 82.8% 56.4% CMOS DBD + 30.4% 20.0% CMOS FPCCD TF - 83.0% 58.1% CMOS FPCCD TF + 40.8% 22.8% FPCCD FPCCD

Backup

Page 19: FPCCD Flavor Tagging · 80% efficiency c-tag purity @ 60% efficiency CMOS DBD - 82.8% 56.4% CMOS DBD + 30.4% 20.0% CMOS FPCCD TF - 83.0% 58.1% CMOS FPCCD TF + 40.8% 22.8% FPCCD FPCCD

Future Plans

CPU time and memory consumption are

problematic for reconstruction with pair BG

→ Too many ghost tracks created

Study algorithms to reduce background and

try to improve tracking algorithm

Page 20: FPCCD Flavor Tagging · 80% efficiency c-tag purity @ 60% efficiency CMOS DBD - 82.8% 56.4% CMOS DBD + 30.4% 20.0% CMOS FPCCD TF - 83.0% 58.1% CMOS FPCCD TF + 40.8% 22.8% FPCCD FPCCD
Page 21: FPCCD Flavor Tagging · 80% efficiency c-tag purity @ 60% efficiency CMOS DBD - 82.8% 56.4% CMOS DBD + 30.4% 20.0% CMOS FPCCD TF - 83.0% 58.1% CMOS FPCCD TF + 40.8% 22.8% FPCCD FPCCD
Page 22: FPCCD Flavor Tagging · 80% efficiency c-tag purity @ 60% efficiency CMOS DBD - 82.8% 56.4% CMOS DBD + 30.4% 20.0% CMOS FPCCD TF - 83.0% 58.1% CMOS FPCCD TF + 40.8% 22.8% FPCCD FPCCD
Page 24: FPCCD Flavor Tagging · 80% efficiency c-tag purity @ 60% efficiency CMOS DBD - 82.8% 56.4% CMOS DBD + 30.4% 20.0% CMOS FPCCD TF - 83.0% 58.1% CMOS FPCCD TF + 40.8% 22.8% FPCCD FPCCD
Page 25: FPCCD Flavor Tagging · 80% efficiency c-tag purity @ 60% efficiency CMOS DBD - 82.8% 56.4% CMOS DBD + 30.4% 20.0% CMOS FPCCD TF - 83.0% 58.1% CMOS FPCCD TF + 40.8% 22.8% FPCCD FPCCD

From T. Mori

Page 26: FPCCD Flavor Tagging · 80% efficiency c-tag purity @ 60% efficiency CMOS DBD - 82.8% 56.4% CMOS DBD + 30.4% 20.0% CMOS FPCCD TF - 83.0% 58.1% CMOS FPCCD TF + 40.8% 22.8% FPCCD FPCCD
Page 27: FPCCD Flavor Tagging · 80% efficiency c-tag purity @ 60% efficiency CMOS DBD - 82.8% 56.4% CMOS DBD + 30.4% 20.0% CMOS FPCCD TF - 83.0% 58.1% CMOS FPCCD TF + 40.8% 22.8% FPCCD FPCCD
Page 28: FPCCD Flavor Tagging · 80% efficiency c-tag purity @ 60% efficiency CMOS DBD - 82.8% 56.4% CMOS DBD + 30.4% 20.0% CMOS FPCCD TF - 83.0% 58.1% CMOS FPCCD TF + 40.8% 22.8% FPCCD FPCCD
Page 29: FPCCD Flavor Tagging · 80% efficiency c-tag purity @ 60% efficiency CMOS DBD - 82.8% 56.4% CMOS DBD + 30.4% 20.0% CMOS FPCCD TF - 83.0% 58.1% CMOS FPCCD TF + 40.8% 22.8% FPCCD FPCCD