Design of resistorless low temperature coefficient band gap reference bias circuit

Soniya Gupte , Pradnya Zode Department of Electronics

Yeshwantrao Chavan College of Engineering Nagpur, INDIA

E-mail: soniya.srknec@gmail.com , pradnya.u@rediffmail.com

Abstract— This paper describes a new band-gap reference (BGR) without resistors that can be fabricated in a 0.35μm technology. The differential amplifier is used to reduce the current mirror errors dependent on the supply voltage and temperature, so as to produce a temperature insensitive gain applied to the proportional to absolute temperature (PTAT) term in the reference. The simulation result indicates that the proposed BGR circuit has low temperature coefficient (TC) Results demonstrate that the bias voltage 1.24V has shown only 8 mV variation over the temperature range 0 to 110℃. The supply voltage used is 2.72V.

Keywords- BGR; resistor less; start up; reference circuits.

I. INTRODUCTION BGR is one of the most important circuits in all mixed signal and radio-frequency systems. It is not possible to make a precise conversion if the voltage reference is not constant. Generic mixed-signal systems have more than one voltage reference as a result different voltage references are necessary. All of them need a constant and accurate reference supply to achieve accurate data conversion. The most often used bandgap voltage reference circuits use BJT or parasitic BJT in CMOS process, as well as op-amp. In order to generate a quantity that remains constant with temperature, we postulate that if two quantities having opposite temperature coefficients (TCs) are added with proper weighting, the result displays a zero TC [1]. For example, for two voltages V1 and V2 that vary in opposite direction with temperature, we choose α1 and α2 such that

αδVδT α

δVδT 0

Obtaining a reference voltage V α V α V With zero temperature coefficient. [1] The present design incorporated here doesn’t use resistor because of a number of reasons. In digital technologies, models for the resistor may not be available or may be unreliable. Also, because of silicide used to reduce the sheet resistance of the polysilicon, the areas of resistors are increased. The silicide can be blocked using a mask but this

increases the cost. Hence, a circuit solution to this is to use a bandgap reference without resistors [3]. The design uses MOS transistors in saturation or cut-off. The circuit can operate with supply voltage 2.72V and between 0° C to 110° C. Negative-TC Voltage concept The base-emitter voltage of bipolar transistors or, more generally, the forward voltage of a pn-junction diode exhibits a negative TC. For a bipolar device, we can write IC=IS exp ( VBE/VT), where VT=KT/q. The saturation current IS is proportional to µKTni

2, where μ denotes the mobility of minority carriers and is the intrinsic minority carrier concentration of silicon. The temperature dependence of these quantities is represented as μ∝µ0Tm where m ≈ -3/2 and ni

2 ∝T3exp[-Eg/(KT)], where Eg ≈ 1.12 eV is the Bandgap energy of silicon. VBE itself depends on the temperature, creating error in constant reference generation if the positive-TC quantity exhibits a constant temperature coefficient [1]. Positive-TC Voltage concept If two bipolar transistors operate at unequal current densities, then the difference between their base-emitter voltages is directly proportional to the absolute temperature. As shown in Figure 1 if two identical transistors (IS1=IS2) are biased at collector currents of nI0 and I0 and their base currents are negligible, then ∆ ln Thus, the difference exhibits a positive temperature coefficient, given by: ∆

Interestingly, this TC is independent of the temperature or behavior of the collector currents. The whole concept is valid for MOS also.

2011 International Conference on Communication Systems and Network Technologies

978-0-7695-4437-3/11 $26.00 © 2011 IEEE

DOI 10.1109/CSNT.2011.87

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Figure 1: Generation of PTAT voltage using .

II. CONCEPT The bandgap reference applies a temperature independent gain G of about 3- 6 to the difference between the forward bias voltages across two diodes ΔVD to produce a temperature insensitive output [3]. The required gain is obtained, by using the rationed transistors together with the inverse function technique since no resistors are used. A self-bias configuration is used to increase the supply insensitivity. The basic idea in the inverse function technique is to apply a pair of functions f and fS

-1. to ΔVD so that

fS

-1[f(ΔVD )]=M(ΔVD ) (1)

Also,

fT-1 [Mf(ΔVD )]=M(ΔVD ) (2)

In this equation, using scaled transistor the current i=f(ΔVD ) is multiplied by G in the current domain by a current mirror The scaled current is then converted to the output voltage by a properly selected transresistance fT

-1 which requires less gain but a wider dynamic range. The inverse function technique works with any smooth non-linearity and knowledge of the exact functions is not required as long as it is possible to deduce the proper scaling [4].

Figure 2: Schematic of core circuit of resistorless BGR

III. CORE CIRCUIT Figure 2 shows the core circuitry with diodes D1 and D2 formed using PMOS transistors. The PTAT voltage ΔVD = VD2 - VD1 is applied across the differential pair M1~M2, the resulting current is multiplied by G using current mirror M5~M6 and is delivered to the differential pair M3~M4. Suppose that all the transistors M1~M4 operate in the saturation region, neglecting channel length modulation and body effect, the circuit can be analyzed using a simple square-Law MOS model [2].

We have

VGS2-VGS1= / - / (2)

VGS4-VGS3= / - / (3)

Where kp =μpCox , μp is the mobility of carrier, Cox is the gate oxide capacitance per unit area. In the circuit, (W/L)6 =G(W/L)5, So IDS4= GIDS2 Since IDS2 + IDS1 = IT , IDS4 + IDS3 = GIT

IDS3 = GIT - IDS4 = GIT - GIDS2 = G IDS1

From equations (3) and (4),

VGS2-VGS1= / - / (4)

VGS4-VGS3= / - / (5)

= √ As shown, M1 and M2, M3 and M4 connected in source, we could get the PTAT voltage

=∆ , ∆ = VT ln Where VT is the thermal voltage. Then, Vout = √ ∆

by choosing A, G and n, the zero TC voltage could be achieved at room temperature. Diodes D1 and D2 are

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formed using PMOS transistors. For each of these transistors, the gate, drain and source are connected together. The combined drain-gate source end of D1 is connected to the gate of M1 while, the combined drain gate- source end of D2 is connected to the gate of M2. The bulk of each of the PMOS transistors was connected to ground. This was done because accurate junction’s models are easily accessible.

IV. PROPOSED COMPLETE CIRCUIT

The complete proposed Schematic of the bandgap reference is shown in the Figure 3. The proportional to absolute temperature (PTAT) ΔVD=VD1-VD2 is applied across the differential amplifier pair formed by M1-M2. This pair operates as the transconductance, f. The resulting current is multiplied using current mirror formed by M6-M5 by ‘G’ and is delivered to differential pair formed by M3-M4, which acts as a transresistance fT

-1 because of the negative

feedback loop formed around M3 [3]. To operate both M3 and M4 in saturation, an intentional mismatch is introduced. Thus the aspect ratio (W/L) of M3 and M2 are greater than aspect ratios of M1 and M4.

Figure 3: complete proposed circuit of resistorless BGR

V. STARTUP CIRCUIT

Mostly self-bias circuits, such as bandgaps have two stable operating points. One of the stable operating states is the desired state and the other is typically a zero-current state. To prevent the zero-current state from occurring a start-up circuit is added, which is active during the undesired state and inactive during the desired state. In the proposed circuit the transistors MS1- MS5 forms a start-up circuit. Diode-Connected Transistors (MS1- MS4) form the core of the circuit. When the power supply is given to the circuit, the transistor MS5 turns on and pulls the gate of the transistor M8 up turning on the core of the circuit. After the circuit turns on, the voltage from the gate of M8 to ground rises

high enough to turn off transistor MS5, disconnecting the start-up circuit from the whole.

VI. SIMULATION RESULTS Simulation of proposed resistorless BGR is performed. It was very important for the design to have a portable power source which gives a constant output voltage irrespective of the external environmental and other factors such as temperature, battery drain, loading etc. The chip is designed to give a constant output voltage of 1.24V over the temperature range of 0 to 110 ℃. Figure 4 shows the plot on which temperature is varied on x-axis and output voltage is plotted on y-axis. Figure 5 shows a plot of output voltage with respect to variations in supply voltage.

Figure 4: circuit’s o/p voltage with respect to temperature

Figure 5: output voltage with respect to variation in supply voltage Vdd.

VII. CONCLUSION

The BGR without resistor is proposed and the circuit is simulated with 2.72 v supply voltage using 0.35-μm CMOS process.Temperature sweep is performed and result of output voltage with respect to temperature is obtained. The simulation results indicate that the applying of amplifier improves Power Supply Rejection Ratio and reduces TC effectively.

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VIII. REFRENCES [1] B.Razavi, McGraw- Hill, “Design of Analog CMOS Integrated

Circuits”, 2001. pp. 377–392. [2] Yujiao Zhao, Suge Yue, Qiang Bian. “A Novel Low Temperature

Coefficient Band-gap Reference without Resistors” Proceedings of the International MultiConference of Engineers and Computer Scientists 2008 Vol II IMECS 2008, 19-21 March, 2008, Hong Kong

[3] A.Buck, C. Mc Donald, S. Lewis, T.R. Viswanathan, “A CMOS bandgap reference without resistors”,in Journal of Solid State Circuits, vol. 37, no. 1 January 2002.

[4] Christian Falconi, Giuseppe Scotti, “Low Voltage CMOS Current and Voltage References without Resistors”, May 2007, IEEE, pp.1907-1910.

[5] Ahmet Tekin , Ertan Zencir, et al, “A Bias Circuit Based on Resistorless Bandgap Reference in 0.35-μm SOI CMOS”, vol.1, 149-152, Dec. 2003,IEEE.

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