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© 2013, IJOURNALS All Rights Reserved Page 69 A Hardware/Software Co-Design Architecture Implementation of Canny Edge Detection using FPGA and MATLAB Mallavarapu.Ramu 1 ; T.V.S.Adinarayana 2 M.Tech (Embedded Systems & VLSI) 1 Associate Professor 2 , Dept of ECE 1, 2 , Prakasam engineering college, kandukuru 1, 2 Affiliated to JNTU, Kakinada, Andhra Pradesh, INDIA ABSTRACT Canny edge detection plays an important role in digital image processing and computer vision applications. This algorithm is very complex due to heavy stages like smoothing, gradient calculation, thinning, thresholding, and hysteresis and these steps contain multiplications, divisions and arc tan Processing high quality images in programmable processors such as digital signal processors are slow, multiple processing elements r required. We present the hardware/software co-design architecture of canny edge detection using FPGA and Matlab. The simplified equations of smoothing, gradient calculation, thinning, thresholding for hardware implementation of canny edge algorithm in custom architecture, to efficiently use the hardware resources and improve the average rate of successful message delivery, and some hardware features like pipelining must be employed here the images are converted to Matlab vector by using NTSC standard method or by using Matlab software and the vector is processed on FPGA to get the canny edge Matlab vector. Targeted for spatran3e xilinx14.7, simulated in Modelsim And the mat lab vector is converted into image in mat lab software. General Terms Hardware/software co-design; Image processing; FPGA; Matlab; NTSC; Xilinx 14.7; Modelsim; canny edge detection 1. INTRODUCTION Image edges are useful for image segmentation, pattern recognition, and image categorization because these edges represent the fundamental features of image that gives important information such as direction and shape. The Canny edge detection is an optimized algorithm for precise edge detection especially when signal-to-noise ratio is high. Direct implementation of the canny edge detection results in slow implementation when implemented in a single core processor such as digital signal processors. Recently, several methods to improve canny edge detection have been proposed. Wang and Jin proposed an improved template algorithm that improves the amplitude calculation accuracy. It also has a non-maxima suppression process, where the factor ratio of four quadrants of linear interpolation is improved to achieve better detection results. He and Yuan proposed a new self-adaptive threshold canny algorithm and Zhao et al. build a new model for real- time pavement edge detection. All abovementioned works are either fully in software or hardware. The issue of software implementation is its low speed compared to the hardware however hardware implementation is less flexible compared to the software implementation. This paper proposes hardware/software co-design architecture of canny algorithm. The operations of each step are analyzed to find the time consuming operations. These operations are implemented in hardware and simple operations remain in software which is suitable for resource efficient hardware/software co-design. The hardware/software co-design can speed up processing time. The rest of paper is organized as follows; Section II discusses a brief about canny algorithm and its complexity. Section III describes how canny algorithm is modified to suit hardware implementation. Section IV is about hard- ware/software co-design architecture which explains profiling of the canny algorithm, memory access, performance computation and resource usage. Finally, conclusion is in Section V. 2. Canny Edge Detection The canny edge detector is and edge detection operator that uses multi-stage algorithm to detect a wide range of edges in images. Canny edge detection aim was to discover the optimal edge detection algorithm. In this situation, an "optimal" edge detector has mainly three characteristics. The first characteristic is the SNR which states that important edges should not to be missed, and non- edge points should not be detected to have a high signal-to-noise ratio as much as possible.

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© 2013, IJOURNALS All Rights Reserved

Page 69

A Hardware/Software Co-Design Architecture Implementation of Canny Edge

Detection using FPGA and MATLAB Mallavarapu.Ramu1; T.V.S.Adinarayana2

M.Tech (Embedded Systems & VLSI) 1 Associate Professor2, Dept of ECE1, 2, Prakasam engineering college, kandukuru1, 2

Affiliated to JNTU, Kakinada, Andhra Pradesh, INDIA

ABSTRACT Canny edge detection plays an important role in digital image processing and computer vision applications. This algorithm is very complex due to heavy stages like smoothing, gradient calculation, thinning, thresholding, and hysteresis and these steps contain multiplications, divisions and arc tan Processing high quality images in programmable processors such as digital signal processors are slow, multiple processing elements r required. We present the hardware/software co-design architecture of canny edge detection using FPGA and Matlab. The simplified equations of smoothing, gradient calculation, thinning, thresholding for hardware implementation of canny edge algorithm in custom architecture, to efficiently use the hardware resources and improve the average rate of successful message delivery, and some hardware features like pipelining must be employed here the images are converted to Matlab vector by using NTSC standard method or by using Matlab software and the vector is processed on FPGA to get the canny edge Matlab vector. Targeted for spatran3e xilinx14.7, simulated in Modelsim And the mat lab vector is converted into image in mat lab software.

General Terms

Hardware/software co-design; Image processing; FPGA; Matlab; NTSC; Xilinx 14.7; Modelsim; canny edge detection

1. INTRODUCTION Image edges are useful for image segmentation,

pattern recognition, and image categorization

because these edges represent the fundamental

features of image that gives important information

such as direction and shape. The Canny edge

detection is an optimized algorithm for precise edge

detection especially when signal-to-noise ratio is

high. Direct implementation of the canny edge

detection results in slow implementation when

implemented in a single core processor such as digital

signal processors. Recently, several methods to improve canny edge

detection have been proposed. Wang and Jin

proposed an improved template algorithm that

improves the amplitude calculation accuracy. It also

has a non-maxima suppression process, where the

factor ratio of four quadrants of linear interpolation is

improved to achieve better detection results. He and

Yuan proposed a new self-adaptive threshold canny

algorithm and Zhao et al. build a new model for real-

time pavement edge detection. All abovementioned

works are either fully in software or hardware. The

issue of software implementation is its low speed

compared to the hardware however hardware

implementation is less flexible compared to the

software implementation. This paper proposes

hardware/software co-design architecture of canny

algorithm. The operations of each step are analyzed

to find the time consuming operations. These

operations are implemented in hardware and simple

operations remain in software which is suitable for

resource efficient hardware/software co-design. The

hardware/software co-design can speed up

processing time. The rest of paper is organized as

follows; Section II discusses a brief about canny

algorithm and its complexity. Section III describes

how canny algorithm is modified to suit hardware

implementation. Section IV is about hard-

ware/software co-design architecture which explains

profiling of the canny algorithm, memory access,

performance computation and resource usage.

Finally, conclusion is in Section V.

2. Canny Edge Detection The canny edge detector is and edge detection

operator that uses multi-stage algorithm to detect a

wide range of edges in images. Canny edge detection

aim was to discover the optimal edge detection

algorithm. In this situation, an "optimal" edge

detector has mainly three characteristics.

The first characteristic is the SNR which states that

important edges should not to be missed, and non-

edge points should not be detected to have a high

signal-to-noise ratio as much as possible.

© 2013, IJOURNALS All Rights Reserved

Page 70

The second characteristic indicates that the location

of the detected edge should be as close as the position

of the real edge.

The third characteristic indicates that minimizes the

response to a single edge ensure that edge have single

response.

The detection process of canny algorithm consists of

four steps as shown in figure 1.Each step is explained

separately in the following subsections.

Step 1

The Canny edge detector is susceptible to noise present

in raw unprocessed image data, it uses a filter based on a

Gaussian (bell curve), where the raw image

is convolved with a Gaussian filter. The result is

slightly blurred version of the original which is not

affected by a single noisy pixel to any significant degree.

The larger the width of the Gaussian mask, the lower is the detector's sensitivity to noise. The localization error in the detected edges also increases

Slightly as the Gaussian width is increased. The Gaussian mask used in my implementation is shown below.

G is blurred image vector, I is original image vector, and

3*3 matrix is Gaussian masks. (The asterisk denotes

a convolution operation.)

Figure 1 canny algorithm steps

Step 2(a)

After smoothing the image and eliminating the noise, the next step is to find the edge strength by taking the gradient of the image. The Sobel operator performs a 2-D spatial gradient measurement on an image. Then, the approximate absolute gradient magnitude (edge strength) at each point can be found. The Sobel operator uses a pair of 3x3 convolution masks, one estimating the gradient in the x-direction (columns) and the other estimating the gradient in the y-direction (rows). They are shown below:

-1 0 +1

-2 0 +2

-1 0 +1

TABLE 1 GX & GY

The magnitude, or edge strength, of the gradient is then approximated using the formula:

|G| = |Gx| + |Gy|

Step 2(b)

The direction of the edge is computed using the gradient in the x and y directions. However, an error will be generated when sum X is equal to zero. So in the code there has to be a restriction set whenever this takes place. Whenever the gradient in the x direction is equal to zero, the edge direction has to be equal to 90 degrees or 0 degrees, depending on what the value of the gradient in

the y-direction is equal to. If GY has a value of zero, the edge direction will equal 0 degrees. Otherwise the edge

direction will equal 90 degrees. The formula for finding the edge direction is just

Theta = inv tan (Gy / Gx)

Step 2(c)

Once the edge direction is known, the next step is to relate the edge direction to a direction that can be traced in an image. So if the pixels of a 3x3 image are aligned as follows:

x x x

x a x

x x x

Then, it can be seen by looking at pixel "a", there are only

four possible directions when describing the

surrounding pixels - 0 degrees (in the horizontal

direction), 45 degrees (along the positive diagonal), 90

degrees (in the vertical direction), or 135 degrees

(along the negative diagonal). So now the edge

orientation has to be resolved into one of these four

directions depending on which direction it is closest to

+1 +2 +1

0 0 0

-1 -2 -1

© 2013, IJOURNALS All Rights Reserved

Page 71

(e.g. if the orientation angle is found to be 3 degrees,

make it zero degrees). Therefore, any edge direction

falling within the range (0 to 22.5 & 157.5 to 180

degrees) is set to 0 degrees. Any edge direction falling in

the range (22.5 to 67.5 degrees) is set to 45 degrees.

Any edge direction falling in the range (67.5 to 112.5

degrees) is set to 90 degrees. And finally, any edge

direction falling within the range (112.5 to 157.5

degrees) is set to 135 degrees.

Step 3

After the edge directions are known, non-maximum suppression now has to be applied. Non-maximum suppression is used to trace along the edge in the edge direction and suppress any pixel value (sets it equal to 0) that is not considered to be an edge. This will give a thin line in the output image. As an example, suppose there is a 10 pixel vertical edge With different values from left to right respectively: 70, 80, 80, 100, 100, 100, 80, 80, 70 and all are bigger than TH (high threshold). To have an edge with the width of one pixel, the pixel with maximum value should be chosen and the rest will be eliminated. Here is where the direction of gradient is needed. For 90◦ edge direction, the value of pixels in the same row and neighboring columns are compared. If the value of current pixel is higher than both of the left and the right neighboring pixels, it will be considered as an edge since it is bigger than the TH.

Step 4

Finally, hysteresis is used as a means of eliminating streaking. Streaking is the breaking up of an edge contour caused by the operator output fluctuating above and below the threshold. If a single threshold, T1 is applied to an image, and an edge has an average strength equal to T1, then due to noise, there will be instances where the edge dips below the threshold. Equally it will also extend above the threshold making an edge look like a dashed line. To avoid this, hysteresis uses 2 thresholds, a high and a low. Any pixel in the image that has a value greater than T1 is presumed to be an edge pixel, and is marked as such immediately. Then, any pixels that are connected to this edge pixel and that have a value greater than T2 are also selected as edge pixels. If you think of following an edge, you need a gradient of T2 to start but you don't stop till you hit a gradient below T1.

3. MODIFIED CANNY EDGE DETECTION This section explains how every step of canny algorithm

is simplified to suit hardware implementation.

FIGURE 2 HW implementation of canny edge detection

Smoothing Using Gaussian Filter To smooth an image, it is convolved with Gaussian mask. Fig. 3 shows a graphical concept of the convolution of an Image with Gaussian mask

Where, H(x, y) is filtered image, G(k, l) represents Gaussian kernel, I(k, l) represents original image and 2N +1is kernel size. In this work, the size of Gaussian mask has been chosen equal to 3 × 3 and σ has been set to 16 to remove weak edges and just strong and important edges are maintained. The following Gaussian mask (G) is obtained using Matlab.

I1 I2 I3

I4 I5 I6

I7 I8 I9

Original image 3×3 Gaussian mask H(X, Y) =I1G1+I2G2+I3G3+I4G4+I5G5 +I6G6+I7G7+I8G8+I9G9. By using the following equations we can easily get the smoothed

H1=

By having 15 adders, this pixel can be smoothed in two Cycles. The comparison between two pixels at same location of smoothed images using estimated and non-estimated Gaussian mask for 50 different images has been calculated. Among all 50 images, the maximum difference between two corresponding pixels is four unit of pixel

intensity.

Computing Magnitude and Orientation of Gradient To compute the gradient of an image, Sobel masks shown In Fig. 4 are used to compute the gradient of the image in x and y directions. Sobel also has masks for 45 and 135 Degrees but by using 0 and 90 degrees all edges can be Detected . To compute the gradient of the central pixel (I5), the convolution of the image with Sobel masks

G1 G2 G3

G4 G5 G6

G7 G8 G9

© 2013, IJOURNALS All Rights Reserved

Page 72

should be computed: GX=-I1-(I4<<1)-I7+I3+(I6<<1)+I9 GY=-I1-(I2<<1)-I3+I7+(I8<<1)+I9 For an 8-bit image, Gx and Gy are 11-bit to consider The worst case scenarios. The sign bit of these two registers should be checked in order to take the absolute value. The magnitude may be more than maximum value of 255. Any value greater than this is replaced by 255. If the pixels of a 3x3 image are aligned as follows:

x x x

x a x

x x x

Val= ((GY/GX) <<3)

Direction 0 When (-3<val≤3); 45 When (3<val≤19); 90 When (Val ≤-19 and Val >19); 135 When (-19<Val≤-3); The biggest value for the direction is 135 that needs an 8-bit register. However, directions 45, 90 and 135 can be Replaced by 1, 2 and 3 respectively. In this case only a 2- Bit register is needed. Using the modified arctan,

Thinning and Thresholding These two steps involve the comparisons among central Pixel, corresponding neighbors, TH and TL. These steps can be implemented using comparators and conditional blocks made of multiplexers.

4. HARDWARE/SOFTWARE CO-DESIGN

ARCHITECTURE A. Profiling of Canny Algorithm This project is on Field Programmable Gate Array (FPGA) is a general-purpose device filled with digital logic building blocks. The most primitive FPGA building block is called either a Logic Cell (LC) by Xilinx this building block consists of a look-up table (LUT) for logical functions and a flip-flop for storage. In addition to the LC/LE block, FPGAs also contain memory, clock management, input/output (I/O), and multiplication blocks. For the purposes of this study, LC/LE consumption is used in determining system cost. The test image is stored in memory of the FPGA. 24-bit (three8-bit) sample input image. All execution times are in cycle unit at 50MHz frequency.

HARDWARE SOFTWARE CO-DESIGN ARCHETECTURE OF FINAL DESIGN

Architecture of HW/SW co-design canny edge detection

Fig 4: Top module of canny edge detection

SIMULATION RESULTS

Fig 5: wave form of canny edge detection

© 2013, IJOURNALS All Rights Reserved

Page 73

Original image Output image

Total

logic

elements

Total

combinational

functions

Dedicated

logic

registers

Total

memory

bits

Total

pins

16685 15865 2465 64488 71

Design module resources

APPLICATION OF EDGE DETECTION

Enhancement of noisy images like satellite images, x-ray images and medical images can be made and only the important needful information about the image is taken out. It is also very useful in text detection, mapping of roads. Canny edge detector is used in remote sensing images extensively. The reason to go with canny edge detector is that remote sensed images are inherently noisy and other edge detectors are very sensitive to noise.

CONCLUSION

In the hardware/software co-design architecture of canny edge detection using FPGA and Matlab. The simplified equations for smoothing, gradient calculation, thinning, thresholding in hardware implementation for canny edge algorithm in custom architecture, to efficiently use the hardware resources and improve the average rate of successful message delivery, and some hardware features like pipelining employed here . The total logic elements for final co-design increased about four times of software design but execution time become faster. Output image at least is 24 times smaller than original image.

REFERENCES [1] X. Wang and J. Q. Jin, “An edge detection algorithm based on improved Canny operator,” in Seventh International Conference on Intelligent Systems Design and Applications (ISDA 2007), October 2007, pp. 623–628. [2] http://en.wikipedia.org/wiki/Canny_edge_detector [3] J. Canny, “A computational approach to edge detection,” IEEE Transactions on Pattern Analysis and Machine Intelligence [4] H. Zhao, G. Qin, and X. Wang, “Improvement of Canny algorithm based on pavement edge detection,” in 3rd

International Congress on Image and Signal Processing. [5]www.ijceronline.com/papers/Vol2_issue7/AD02701770181.pdf [6]. Parvinder Singh Sandhu, Mamata Juneja and Ekta Walia “Comparative Analysis of Edge Detectin Techniques for extracting Refined Boundaries” 2009 International Conference on Machine Learning and Computing ,IPCSIT vol 3, 2011. [7]. Wenhao He and Kui Yuan “An Improved Canny Edge Detector and its Realization on FPGA” IEEE Proceedings of the 7th World Congress on Intelligent Control and Automation, Chongqing, China, June 25 - 27, 2008, pp. 6561-6564. [8]. Osman Z.E.M; Hussin ;Ali, N.B.Z “Optimization of Processor Architecture for Image Edge Detection Filter” IEEE transaction on Computer Modelling and Simulation, 2010, pp 648-652. [9]. Alasdair Mc Andrew. “Introduction to Digital Image Processing with MATLAB”. [10]. Gao Jie and Liu Ning “An improved adaptive threshold canny edge detection algorithm”, IEEE International Conference on Computer Science and Electronics Engineering, 2012, pp. 164-168. [11]. Muralikrishna, B.; Gnana Deepika ,K.; Raghu Kanth, B.; Swaroop Vemana, V.G.; “Image Processing using IP Core Generator through FPGA”, International Journal of Computer Applications, vol 46-No.23, May 2012,pp. 48-52. [12]. Enoch Hwang, “Build a VGA Monitor Controller”, Circuit Cellar, Issue 172 , November 2004,pp. 12-17. [13]. Rafael C. Gonzalez, Richard E. Woods. “Digital Image Processing”, Prentice Hall, 2nd edition (January 15, 2002). [14]. S. Varadarajan, C. Chakrabarti, L. J. Karam, and J. M.Bauza, “A distributed psycho- visually motivate Canny edge detector”, IEEE ICASSP, March 2010, pp. 822 –825.