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IMPLEMENTATION OF INTERLEAVED CONVERTER BASED POWER FACTOR CORRECTION FOR D.C DRIVES G. Rajalakshmi #1 , R. Ashok Kumar *2 , K. Asokan #3 #1* Department of Electrical Engineering, Annamalai University, Annamalai Nagar, India 2 Department of Electrical Engineering, Annamalai University, Annamalai Nagar, India 3 Department of Electrical Engineering, Annamalai University, Annamalai Nagar, India e-mail: [email protected], [email protected], [email protected] * Corresponding Author: [email protected], Cel.: +91-8248925296 AbstractThe design of interleaved PFC using low cost microcontrollers is proposed in this paper. An ideal power factor correction circuit should act as a resistive load when seen through the input side. Improved power factor ensures the maximum utilization of real power. An Interleaved converter operating in boost mode is simulated using PID and Neuro-Fuzzy Controller for a D.C motor load. The Sugeno-type fuzzy inference system used in this research is based on the weighted average, to generate the crisp output. This reduces the computation time in real life applications. MATLAB simulation and hardware models are developed to validate the design. Results show that the boost interleaved converter using Neuro-Fuzzy gives low ripple and THD compared to other D.C power supply topologies. KeywordsPower electronic converters, Power factor correction, interleaved buck converter, Neuro-Fuzzy Controller, DC drives I. INTRODUCTION In the past few decades, power electronic converters are dominated for industrial demands and they play a major role in high power equipments for different applications. Use of power electronic converters is ever increasing in the processing of electrical energy in industrial applications such as power generation systems, adjustable speed drives, Electric vehicles (EVs), Hybrid electric vehicles (HEVs), Switched Mode Power Supply (SMPS), Uninterrupted Power Supply (UPS) and other AC utility mains applications. Boost converters are widely used in the low-to-high DC/DC applications. Especially, in the recent years, significant efforts have been made on improving the performance of high-power boost converters [1-6]. Many researchers have proposed various converters and control schemes to minimize the harmonics and switching losses. The switching losses are reduced by using a concept of variable DC link voltage for speed control of BLDC motor [7]. The DC-DC converters have been suggested to reduce the switching losses and to attain high efficiency at increased frequencies [8]. In the case of resonant converters the voltage stress on power switches are subjected to very high voltage stress especially when these comments are used for high voltage applications [9]- [10]. Power factor correction (PFC) converters are proposed to achieve higher power in references [11-13]. A boost PFC converter is a widely adopts configuration for improving the power quality at AC mains of BLDC motor drives [13]. However, this configuration uses a high frequency pulse width modulation (PWM) pulses for controlling the speed of BLDC motor. Therefore, it has high switching losses associated with the VSI and requires two costly current sensors for PWM based current control of BLDC motor [13]. Researchers have worked on ZVS and/or ZCS, so as to reduce the switching losses associated with the high-frequency switching [14-15]. The objective is to reduce input current ripple, reverse recovery loss of the diode and to improve current sharing between the switches and overall efficiency. Nevertheless, fast soft switching, equal current sharing and high efficiency IBC design is still moving on a difficult task International Journal of Research Volume VIII, Issue IV, April/2019 ISSN NO:2236-6124 Page No:1121

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Page 1: IMPLEMENTATION OF INTERLEAVED CONVERTER BASED POWER FACTOR …ijrpublisher.com/gallery/129-april-1020.pdf · An ideal power factor correction circuit should act as a resistive load

IMPLEMENTATION OF INTERLEAVED CONVERTER BASED

POWER FACTOR CORRECTION FOR D.C DRIVES

G. Rajalakshmi #1, R. Ashok Kumar *2, K. Asokan #3

#1*Department of Electrical Engineering, Annamalai University, Annamalai Nagar, India 2 Department of Electrical Engineering, Annamalai University, Annamalai Nagar, India 3 Department of Electrical Engineering, Annamalai University, Annamalai Nagar, India

e-mail: [email protected], [email protected], [email protected]

*Corresponding Author: [email protected], Cel.: +91-8248925296

Abstract— The design of interleaved PFC using low cost microcontrollers is proposed in this paper. An ideal power factor correction

circuit should act as a resistive load when seen through the input side. Improved power factor ensures the maximum utilization of

real power. An Interleaved converter operating in boost mode is simulated using PID and Neuro-Fuzzy Controller for a D.C motor

load. The Sugeno-type fuzzy inference system used in this research is based on the weighted average, to generate the crisp output.

This reduces the computation time in real life applications. MATLAB simulation and hardware models are developed to validate the

design. Results show that the boost interleaved converter using Neuro-Fuzzy gives low ripple and THD compared to other D.C power

supply topologies.

Keywords—Power electronic converters, Power factor correction, interleaved buck converter, Neuro-Fuzzy Controller, DC drives

I. INTRODUCTION

In the past few decades, power electronic converters are dominated for industrial demands and they

play a major role in high power equipments for different applications. Use of power electronic converters

is ever increasing in the processing of electrical energy in industrial applications such as power generation

systems, adjustable speed drives, Electric vehicles (EVs), Hybrid electric vehicles (HEVs), Switched

Mode Power Supply (SMPS), Uninterrupted Power Supply (UPS) and other AC utility mains applications.

Boost converters are widely used in the low-to-high DC/DC applications. Especially, in the recent years,

significant efforts have been made on improving the performance of high-power boost converters [1-6].

Many researchers have proposed various converters and control schemes to minimize the harmonics

and switching losses. The switching losses are reduced by using a concept of variable DC link voltage for

speed control of BLDC motor [7]. The DC-DC converters have been suggested to reduce the switching

losses and to attain high efficiency at increased frequencies [8]. In the case of resonant converters the

voltage stress on power switches are subjected to very high voltage stress especially when these comments

are used for high voltage applications [9]- [10].

Power factor correction (PFC) converters are proposed to achieve higher power in references [11-13].

A boost PFC converter is a widely adopts configuration for improving the power quality at AC mains of

BLDC motor drives [13]. However, this configuration uses a high frequency pulse width modulation

(PWM) pulses for controlling the speed of BLDC motor. Therefore, it has high switching losses associated

with the VSI and requires two costly current sensors for PWM based current control of BLDC motor [13].

Researchers have worked on ZVS and/or ZCS, so as to reduce the switching losses associated with the

high-frequency switching [14-15]. The objective is to reduce input current ripple, reverse recovery loss of

the diode and to improve current sharing between the switches and overall efficiency. Nevertheless, fast

soft switching, equal current sharing and high efficiency IBC design is still moving on a difficult task

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Lee et al (2000) [16] offered a converter consisting of two interleaved and intercooled boost converter

cells which was modelled to equalize the current sharing between two parallel connected boost converters.

The boost converter cells exhibited good current sharing characteristics even in the presence of relatively

large duty cycle mismatch. The converter was designed to have a simple circuit; excellent current sharing

characteristics, low input current ripple and zero boost-rectifier reverse recovery loss. When two similar

but independently controlled boost converters are connected in parallel (with the same input and output

voltages), the converter with a larger duty cycle may operate in CICM, while the other automatically

operates in DICM. Under this condition, any further additional loading current would be taken up by the

converter in CICM operation. To overcome this current sharing problem, a converter has been designed

operating on both CICM and DICM by assuming a smooth input current and rectangular input currents of

the tightly coupled inductors respectively. No current sensor was required. It is less expensive as the two

boost converter cells share the same magnetic core. But the main switches are ZCS at turn-on transition,

while at turn off, the switching is still hard.

Yungtaek Jang and Jovanovic, (2007) [17] analyzed an active soft switching circuit based on

interleaving two boost converters and adding two simple auxiliary commutation circuits. An active

circuit branch in parallel with the main switches was added, comprising of an auxiliary switch and a

snubbed capacitor. Insertion of this interleaved converter topology has achieved ZCS at turn-on and

ZVS at turn-off transitions of the main switches. It had considerably reduced the switching loss and

increased the efficiency.

An interleaved buck converter (IBC) that has low switching losses and improved step down

conversion ratio proposed by Lee, et al (2011) [18], which is also suitable for the application where the

input voltage is high and the operating duty cycle is below 50%. It shows that voltage across all switches

is half of the input voltage before turn-on or after turn-off and when the operating duty is below

50%, the capacitive discharging and switching losses are also stand reduced. This makes the IBC to have

higher efficiency and operate with higher switching frequency and a smaller output current ripple.

Anushya and Raja Prabhu (2012) [19] experimentally verified the modeling and simulation of an

interleaved soft switching boost converter fed DC drive system. The topology is used to raise the

efficiency of the AC/DC converter and minimizes switching losses by adopting a resonant soft switching

method. The overall efficiency of interleaved converter was improved when compared to the

conventional boost converter system. The converter has smaller output filter capacitor and lesser

component count compared to other topologies. In addition, it maintained unity power factor and

regulated output voltage with ZVS over the wide range of the load even with unbalanced input voltages.

A new IBC is proposed by Lakshmi D, et al (2013),[20] which has good characteristics, more

simple in structure. The voltage stress according all the switches is half of the input voltage before

turn-on or turn-off when the operating duty is below 50%, the capacitive discharging and switching

losses are considerably reduced. In addition, the voltage stress of the freewheeling diodes is half of the

input voltage. From the results it is evident, the IBC has higher efficiency and higher switching

frequency. Moreover there is higher step down conversion ratio and a smaller inductor ripple current.

Thus the IBC becomes attractive in applications where non isolation, step-down conversion ratio with

high input voltage, high output current with low ripple, higher power density and low cost are

required.

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Kumar & Prabhakaran (2014) [21] presented a PFC interleaved converter-based VSI-fed BLDC

motor drive targeting low-power applications. A new method of speed control has been utilized by

controlling the voltage at dc bus and operating the VSI at fundamental frequency for the electronic

commutation of the BLDC motor for reducing the switching losses in VSI. The front-end interleaved

converter has been operated in DICM for achieving an inherent power factor correction at ac mains. A

satisfactory performance has been achieved for speed control and supply voltage variation with power

quality indices within the acceptable limits of IEC 61000-3-2. Moreover voltage and current stresses on

the PFC switch have been evaluated for determining the practical application of the proposed scheme.

Finally an experimental prototype of the proposed drive has been develop to validate the performance of

the proposed BLDC motor drive under speed control with improved power quality at ac mains. The

proposed scheme has shown satisfactory performance and it is recommended solution applicable to low-

power BLDC motor drives.

Gules et al (2003) [22] proposed a converter uses voltage multiplier cells that allow high voltage

step-up with reduced stress regarding the semiconductor elements. The interleaved configuration allows

the very reduction of the input inductors and the output capacitors at the cost of high component count

as additional multiplier cells are included. A similar topology based on the three-state commutation

cell was proposed in Tofoli et al (2012) [23], where the current sharing problem of the interleaved

converter can be eliminated.

This article presents a power factor corrected (PFC) interleaved converter- fed DC motor drive

using low cost microcontrollers. This converter improves the power factor ensures the maximum

utilization of the input real power. Therefore efficiency of the DC motor is improved by implementation

of power factor corrected interleaved converter. The simulations are carried out using MATLAB and

prototype models are developed to validate the design

II. PROPOSED INTERLEAVED CONVERTER MODEL

.To utilize electrical power at the maximum extent we need to ensure unity power factor. This work is

dedicated to power electronics converter to achieve D.C to D.C conversion with near unity power factor,

reduced size and complexity. The basic hardware layout of the converter for Power Factor Correction

(PFC) is shown in fig. 1 and the power circuit is given in fig. 2.

Fig.1 Experimental setup for interleaved converter

The available power source in most of the cases is A.C. To convert it into D.C rectifiers are used.

The next stage happens to be the interleaved converter used in voltage control as well as in PFC.

The heart of the circuit is an embedded Controller with build-in ADC. The reference voltage is

compared with the actual voltage read by the voltage sensor to generate the error signal. The PID

controller algorithm uses this error as input to generate G1 and G2 based on the voltage difference. Optical

isolation prevents the power circuit from interfering with the low voltage micro-controller.

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The opto-isolator IC can also directly drive the MOSFET. The operation of the power switches in

the interleaved converter is based on four operating modes, the mode1, mode 2, mode 3 and mode

4(figures 3 to 6).

Fig. 2 Power Circuit of interleaved Converter

Mode1: For this mode MOSFET switches M1 and M2 are on, diodes D1 and D2 are off.

Fig. 3 Mode 1 states of switches

Then the Differential equation for this stage is given by,

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(1)

Where,

iL1 ………… L1 Inductor current,

iL2 ………… L2 Inductor current,

L1 …………Inductance of L1 in mH,

L2…………. Inductance of L2 in mH,

Vin …………Input D.C voltage,

Vo…………Output of interleaved converter,

C …………Capacitance in microfarad.

Mode2: For this mode MOSFET M1 and diode D2 are on, where’s MOSFET M2 and Diode D1 are off.

Fig. 4 Mode 2 states of switches

Then the differential equations of the circuit is given by,

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(2)

Mode3: MOSFET switches M2 and D1 are on, where’s MOSFET M1 and Diode D2 are off.

Fig. 5 Mode 3 states of switches

For this mode the differential equations of the circuit is given by,

(3)

Mode4: MOSFET switches M1 and M2 are on, diode D1 and D2 are turned off.

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Fig. 6 Mode 4 states of switches

Then, at this stage differential equations of the circuit is given by

(4)

For this converter two major design aspects are the Boost ratio and Input current.

1. Boost ratio (Br): The boosting ratio of the converter is derived from the duty cycle. It is same as

that of conventional boost converter.

Br = Vdc/Vin = 1 / (1 – D) (5)

Where, Vdc represents the output D.C voltage of the Converter, and Vin is the voltage fed input to the

Boost converter.

2. Input current Iin: The input current can be calculated from the input power and the input voltage.

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Iin= Pin / Vin, (6)

Where, Pin the input power

Power MOSFET’s Z44 was found more suitable than power BJT as the output power was in the range of

400 Watts. Implementation with IGBT must also be consider if fast switching time is need i.e at operating

frequency above 20Khz. In order to ensure proper turn off of the MOSFETs they were grounded through

10 KΩ resistors. The diver circuit for IGBT is bit complex compared to MOSFET.

III. IMPLEMENTATION OF PROPOSED INTERLEAVED CONVERTER

Consumers are supplied with 230 V, 50 Hz A.C whereas many electronics equipments need low voltage

D.C supply. Invariably all electronic circuits have power adaptors to regulate the A.C input. These devices

have diode rectification circuits which is the main power electronics entity. SMPS and other forms of D.C

regulation circuits have evolved from the diode rectifier. Rectifiers also find applications in circuits like

AM detector, over voltage protection circuits, reference voltage source in ADC, noise generators and

temperature sensors. The team of this work was to investigate on D.C voltage control in open loop and

closed loop configurations.

IV. RESULTS AND DISCUSSION

Interleaved Converter using a Fuzzy controller

While PID controllers are suitable for quite a lot of control problems, still they can perform poorly

in complex, non-linear applications. Often PID controllers are enhanced through methods such as gain

scheduling or fuzzy logic. This section is dedicated to implementation of Fuzzy controller for the

interleaved converter. The defuzzification method by Mamdani (1974) is preferred in most of the fuzzy

logic applications. In this work the sugeno inference system is used as it is well suitable for adaptive

controller designs. The other details of the fuzzy controller used in this work are listed in Table 1.

Table 1 Parameters of the Fuzzy controller

Type Sugeno

Andmethod Prod

Ormethod Max

Defuzzmethod Wtaver

Mpmethod Prod

Aggmethod Max

The sugeno inference system typical rule takes the form,

“If Input 1 is x1 and Input 2 is x2, then Output is z = ax1 + bx2 + c”.

The reason for selecting the T-sugeno type for this problem is to improve computational speed,

which is a must for embedded applications. This inference method differs from the mamdani method only

in the output membership, otherwise the process remains the same. For Sugeno system output membership

functions are either linear or constant. In this work ten rules were used to implement the controller as in fig.

7.

Implementation in Hardware

The power module used to implement the Fuzzy based Converter is shown in fig. 8. Test points are

provided in the hardware unit to test signals attributes at various levels. The current transformer was

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shunted with a 5 amps ammeter and voltage signal across this meter was used to read the current

information.

Fig. 7 Fuzzy Rules View

The fuzzy processes like fuzzification, defuzzification and inference methods are all implemented

in MATLAB environment. The final output from MATLAB was fed to the hardware kit. This sort of co-

simulation is referred as hardware-in-loop simulation (HIL). The complete neuro-fuzzy process when

executed on a P.C outputs an 8-bit code through the parallel port of the P.C. The PWM generation

controller uses the P.C 8 bit code from P.C to select the duty ratio. The Data Acquisition Toolbox of

MATLAB provides the features for sending and receiving data from the Motherboards parallel ports. The

Fuzzy Logic Toolbox was used to perform operation like membership function definition, de-fuzzification

and rule base development. The proposed Neuro- Fuzzy can be adopted directly for the PID controller

system identification process.

Fig. 8 Hardware implementation of Fuzzy based converter

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The step input response of fuzzy controller with resistive load is given in fig 9 and the reference

voltage tracking is given in fig. 10. In this case the voltage overshoots are absent and the voltage reaches

steady state within 0.01 seconds. This proves that the dynamic response of the fuzzy controller is better

than PID controller. A D.C motor of 24V, 500 rpm was connected across the interleaved converter

operating with Neuro Fuzzy controller. The motor dynamic performance is presented in fig. 11.

Fig 9 Step response for neuro-fuzzy controller with resistive load

Fig. 10 Variable D.C Output using fuzzy Controller

The speed reference is changed from 0 to 400rpm at time t=1 sec. The D.C motor reaches steady

state at time t = 2 seconds. The maximum current for the motor being 10A a peak overshoot up to 9Amps

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was seen at time t=1.1seconds. The machine current reaches the steady value of 6 amps at time t=2.2

seconds. For D.C motor with fixed load the speed is proportional to the applied voltage. Hence to achieve

speed variation the interleaved control the D.C supply across the motor terminals. It can be seen that the

D.C motor performance is better with the use of neuro-fuzzy controller further the problems of parameter

tuning is also eliminated with this intelligent controller. In real life application experimental data in

voltage, current and speed can be used to tune the membership functions. This sort of fuzzy controller

system is termed as Adaptive system. In work the error and corrective action form the PID controller was

used as the training data for the neuro-fuzzy controller.

Fig. 11 Motor Dynamics with Fuzzy Controller

The A.C mains input current and voltage waveforms for the Neuro- Fuzzy Controller are presented

in fig. 12. It can be seen that the Voltage and current are in phase and the power factor measured was

around 0.97. This also confirms that nero-fuzzy based converter provides a ripple free operation across the

A.C mains. For industrial consumers in India maintaining the power factor within norms is a must.

Perhaps domestic users are not covered under these sections. Therefore the proposed neuro-fuzzy unit can

be used for industrial D.C drives. For D.C motors the shaft torque depends on the applied load and not on

the voltage.

Measurement of P.F and Harmonics

The A.C mains voltage was isolated using a 1:1 transformer to observe voltage and current

waveforms as in fig. 12. The Power was also measure from this transformer. Fast Fourier Transform (FFT)

present in the oscilloscope is used to compute the fast Fourier transform using the channel inputs. This

function takes the digitized time record of the specified source and transforms it to the frequency domain.

The function was selected for the mains input current signal; the FFT spectrum plotted on the oscilloscope

is shown in fig. 13. It is obvious that 50 Hz frequency content was maximum (fundamental frequency) and

the levels of 100Hz/150Hz (second/third order), were negligible.

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Fig. 12 Input Current and Voltage Waveforms with neuro-fuzzy controller

Fig. 13 Input Current FFT analyses

The following features were observed in the proposed power converter design.

1. Real time hardware development is easy due to the presence of simple rule surface and absence of

complex functions.

2. This control strategy provides good load regulation.

3. The design is suitable for low cost applications as it uses MOSFET as the switching device.

4. The signal exchange between the P.C motherboard and power converter board was in the range of 0/ 5V,

i.e. TTL level. Hence it can be converted easily to analog / digital values with high accuracy.

V. CONCLUSION

A low cost interleaved PFC circuit was described in this work. The PCB spacing has been reduced

due to use of two inductors. The Control logic implemented here using PID and Neuro-Fuzzy provides

fairly good results. This primer on IPFC can serve as a reference for applications like battery vehicles, D.C

drives and power factor correction in A.C drives. The fuzzy logic controller based design was evaluated

using a step signal and voltage reference tracking. This design performance is superior to the conventional

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open loop rectifier and PID based models. The Fuzzy logic controller has a fairly similar tracking

performance as the PID controller and with a better dynamic response. Further being an adaptive fuzzy

system the tuning of membership functions is highly simplified. The real-time simulation environment

could serves as a intermediate step in development of D.C drives, reducing experimental risks and

development cost.

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International Journal of Research

Volume VIII, Issue IV, April/2019

ISSN NO:2236-6124

Page No:1133