Implementation of Symmetric Encryption Algorithm For ...ijarece.org/wp-content/uploads/2014/12/IJARECE-VOL-3-ISSUE-12-18… · Ch.NagaRaju, 2 Y.N.S.VamsiMohan 3 A.Srinivas Rao 1 M.Tech

International Journal of Advanced Research in Electronics and Communication Engineering (IJARECE)

Volume 3, Issue 12, December 2014

1872

ISSN: 2278 – 909X All Rights Reserved © 2014 IJARECE

Implementation of Symmetric Encryption Algorithm

For Crypto-Devices

1Ch.NagaRaju,

2Y.N.S.VamsiMohan

3A.Srinivas Rao

1 M.Tech Student,Department of ECE, Bonam Venkata Chalamayya Institute of Technology & Science, Amalapuram, India

2Associate Professor Department of ECE, Bonam Venkata Chalamayya Institute of Technology&Science, Amalapuram, India

3Assistant Professor Department of ECE, Bonam Venkata Chalamayya Institute of Technology&Science, Amalapuram, India

Abstract

This paper describes a generic built-in

self-test strategy for devices implementing

symmetric encryption algorithms. Because weak

“crypto-algorithms,” poor design of the device or

hardware physical failures can render the product

insecure and place highly sensitive information or

infrastructure at risk. Taking advantage of the

inner iterative structures of crypto-cores, test

facilities are easily set-up for circular self-test of

the crypto-cores, built-in pseudorandom test

generation and response analysis for other cores

in the host device. Main advantages of the

proposed test implementation are architecture

with no visible scan chain, 100% fault coverage

on crypto-cores with negligible area overhead,

availability of pseudorandom test sources, and

very low aliasing response compaction for other

cores.

Index Terms – Digital circuit testing, security, self

testing.

I.INTRODUCTION

Now a day‘s, most of the users using wireless

communication for fast sending and receiving the

mails in less time and in less cost. When this way of

communication is going on, the unauthorized people

who have the intension to know about our

conversion will hack the information within that

frequency. This leads to leakage of information. To

protect it from the hacker, we are using advanced

AES algorithm. Crypto devices mean Encryption &

Decryption. Cryptography is the science of secret

codes, enabling the confidentiality of

communication through an insecure channel. It

protects against unauthorized parties by preventing

unauthorized alteration of use. Generally speaking,

it uses a cryptographic system to transform a

plaintext into a cipher text, using most of the time a

key.

We will overcome some disadvantage in

wireless communication like hacking process with

our project.

In this paper is organized as follows:

Data Encryption Standards (DES) in section II.

Adavanced Encryption Standards (AES) in section

III. The simulation results are presented in Section Iv.

Concluding remarks are made in Section V.

II. DATA ENCRYPTION STANDARD

(DES)

The Data Encryption Standard (DES) is a

block cipher that uses shared secret encryption. It is

based on a symmetric-key algorithm that uses a 56-

bit key. Once a plain-text message is received to be

encrypted, it is arranged into 64 bit blocks required

for input. If the number of bits in the message is not

evenly divisible by 64, then the last block will be

padded Multiple permutations and substitutions are

incorporated throughout in order to increase the

difficulty of performing a cryptanalysis on the cipher. However, it is generally accepted that the initial and

final permutations offer little or no contribution to the

security of DES and in fact some software

implementation omit them.

This algorithm was initially controversial

because of classified design elements, a relatively

short key length, and suspicions about a National

Security Agency (NSA) backdoor. DES is now

considered to be insecure for many applications. This

is chiefly due to the 56-bit key size being too small. The need for the parity checking scheme was also

questioned without satisfying answers. One startling

discovery was that the S-boxes appeared to be secure

against an attack.DES (and most of the other major

symmetric ciphers) is based on a cipher known as the

Feistel block cipher.



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Fig.1 the block diagram of Cryptography system.

III.ADVANCED ENCRYPTION

STANDARD(AES)

Advanced Encryption Standard (AES) is the

current standard for secret key encryption. The

algorithm uses a combination of Exclusive-OR

operations (XOR), octet substitution with an S-box,

row and column rotations, and a Mix Column. It was

successful because it was easy to implement and

could run in a reasonable amount of time on a regular

computer.

Advanced Encryption System is a Block

cipher, which means that it works on fixed-length

group of bits, which are called blocks. It takes an

input block of a certain size, usually 128, and

produces a corresponding output block of the same

size. The transformation requires a second input,

which is the secret key. It is important to know that

the secret key can be of any size (depending on the

cipher used) and that AES uses three different key

sizes: 128, 192 and 256 bits.

AES is a substitution permutation network,

which is a series of mathematical operations that use

substitutions (also called S-Box) and permutations

(P-Boxes) and their careful definition implies that

each output bit depends on every input bit.

High Level Description of the Algorithm:

1 KeyExpansion-round keys are derived from

cipher key using rijndael‘l key.

2.Initial Round 1. AddRoundkey- Each byte of the state is combined

with the round key using bitwise XOR

3. Rounds

1. SubBytes--a non linear substitution step where

each byte is replaced with another according to a look

up table

2. ShiftRows--a transposition step where each row

of the state is shifted cyclically a certain number of

steps

3. MixColumns--a mixing operation which operates

on columns of the state combing the four bytes in

each column

4. AddRoundKey

4. FinalRound (no MixColumns)

1. SubBytes

2. ShiftRows

3. AddRoundKey

The SubBytes Step:

Fig 2. In the SubByte step, each byte in the state is

replaced with its entry with a fixed 8 bit look up table

Every byte in the state is replaced by another one,

using the Rijndael S-Box.This operation provides

non linearity in the Cipher.

The ShiftRows Step:

Fig 3.In ShiftRows step bytes in each row of the state

shifted cyclically to the left.The number of places

each byte differs for each row.



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The ShiftRows operates on the rows of the state. It

cyclically shifts bytes in each row by a certain

OFFSET For AES the first row in left is unchanged.

Each byte of the second row is shifted one to the left.

The MixColumns Step:

Fig 4.In MixColumns step each column of the state is

multiplied with a mixed polynomial

It is a linear transformation on the columns of the

each state. The MixColumns Step takes four bytes

as input and outputs four bytes. Where each input

byte affects all four output bytes. Together

ShiftRows MixColumns provides diffusion in the

cipher.

The AddRoundKey step:

Each byte of the state is combined with a

round key, In AddroundKey step the subkey is

combined with the state..For each round the subkey is

derived from rijndael‘s key schedule. The subkey is

added by combing each byte of the state with the

corresponding byte of the subkey using bitwise XOR.

Fig 5.In AddRoundKey each byte of the state is

combined with a byte of the round subkey using XOR

operation

Optimizing of the Cipher:

On systems with 32bits or larger words it is

possible to speed up execution of this cipher by

combining SubBytes and ShifRows with

MixColumns and transforming them into a

sequence of table lookups.Using byte oriented

approach it is possible to combine SubBytes

ShiftRows and MixColumns steps into a single

round operation.

Security:

The design and strength of all key lengths of

the AES algorithm (i.e. 128,192 &256) are sufficient

to protect classified information up to secret level.

TOP SECRET information will require use of either

192 or 256 keylengths.

IV.SIMULATION RESULTS

The simulation results for the BIST‘s in

encryption and decryption are shown below. Here the

clock is a continuous cycle with 400ns for cycle and

the clock running duration is set to 200ns for all

below shown results. In the same way the rst is set to

‗0‘ initially for loading the data and key of 128 bit in

first cycle duration. In the next cycle duration the rst

is set to ‗1‘ for encryption, decryption and testing for

all below shown results.

The expanded key in all below cases is

generated within the single clock cycle of given

continues clock second cycle.

.

Fig.6.Simulation Results for Fault

detection BIST For Encryption



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Fig.7. Simulation Results for Fault

detection BIST For Decryption

V. CONCLUSION

Crypto may be seen as a continuous struggle

between cryptographers & cryptanalysts. Attacks on

cryptography have an equally long history. The

security of cryptographic modules for providing a

practical degree of protection against white-box (total

access) attacks should be examined in a totally un-

trusted execution environment. So many developers

design so many devices to protect the data very

powerful when it is done right, but it is not a panacea.

But by using this crypto devices technique we are

providing secure scan architecture can easily be

integrated into the scan-based DFT design flow as the

synthesis register can be specified to the

corresponding bit of the secret key. The secure

control circuit & multiplexers between the MKR &

secret key can be inserted.

In this project a solution is presented that

consists in using an AES-based cryptographic core

commonly embedded in secure system. Three

addition modes are added to the current mission of

the AES crypto core. One is pseudorandom test

pattern generation, one for signature analysis and

another one is fault coverage with generated test

pattern. Efficiency of these three modes has been

demonstrated. Extra cost in terms of area (~0.76%

area overhead) is very low compared to other

techniques. Because of only one AES core will be

originally embedded in the system. This reduces the

reduction of test cost will lead to the reduction of

overall production cost & 100% security of data.

REFERENCES

1. National Bureau of Standards, U.S.

Department of Commerce, ―Data encryption

2. standard, federal information processing

standard (FIPS),‖ Publication 46, 1977.

3. D. Joan and R. Vincent, The Design of

Rinjael, AES—The Advanced Encryption

Standard. New York: Springer-Verlag.

4. Recommendation for the Triple Data

Encryption Algorithm (TDEA) Block

Cipher, Special Publication 800-67, Nat.

Inst. Standards Technol. (NIST),

Gaithersburg, MD, 2008.

5. B.Yang, K.Wu, and R. Karri, ―Scan-based

side-channel attack on dedicated hardware

implementations on data encryption

standard,‖ in Proc. Int. Test Conf., 2004, pp.

339–344.

6. B. Yang, K. Wu, and R. Karri, ―Secure

scan: A design-for-test architecture for

crypto chips,‖ IEEE Trans. Comput.-Aided

Design Integr. Circuits Syst., vol. 25, no. 10,

pp. 2287–2293, Oct. 2006.

7. J. Lee, M. Tehranipoor, C. Patel, and J.

Plusquellic, ―Securing scan design using

lock and key technique,‖ in Proc. IEEE Int.

Symp. Defect Fault Tolerance VLSI Syst.

(DFT), Oct. 2005, pp. 51–62..

AUTHORS PROFILE

Mr. Ch. NagaRaju

completed his graduation in

Bonam Venkata Chalamayya

engineering college, JNTU

University. He is currently

doing his M.Tech in Bonam

Venkata Chalamayya

institute of technology and

science, Amalapuram.

Mr.Y.N.S.Vamsi Mohan

Associate professor in E.C.E

department at Bonam

Venkata Chalamayya

institute of technology and

science, Amalapuram and

completed his B.Tech in

ECE from RVR & JC

engineering college,

Nagarjuna University and

M.Tech. From

KLCE engineering college,

Nagarjuna University.

Documents

Implementation of Symmetric Encryption Algorithm For ...ijarece.org/wp-content/uploads/2014/12/IJARECE-VOL-3-ISSUE-12-18… · Ch.NagaRaju, 2 Y.N.S.VamsiMohan 3 A.Srinivas Rao 1 M.Tech