Journal of Crystal Growth 478 (2017) 163–173

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Journal of Crystal Growth

journal homepage: www.elsevier .com/locate /crys

TaC-coated graphite prepared via a wet ceramic process: Application toCVD susceptors for epitaxial growth of wide-bandgap semiconductors

http://dx.doi.org/10.1016/j.jcrysgro.2017.09.0030022-0248/� 2017 Elsevier B.V. All rights reserved.

⇑ Corresponding author.E-mail address: daisuke@mosk.tytlabs.co.jp (D. Nakamura).

Daisuke Nakamura a,⇑, Taishi Kimura a, Tetsuo Narita a, Akitoshi Suzumura a, Tsunenobu Kimoto b,Kenji Nakashima a

a Toyota Central R&D Labs., Inc., Nagakute, Aichi 480-1192, JapanbDepartment of Electronic Science and Engineering, Kyoto University, Katsura, Nishikyo, Kyoto 615-8510, Japan

a r t i c l e i n f o

Article history:Received 10 June 2017Received in revised form 4 September 2017Accepted 5 September 2017Available online 6 September 2017Communicated by T.F. Kuech

Keywords:A1. CoatingA3. Chemical vapor deposition processesA3. Metalorganic chemical vapor depositionB1. Tantalum carbideB2. Semiconducting gallium compoundsB2. Semiconducting silicon compounds

a b s t r a c t

A novel sintered tantalum carbide coating (SinTaC) prepared via a wet ceramic process is proposed as anapproach to reducing the production cost and improving the crystal quality of bulk-grown crystals andepitaxially grown films of wide-bandgap semiconductors. Here, we verify the applicability of theSinTaC components as susceptors for chemical vapor deposition (CVD)-SiC and metal-organic chemicalvapor deposition (MOCVD)-GaN epitaxial growth in terms of impurity incorporation from the SinTaClayers and also clarify the surface-roughness controllability of SinTaC layers and its advantage in CVDapplications. The residual impurity elements in the SinTaC layers were confirmed to not severely incor-porate into the CVD-SiC and MOCVD-GaN epilayers grown using the SinTaC susceptors. The quality of theepilayers was also confirmed to be equivalent to that of epilayers grown using conventional susceptors.Furthermore, the surface roughness of the SinTaC components was controllable over a wide range ofaverage roughness (0.4 � Ra � 5 lm) and maximum height roughness (3 � Rz � 36 lm) through simpleadditional surface treatment procedures, and the surface-roughened SinTaC susceptor fabricated usingthese procedures was predicted to effectively reduce thermal stress on epi-wafers. These results confirmthat SinTaC susceptors are applicable to epitaxial growth processes and are advantageous over conven-tional susceptor materials for reducing the epi-cost and improving the quality of epi-wafers.

� 2017 Elsevier B.V. All rights reserved.

1. Introduction

Wide-bandgap semiconductors (e.g., SiC and GaN) arepromising materials for next-generation power devices [1–5].Power devices based on wide-bandgap semiconductors requirethe deposition of thick drift layers (low-doped (

164 D. Nakamura et al. / Journal of Crystal Growth 478 (2017) 163–173

commercially available, the high cost and limited lifetime of CVD-TaC-coated carbon components hamper their application in practi-cal CVD or MOCVD processes.

To address the high cost and short lifetime of present TaC-coated carbon materials, we previously proposed preparing ultra-thick (�100 lm) TaC-coated carbon materials on graphite via awet ceramic process; we refer to the obtained coatings as sinteredtantalum carbide coatings (SinTaCs) [10]. SinTaCs are potentiallylow cost and highly reliable because of their simple productionscheme and defect-free dense coating layer. Furthermore, large-sized complex-shaped SinTaC components are available throughoptimization of the TaC slurry compositions and selection of theoptimal graphite material for the substrate [11,12]. However, theSinTaC layers contain a high concentration (�100 ppm) of residualimpurities that originate from the source materials (cermet-gradeTaC powder and a sintering agent) [11]. In our previous studies,we found that the bulk crystal growth process (i.e., SiC and AlNgrowth via sublimation) with SinTaC components was notimpaired by high concentrations of impurities [11,13]. In addition,high-rate GaN growth by halogen-free vapor-phase epitaxy (HF-VPE) [14] showed suppressed impurity incorporation with SinTaCcomponents compared to the use of conventional pBN compo-nents, which led to a substantial reduction of nanopipe defect for-mation in HF-VPE-grown GaN layers [15].

The requirements for a coated susceptor material to be used forwide-bandgap epitaxial processes are (1) long lifetime (long-termdurability and/or reusability in multiple growth/cleaning runs) toreduce the processing costs, (2) low extrinsic impurity incorpora-tion from the susceptor material, and also (3) temperature unifor-mity to ensure thickness, doping concentration, and compositionalhomogeneities [16]. In the present work, we demonstrate the ini-tial verification of CVD-SiC and MOCVD-GaN epitaxial growth with

Fig. 1. Schematics of (a) a hot-wall CVD reactor for SiC epitaxial growth with a SinTaC plepitaxial growth with a SinTaC susceptor (TMG = trimethylgallium).

SinTaC susceptors and confirm that the residual impurities in theSinTaC layers do not adversely affect either growth process.Furthermore, we attempt to control the surface roughness of theSinTaC components via simple additional surface treatments andclarify another advantage in CVD applications through a two-dimensional finite-element method (2D-FEM) simulation. Finally,we demonstrate the fabrication of practical components for CVD-SiC and MOCVD-GaN epitaxial growth systems to enable futureapplications of SinTaC components in these systems.

2. Experimental

SinTaC test susceptors for CVD-SiC and MOCVD-GaN epitaxialgrowth were prepared by spraying a TaC slurry onto graphitesubstrates and subsequently sintering the sprayed substrates attemperatures greater than 2000 �C in a reduced-pressure Ar atmo-sphere [10]. The SinTaC test susceptor for CVD-SiC was a fullycoated plate with dimensions of 150 � 43 � 1.5 mm3; the suscep-tor for MOCVD-GaN was a fully coated disc (with a recess for a£2 in. substrate) with the dimensions of £58 � h19.5 mm2. Thethickness of the SinTaC layers formed on the susceptors was con-trolled to be �100 lm.

The CVD-SiC epitaxial growth was carried out in a horizontalhot-wall CVD reactor, as shown in Fig. 1(a). A 4H-SiC(0001)4�-off wafer was placed on the SinTaC plate susceptor, and the Sin-TaC susceptor with the wafer was installed into the reactor, whichincluded a molded carbon fiber thermal insulator. The sample andsusceptors were heated to a process temperature (SiC-coatedsusceptor temperature measured by a pyrometer) of 1600 �C byradio-frequency heating at a process pressure of 30 Torr. Beforethe epitaxial growth, H2 etching was carried out for 30 min in apure H2 gas stream; the CVD-SiC epitaxial growth was then carried

ate and slot-shaped SiC-coated carbon susceptors and (b) a MOCVD reactor for GaN

Fig. 2. Manufacturing scheme for surface-roughness-controlled SinTaC: (a) SinTaC-NORMAL, (b) SinTaC-POLISH (or SinTaC-SMOOTH), and (c) SinTaC-MAT.

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out in an SiH4–C3H8–H2 mixture-gas stream for 35 min (target epi-layer thickness:�10 lm). An after-growth H2 etching for 1 min wasthe last step in the growth process. For comparison, the samegrowth process was carried out using a poly-SiC plate susceptorinstead of the SinTaC plate susceptor. The surface morphology ofthe grown epilayers was checked by optical microscopy, and impu-rity concentrations in the epilayers were measured by secondary-ion mass spectrometry (SIMS). The impurity elements analyzedby SIMS were N, P, B, and Al, which form shallow donors/acceptors;V, which forms a carrier-killer center; and Ti, Fe, and Co, which arethe abundant impurity elements in SinTaC layers [6,11]. The inci-dent primary ions for SIMS (probed-area size: £30 lm) wereCs+(15 kV) and O2+(11 kV) to detect secondary negative ions (of Nand P) and positive ions (of B, Fe, Co, Ti, V, and Al), respectively.The accuracy of the concentrations evaluated by SIMS was ±40%.

The MOCVD-GaN epitaxial growth was carried out in a horizon-tal CVD reactor, as shown in Fig. 1(b). A sapphire (11 �20) 0.3�-offwafer was placed on the SinTaC disc susceptor, and the SinTaC sus-ceptor with the wafer was installed into the reactor, which con-sisted of an opaque quartz-glass holder and a resistive heatermade of pBN-coated carbon. The sample and susceptor wereheated to 470 �C (process temperature was monitored by a ther-mocouple at the bottom of the susceptor) for growth of a low-temperature AlGaN (LT-AlGaN) buffer layer; the process tempera-ture was then increased to the growth temperature of 1030 �C forgrowth of the MOCVD-GaN epilayers in a trimethylgallium–NH3–H2–monomethylsilane mixture-gas stream for 60 min at a processpressure of 300 Torr. The stacking structure and target thickness ofeach epilayer were n-GaN(Si-doped): 2 lm/unintentionally doped(UD)-GaN: 3 lm/LT-AlGaN/sapphire substrate. For comparison,the same growth process was carried out using a SiC-coated carbonsusceptor instead of the SinTaC susceptor. The surface morphologyof the grown epilayers was also checked by optical microscopy,and impurity concentrations in the epilayers were measured bySIMS. The impurity elements analyzed by SIMS were B, C, O, andSi, which are typical impurities in the MOCVD of unintentionallydoped GaN growth process; Ca, which is a pollution element fromthe human body; and Ti, Fe, and Co, which are the impurity ele-ments abundant in SinTaC layers. The depth profiles of SIMS anal-ysis were obtained for depths as large as 3.5 lm from the as-grownsurface. The accuracy of the concentrations measured by the SIMS

analysis was ±40%. The X-ray rocking curves for GaN(0 0 2) andGaN(1 0 0) reflections were collected to enable a comparison ofthe crystal quality of the GaN epilayer grown with the SinTaC sus-ceptor to that grown with the SiC-coated carbon susceptor.

The surface roughness of the SinTaC layers was controlled usingthe schemes shown in Fig. 2. Fig. 2(a) shows the conventional SinTaCmanufacturing scheme, where the TaC slurry is applied by sprayingat a normal sprayingdistance of 10–15 cm;we refer to this approachas the ‘‘SinTaC-NORMAL” scheme. Fig. 2(b) shows the modifiedscheme that includes an additional surface treatment of polishing(with a lapping film containing #10,000-mesh particles) or smooth-ing (with #1500-grit abrasive paper) of the as-sprayed compactedTaC powder surface; we refer to these approaches as ‘‘SinTaC-POLISH” and ‘‘SinTaC-SMOOTH,” respectively. Fig. 2(c) showsanother modified scheme involving additional spraying with a longspraying distance of �30 cm, which we call the ‘‘SinTaC-MAT”scheme. This additional spraying deposited half-dried slurry dro-plets (which partially dried while traveling the long spraying dis-tance) without surface smoothing through wetting, resulting insubstantial roughening of the surface. For reference, a commerciallyavailable CVD-TaC-coated carbon sample (TaC coating thick-ness:�30 lm, arithmetic averaged roughness:�1 lm)was also pre-pared. The surface-roughness-controlled SinTaC samples wereevaluated using a scanning electron microscope (SEM) and a line-scan surface profiler. The line-scan surface profiles were measuredusing a conical probe with a tip radius of 2 lm and a 60� in-coneangle. The obtained surface profiles for SinTaC and CVD-TaC layerswere analyzed to calculate surface roughness (arithmetic averagedroughness Ra andmaximumheight roughness Rz) and surfacewavi-ness (arithmetic averagedwavinessWa andmaximumheightwavi-ness Wz) according to the methods based on Japanese IndustrialStandards (JISB0601:2001, JISB0632:2001, JISB0633:2001, andJISB0651:2001) [17].

To estimate the effect of the surface-roughness-controlled Sin-TaC susceptor in CVD applications, simplified 2D-FEM simulationsconsidering the physics of heat transfer, thermal radiation, andsolid mechanics were conducted. The reactor structure for thesimulation was a large-diameter single-wafer vertical reactor[18] equipped with a SinTaC susceptor (SinTaC-NORMAL orSinTaC-MAT), graphite susceptors, and two heaters. A Si wafer(Si: £200 mm, face-up) was placed on the ring-shaped SinTaC

166 D. Nakamura et al. / Journal of Crystal Growth 478 (2017) 163–173

susceptor, and the Si wafer was heated by thermal radiation fromthe underlying graphite susceptor (heated by the two heaters) aswell as by heat transfer from the SinTaC susceptor and ambientgas (atmospheric-pressure N2). To execute the calculations, theCOMSOL v4.4 software [19] was used, and the temperature profileand accompanying thermal stress (Von Mises stress) on the Siwafer were estimated.

To enable future investigations of SinTaC components in CVDapplications, we demonstrated the fabrication of a large-sizedmulti-wafer CVD susceptor made of SinTaC for use in planetaryCVD-SiC and MOCVD-GaN growth systems and a complex-shaped heater for use in an MOCVD-GaN growth system. Thelarge-sized CVD susceptor consisted of a mother susceptor withan outer diameter of 320 mm and six subordinate susceptors withan outer diameter of 100 mm. The optimal graphite material interms of both available size and coefficient of thermal expansion(CTE) matching [12] was adopted for the fabrication of the large-sized SinTaC susceptors.

3. Results and discussion

3.1. CVD-SiC epitaxial growth with a SinTaC susceptor

Fig. 3(a) and (b) show photographs of the SinTaC plate susceptorbefore and after the CVD-SiC epitaxial growth, respectively. A com-parison of the photographs reveals that, although SiC polycrystalswere deposited onto the SinTaC susceptor, no major damage(cracking or peeling of the SinTaC layer) on the SinTaC susceptorwas observed, consistent with our expectations. The surface mor-phologies of the CVD-SiC epilayers with SinTaC and poly-SiC sus-ceptors (Fig. 3(c) and (d), respectively) were quite similar to eachother, with the exceptions of slightly more prominent step bunch-ing for the poly-SiC plate susceptor and a slightly larger number ofparticles for the SinTaC plate susceptor. The prominent step bunch-ing for the epilayer with the poly-SiC plate susceptor might be dueto the lower actual substrate temperature with the poly-SiC platesusceptor than that with the SinTaC plate susceptor, which, in turn,

Fig. 3. Photographs of (a) an as-formed SinTaC plate susceptor and (b) a SinTaCplate susceptor used for CVD-SiC epitaxial growth, which shows no damage on aSinTaC layer after the growth. Optical micrographs (surface morphology) obtainedfrom CVD-SiC epilayers formed with (c) the SinTaC plate susceptor and (d) the CVD-SiC plate susceptor for comparison.

might be caused by the difference in thermal radiation emissivitybetween TaC (�0.3) and SiC (0.7–0.8) [20,21]. Because a lower sub-strate temperature leads to a lower removal rate during the pre-growth H2 etching treatment, the mechanically damaged surfacelayer tends to remain even after the etching process. This remain-ing damage in the surface layer is known to be one of the maincauses of severe step bunching [6]. In addition, the slightly largernumber of particles for the epilayer with the SinTaC plate suscep-tor is attributed to debris peeled from the SiC polycrystals thatformed on the upstream surface of the SinTaC plate susceptor(some of the particles could be wiped out, while some of themwere embedded in the epilayer); this peeling was likely due to acombination of the thermal stress induced by cooling and theCTE mismatch between TaC and SiC. Although this additional par-ticle generation due to the CTE mismatch can be a negative point ofTaC-coated susceptors, the generation of these particles couldlikely be suppressed through optimization of the gas-purge processand/or after-growth cleaning process.

The average impurity concentrations in the SiC epilayers grownwith SinTaC and poly-SiC susceptors (and those in a SiC substratefor reference) are summarized in Fig. 4. The concentrations of mostof the impurities (except Al) in the epilayers were at the back-ground levels or were below the detection limits of SIMS. Only Alin the epilayer with the SinTaC susceptor was present in a concen-tration greater than its lower detection limit, although its concen-tration was still quite low (�1 � 1015 cm�3). According to Ref. [22],the annealing at 1600 �C for 36 min (as same as the conditionemployed for the SiC epitaxial growth) should result in very shortout-diffusion length (

Fig. 5. Photographs of (a) an as-formed SinTaC susceptor and (b) a SinTaC susceptor used for MOCVD-GaN epitaxial growth, which shows no damage on a SinTaC layer afterthe growth. Optical micrographs (surface morphology) obtained fromMOCVD-GaN epilayers formed with (c) a SinTaC susceptor and (d) a SiC-coated carbon susceptor, whichindicate slightly more roughened (step-bunched) surface with the SinTaC susceptor.

D. Nakamura et al. / Journal of Crystal Growth 478 (2017) 163–173 167

control of the carrier density (n�: 1–2 � 1016 cm�3) needed for thedrift layers of unipolar SiC devices (e.g., Schottky diodes and MOS-FETs) with blocking voltages of 1–2 kV [6], which have the widestapplication in high-output motor controls. If we aim at bipolar SiCdevices with ultrahigh blocking voltages of >10 kV, it might be nec-essary to further reduce impurity incorporation (possibly origi-nated from the SinTaC susceptor). To strictly prevent theimpurity incorporation, we will need to develop additional tech-niques such as annealing-out procedures. Thus, we conclude thatthe incorporation of impurities from SinTaC susceptors to CVD-SiC epilayers is negligible (at least in terms of the use for unipolardevices) and that SinTaC can be used as a susceptor to form high-purity thick SiC epilayers (drift layers) for power devices.

3.2. MOCVD-GaN epitaxial growth with SinTaC susceptor

Fig. 5(a) and (b) show photographs of the SinTaC susceptorbefore and after MOCVD-GaN epitaxial growth, respectively. Acomparison of the photographs reveals that, although poly-GaNcrystals were deposited onto the outer edge of the SinTaC suscep-tor, no major damage on the SinTaC susceptor is evident, consistentwith our expectations. The surface morphologies of the MOCVD-GaN epilayers with the SinTaC and SiC-coated carbon susceptors(Fig. 5(c) and (d), respectively) were quite similar to each other,with the exception of a slightly rougher surface for the SinTaC platesusceptor; the possible cause of this surface roughening will bediscussed later.

Fig. 6(a)–(d) represent SIMS depth profiles in the epilayersgrown with the SinTaC (Fig. 6(a) and (b)) and SiC-coated carbon(Fig. 6(c) and (d)) susceptors. From these profiles, the thicknessesof top n-GaN epilayers (Si-doped layers: �1 � 1017 cm�3) withthe SinTaC and poly-SiC susceptors were confirmed to be identical,with a value of �2 lm (matching the target thickness of 2 lm). Thethicknesses of the underlying UD-GaN layers were greater than1.5 lm; their thickness was limited by the analysis depth, butwas likely similar to the target thickness of 3 lm. This coincidenceof epilayer thicknesses should ensure that the actual substratetemperatures on the SinTaC and SiC-coated carbon susceptors

were approximately equivalent to each other during the epitaxialgrowth at 1030 �C (compared to the SiC-coated susceptor, theactual substrate temperature on the SinTaC susceptor might shiftca. �40 �C during the epitaxial growth at 1030 �C as discussedlater). The average impurity concentrations in the UD-GaN epilay-ers grown with SinTaC and SiC-coated carbon susceptors are sum-marized in Fig. 6(e). All of the impurity concentrations in theepilayers with SinTaC and SiC-coated carbon susceptors were iden-tical to each other, and no trace of impurity incorporation from Sin-TaC (e.g., Ti, Fe, or Co) was identified (i.e., their concentrations wereunder the SIMS detection limits). Thus, we can conclude that theimpurity incorporation from SinTaC susceptors to MOCVD-GaNepilayers is also negligible, and SinTaC components can be utilizedas susceptors to form high-purity GaN epilayers.

Although both the surfaces of the MOCVD-GaN epilayers withthe SinTaC and SiC-coated carbon susceptors were mirror-smooth through visual inspection, the observation by differentialinterference microscope revealed that the surface morphologywith the SinTaC susceptor was slightly rougher than that withthe SiC-coated carbon susceptor due to the step bunching(Fig. 5(c) and (d)). In the GaN hetero-epitaxial growth, a varietyof factors can cause the step bunching, e.g., LT-buffer layer thick-ness [23], compressive stress [24], Ehrlich-Schwöbel barrier (ESB)[25], and so on. As mentioned later, because the actual substratetemperature during LT buffer growth with the SinTaC susceptormight be dropped by �20 �C compared to SiC susceptor, thethickness of LT-buffer layer might be also decreased. This thinnerLT-buffer layer can cause larger compressive stress in the subse-quent high-temperature GaN layers [26,27], which could poten-tially enhance the step bunching [24]. On the other hand, theslight substrate temperature drop (estimated to be �40 �C) dur-ing the high-temperature GaN growth could also enhance thestep bunching by the pronounced effect of the ESB at lowergrowth temperatures [25]. In any case, the slight temperatureshifts from the optimal process temperatures could cause moreprominent step bunching; therefore the optimal susceptor tem-peratures for the SinTaC susceptor should be slightly re-optimized.

Fig. 6. SIMS depth profiles of impurity concentrations obtained from MOCVD-GaN (n: Si-doped)/MOCVD-GaN (UD: unintentionally doped) epilayers on sapphire substrates:(a, b) grown with a SinTaC susceptor and (c, d) grown with a SiC-coated carbon susceptor. The primary ion used for profiles (a, c) was Cs+, and that used for profiles (b, d) wasO2+. The increases in the C and O concentrations in the surface layer (depth < 0.5 lm) of (a) are likely due to tailing of surface contaminants accompanied by surfaceroughening, as shown in Fig. 5(c). (e) Comparison of the average impurity concentrations in UD-GaN epilayers grown with SinTaC and SiC-coated carbon susceptors, alongwith the SIMS background level (or detection limit) of each impurity element.

168 D. Nakamura et al. / Journal of Crystal Growth 478 (2017) 163–173

The surface roughening of the epilayer grown with the SinTaCsusceptor (Fig. 5(c)) might indicate degradation of crystal quality;therefore, an X-ray rocking curve measurement was conducted toassess the crystal quality of the GaN epilayers. Fig. 7 shows theX-ray rocking curves with (0 0 2) and (1 0 0) reflections obtainedfrom the epilayers grown with SinTaC and SiC-coated carbon sus-ceptors. The full-width at half-maximum values of the X-ray rock-ing curves obtained from the epilayer grown with the SinTaCsusceptor (624 and 1832 arcsec for the (0 0 2) and (1 0 0) reflec-tions, respectively) were slightly larger than those obtained forthe epilayer grown with the SiC-coated carbon susceptor (422and 1497 arcsec for the (0 0 2) and (1 0 0) reflections, respectively);this difference indicates a slightly lower crystal quality in the caseof the SinTaC susceptor than in the case of the SiC-coated suscep-tor. The quality difference in this range can be explained by a slightdifference in substrate temperature during the deposition of theLT-AlGaN buffer layer. Hoshino et al. [28] have reported that the

crystal quality of epilayers grown at high temperatures(�1000 �C) is sensitively influenced by the deposition temperature(420–500 �C) of the underlying LT-GaN buffer layer. As previouslymentioned, the thermal radiation emissivities of TaC (�0.3) and SiC(0.7–0.8) differ substantially; thus, the actual substrate tempera-ture with the SinTaC susceptor should differ slightly from that withthe SiC-coated susceptor. If the temperature is assumed to havedeviated slightly (e.g., by �20 �C) from the optimum temperatureduring the growth with the SinTaC susceptor, the broadenings ofthe X-ray rocking curves with the SinTaC susceptor are reasonable.It is known that an inadequate LT-buffer layer thickness oftencauses lower quality GaN layer in terms of crystallinity and elec-tronic/optical properties [23,27,29,30]. For example, Ref. [23]reported that the slight deviation (�10%) of LT-buffer layer thick-ness from the optimal thickness leads to �60% increase in FWHMof X-ray rocking curves for the (0 0 2) reflection, the increased frac-tion of which is almost identical to our result. In addition, the

Fig. 7. x-Scan X-ray rocking curves with GaN(0 0 2) and GaN(1 0 0) reflectionsobtained from MOCVD-GaN epilayers grown with SinTaC and SiC-coated carbonsusceptors, which indicate slightly worse crystal quality of the epilayer grown withSinTaC susceptor.

D. Nakamura et al. / Journal of Crystal Growth 478 (2017) 163–173 169

growth rate of LT-buffer layers is strongly dependent on the sub-strate temperature [31], e.g. a 20 �C drop in the substrate temper-ature causes a 50% decrease in the growth rate of LT-GaN-bufferlayer at the deposition temperature of �500 �C. Therefore, wecan deduce that the slight deviation (estimated to be ca. �20 �C)in the actual substrate temperature with the SinTaC susceptorcompared to SiC-coated susceptor could cause thinner LT-bufferlayer and accompanying increase in the FWHM of X-ray rockingcurves. Thus, the re-optimization of the growth conditions withSinTaC susceptors, especially in the case of the LT buffer layer, willbe necessary to obtain high-quality GaN epilayers.

Because the emissivity of the SinTaC susceptor is �1/2 of theSiC-coated carbon susceptor, the thermal radiation power fromthe SinTaC susceptor must be reduced to �1/2 of that from theSiC-coated carbon susceptors (assuming the same susceptor tem-perature). This reduction in thermal radiation indicates that theheat transfer through thermal radiation from the SinTaC susceptorto the substrate would be reduced. Assuming that the thermalradiation accounted for the �1/5 of total heat transfer (includingthermal conduction and convection) in the case of the simplestsusceptor design as shown in Fig. 1(b), we can roughly estimatethat the actual temperatures of a substrate placed on the SinTaC

Fig. 8. Bird’s-eye view SEM images of (a) SinTa

susceptor should decrease by 20–40 �C in the susceptor tempera-ture range of 500–1000 �C compared to those on the SiC-coatedcarbon susceptor. Therefore, it is deduced that the optimal suscep-tor temperature for the SinTaC susceptor should be slightly shifted(by ca. +20 to +40 �C) with respect to that for the SiC-coatedsusceptor.

3.3. Control of surface roughness of SinTaC

In CVD applications, thermal (or electrical) contact resistancebetween the wafer and susceptor (or between component parts)is one of the critical characteristics required to achieve preferabletemperature profiles in wafer and/or CVD reactors and to maintainprocess reproducibility. To control the contact resistance, the sur-face profiles (roughness and waviness) of components must becontrolled. When susceptors with an extremely rough surface areused in CVD processes, the rough surface leads to high thermal/-electrical contact resistance, which contributes to the homoge-neous temperature profiles induced by radiation heating and tothe suppression of undesirable adhesion between the wafer andthe susceptor. By contrast, a smooth surface leads to low thermal/-electrical contact resistance, which contributes to a higher effi-ciency of heat transfer among components and to higherelectrical conductivity between heater electrodes. Because SinTaCcomponents are prepared by a two-step process of powder formingand sintering, an additional surface treatment after the powder-forming step can easily modify the surface profiles of the resultantSinTaC layer after the sintering step, i.e., SinTaC-POLISH, SinTaC-SMOOTH, and SinTaC-MAT, as described in Fig. 2. Using these man-ufacturing schemes, we prepared surface-roughness-controlledSinTaC samples. Fig. 8(a) and (b) show SEM images of theSinTaC-SMOOTH and SinTaC-MAT surfaces, respectively, whichclearly indicate that the surface profiles of the SinTaC componentscan be easily controlled over a wide range from very smooth toextremely rough.

To quantitatively confirm the controllable range, we collectedline-scan surface profiles of the surface-roughness-controlled Sin-TaC components. As clearly evident in Fig. 9(a), compared withthe surface profile (height variation) of the SinTaC-NORMAL com-ponent (which is approximately the same as that of a commercialCVD-TaC sample), the profiles of the SinTaC-POLISH and SinTaC-SMOOTH components were much smoother, whereas that of theSinTaC-MAT component was much rougher. The calculated indicesof surface profiles (i.e., roughness Ra and Rz: average and maxi-mum height variation with short wavelength; waviness Wa andWz: average and maximum height variation with long wavelength)are summarized in Fig. 9(b) and (c). The surface roughness of theSinTaC-POLISH (smallest) and SinTaC-SMOOTH (second smallest)was reduced to almost half of that of the SinTaC-NORMAL, and thatof the SinTaC-MAT was enhanced fivefold compared with that of

C-SMOOTH and (b) SinTaC-MAT samples.

Fig. 9. (a) Line-scan surface profiles of SinTaC-POLISH, SinTaC-SMOOTH, SinTaC-NORMAL, SinTaC-MAT, and CVD-TaC samples. (b) Arithmetic average roughness Ra andmaximum height roughness Rz for the samples (lower cutoff wavelength ks = 2.5 lm, upper cutoff wavelength kc = 0.8 mm, and measurement length l = 4 mm). (c) Arithmeticaverage waviness Wa and maximum height waviness Wz for the samples (lower cutoff wavelength kc = 2.5 mm, upper cutoff wavelength kf = 25 mm, and measurementlength l = 12.5 mm).

170 D. Nakamura et al. / Journal of Crystal Growth 478 (2017) 163–173

the SinTaC-NORMAL. Similarly, the surface waviness of the SinTaC-POLISH (second smallest) and the SinTaC-SMOOT (smallest) wasreduced to one-third to one-seventh of that of the SinTaC-NORMAL, and that of the SinTaC-MAT was enhanced approxi-mately twofold compared with that of the SinTaC-NORMAL. Onthe basis of these results, we conclude that SinTaC-SMOOTH isthe best manufacturing scheme for obtaining the smoothest sur-face both in terms of roughness and waviness. Since the SinTaC-MAT surface is extremely rough, a susceptor with that surfacecan hold a wafer almost by non-contact holding in terms of heattransfer with a low density of point contacts.

Additionally, the difference of thermal radiation power of theSinTaCs on roughness should be considered to be quite smallbecause the emissivity difference on the surface roughness of Sin-TaCs (SinTaC-NORMAL, SinTaC-SMOOTH, and SinTaC-MAT) wasestimated to be less than 4% by applying experimentally-obtained surface roughness parameters to the equations in Ref.[32].

The advantage of SinTaC-MAT as CVD susceptor was verifiedthrough simplified 2D-FEM simulations. Fig. 10(a) shows the struc-ture of the single-wafer CVD-Si epitaxial growth system consideredin the 2D-FEM simulation; it also presents the calculated globaltemperature profile by color-coded scale. In the case of theSinTaC-MAT susceptor, the direct heat transfer (thermal contact)from the SinTaC-MAT susceptor to the Si wafer was deemed zero,

and a 10 lm gap was set between the SinTaC-MAT susceptor andthe wafer because of its extremely rough surface (only indirectheat transfer by thermal radiation and gas thermal conductionwas considered). In the case of the SinTaC-NORMAL susceptor(with surface roughness of Ra1), the heat-transfer resistance Rcfrom the SinTaC-NORMAL susceptor to the Si wafer (with surfaceroughness of Ra2) without any fixing pressure on the Si waferwas estimated by an empirical equation:[33]

1=Rc½m2 � K=W� ¼ 105 � cRa1½lm� þ Ra2½lm� ð1Þ

where Ra1 is set to 1 lm as the measured Ra value of the SinTaC-NORMAL sample, Ra2 is considered zero for the Si wafer with a pol-ished back surface, and the c (�0.15) is an experimentally derivedconstant. The temperatures of the heaters were set to 1750 �C forheater #1 (inner heater) and 1800 �C for heater #2 (outer heater).

Calculated profiles of surface temperatures of the Si wafers andVon Mises stresses exerted on the Si wafers with SinTaC-NORMALand SinTaC-MAT susceptors are shown in Fig. 10(b). The surfacetemperature of the wafer with the SinTaC-MAT became morehomogeneous than that with the SinTaC-NORMAL susceptor. As aresult, the stress exerted on the Si wafer (especially on the waferedge) with the SinTaC-MAT susceptor was reduced to 10 MPa at the wafer edge (even if the temperature for heater

Fig. 11. Photographs of SinTaC components fabricated as (a) a multi-wafer CVD susceptor (£200 � 2, £300 � 2, and £100 mm � 2 wafers) for a SiC and GaN epitaxial growthsystem and as (b) a resistive heater for an MOCVD growth system.

Fig. 10. (a) Structure of the 2D-FEM simulation for a single-wafer (Si: £200 mm) CVD epitaxial growth system, where the calculated temperatures are represented by acolor-coded scale. (b) Calculated profiles of surface temperature of Si wafer and Von Mises stress exerted on an Si wafer treated with a SinTaC-NORMAL susceptor (Ra = 1 lm,without a gap between the Si wafer and the susceptor) and a SinTaC-MAT susceptor (with a 10 lm gap between the Si wafer and susceptor).

D. Nakamura et al. / Journal of Crystal Growth 478 (2017) 163–173 171

#2 was modified from 1800 �C to 1750 or 1700 �C in order toimprove the temperature uniformity, the calculated stress valuesat the wafer edge were almost at the same levels). This result

guarantees, at least in the case of the considered reactor structure,that the adoption of SinTaC susceptors is advantageous to preventslip dislocations from forming at the wafer edge because the

172 D. Nakamura et al. / Journal of Crystal Growth 478 (2017) 163–173

critical shear stress to generate slip dislocations at �1000 �C indislocation-free Si crystals was reported to be �10 MPa [34,35].This result do not assure that SinTaC-MAT susceptors always con-tribute to higher temperature uniformity and lower thermal stress;however, the SinTaC-MAT offers more options how to control tem-perature profiles. Thus, the SinTaC susceptors will contribute toimprovement of the crystal quality of the epilayers as well as toa reduction of the epi-cost. Besides, the high uniformity of temper-ature profile with SinTaC-MAT susceptors might also contributethe uniformity of thickness and/or doping concentrations [16].

3.4. Fabrication of SinTaC components for future CVD applications

Finally, we demonstrated the fabrication of large-sized SinTaC(multi-wafer CVD susceptor) and complex-shaped SinTaC (MOCVDresistive heater) components for future practical investigations inCVD applications. Fig. 11(a) shows the susceptor for a multi-wafer CVD or MOCVD system, which consisted of a mother suscep-tor with£320 mm and six subordinate susceptors with£100 mm(for £200 � 2, £300 � 2, and £100 mm � 2 wafers). Through visualinspection, all of the components were confirmed to be well densi-fied and successfully fabricated without major defects such ascracks or peeling in the SinTaC layers. The SinTaC susceptors willcontribute to enhancing the lifetime of susceptors and to reducingthe epi-cost in the large-scale production of epi-wafers. Further-more, the resistive heater for an MOCVD-GaN growth systemwas successfully fabricated, as shown in Fig. 11(b). The SinTaC hea-ter will contribute to preventing the unintentional incorporation ofboron into MOCVD-GaN epilayers (Fig. 6(e)), which can cause theformation of nanopipe defects [15], by replacing the conventionalpBN-coated carbon heater. Thus, we believe that the adoption ofvarious SinTaC components in practical CVD systems will reducethe production cost of wide-bandgap epi-wafers and mightimprove the crystal quality of epi-wafers.

4. Conclusions

We used a new susceptor material, SinTaC, in CVD-SiC andMOCVD-GaN epitaxial growth processes. The residual impuritiesin the SinTaC susceptors did not severely incorporate into theresultant CVD-SiC and MOCVD-GaN epilayers, which confirmedthat the SinTaC susceptors are suitable for use in epitaxial growthprocesses to reduce the epi-cost because of its expected longer life-time compared to conventional susceptor materials. The actualsubstrate temperature with SinTaC susceptors seemed to slightlyshift due to the low thermal emissivity of TaC, which indicates thatslight temperature adjustment will be required to achieve optimalgrowth conditions when conventional susceptors are replaced bySinTaC susceptors. Furthermore, the surface roughness of SinTaCcomponents was confirmed to be controllable over wide ranges(0.4 � Ra � 5 lm and 3 � Rz � 36 lm) through additional surfacetreatment procedures. Through 2D-FEM simulations, the SinTaCsusceptors with the roughest surface profile were found to beadvantageous in achieving a uniform temperature profile, a lowstress profile, and resultant higher crystal quality without the gen-eration of slip dislocations. Finally, the fabrication of practicallarge-sized SinTaC susceptors and complex-shaped heaters wasdemonstrated to enable the application of SinTaC components inpractical processes in the near future.

Acknowledgments

The authors would like to thank Dr. K. Shigetoh, T. Yamada, andH. Iguchi for the experimental support and Dr. T. Saito, Prof. T. Tani,

Dr. K. Nishikawa, Dr. K. Horibuchi, and Dr. M. Nakano for the fruit-ful discussions.

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TaC-coated graphite prepared via a wet ceramic process: Application to CVD susceptors for epitaxial growth of wide-bandgap semiconductors1 Introduction2 Experimental3 Results and discussion3.1 CVD-SiC epitaxial growth with a SinTaC susceptor3.2 MOCVD-GaN epitaxial growth with SinTaC susceptor3.3 Control of surface roughness of SinTaC3.4 Fabrication of SinTaC components for future CVD applications

4 ConclusionsAcknowledgmentsReferences

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