iTOP & KLM Electronics• US Role in Electronics and Trigger/DAQ• US Role in Electronics and Trigger/DAQ

1G. Varner 17-SEP-2010 Indiana University Introduction

High Luminosity B-factoryAt L = 8 x 1035 cm-2/s :• Pipelined readout: pe ed eadout:128k channels equiv., 40MHz x 2bytes

80 Tera-bytes per second! (2,000 DVDs per second)y p

Global Decision logic trigger: 30kHz• FIFO: 128k channels equiv 16 bytes• FIFO: 128k channels equiv., 16 bytes

60 Giga-bytes per second! (200 GbE links)

COPPER, online Farm

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300-500 Mega-bytes per second! (max. data rate to disk)

High LuminosityAt L = 8 x 1035 cm-2/s :• Pipelined readout: pe ed eadout:128k channels equiv., 40MHz x 2bytes

80 Tera-bytes per second! (10,000 CDs per second)y p

Global Decision logic trigger: 30kHz• FIFO: 128k channels equiv 16 bytes• FIFO: 128k channels equiv., 16 bytes

60 Giga-bytes per second! (200 GbE links)

COPPER, online Farm

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300-500 Mega-bytes per second! (max. data rate to disk)

Comparable to LHC experiments

Unified Readout

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Got fiber?

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Belle/Belle II Common Electronics

FIFOFIFO

Local Bus PCI Bus

tor S

igna

lsFINESSEFINESSE BridgeBridge

Mezzanine Cards

FIFOFIFO

FIFOFIFO MemoryMemory

BridgeDet

ect

FINESSEFINESSE

FINESSEFINESSE

PCI Mezzanine Cards

FIFOFIFO CPUCPUFINESSEFINESSE

Trigger interruptControlControl BridgeBridge

• COPPER (COmmon Pipelined Platform for Electronics Readout)

Trigger inputgg p

• Used in J-PARC experiments

• Card ~ crate – aid in data reduction

• On board data reduction

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• On board data reduction

• FINESSE (Frontend Instrumentation Entity for Subdetector Specific Electronics)

• Limited Manpower (construction & maint.)

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COPPER board RadiSys EPC-6315

– Intel P3 800 MHz256 MB memory

FINESSE×4(or 2 double sized)

– 256 MB memory– Network boot– RedHat Linux 9onboard CPU

(online data reduction, etc…)(or 2 double sized) (online data reduction, etc…)

VME9U

Trigger module

100BaseT port×2b t/ t l d t t f For Belle II:

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boot/control, data transfer For Belle II: upgrade CPU,

network to 1Gbit

Belle II Barrel-PID DAQ SummarySame numbers in either detector configuration

128 DAQ fiber transceivers

8k channels

32 FINESSE8 COPPER

1k BLAB3128 SRM

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Building toward 1/16 system test

BLAB3

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Scintillator for endcap KLM

The geometry is fixed by the 4cm gaps of the iron magnet flux return yoke

RPC frame

g y

Two independent (x and y) layers in each superlayer composed of rectangular strips (L=0.6–2.8 m)

Photodetector (one per strip) is a Geiger mode Avalanche Photodiode (GAPD)

Outer dead zone is ~ 3%

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Scintillator option for endcap KLM• Plastic scintillator + WLS fiber read out successful in many neutrino

experiments (MINOS, MINERva, OPERA, T2K near detector), because of relatively low price high reliability because of relatively low price, high reliability.

Scintillator strips for OPERA target tracker

• Belle II has high rate and high occupancy• Belle-II has high rate and high occupancy

• The choice of photodetector:

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p– Photomulitpliers are bulky and magnetic field. – New multipixel Si photo diodes operating in Geiger mode are tiny and insensitive to the

magnetic field.

Geiger-mode APDsh

Al

Matrix of independent tiny pixels arranged on a common substrate (200−2000 pixels)

R 50DepletionRegion2 m Substrate

Each pixel operates in a self-quenching Geiger mode with gain ~106.Ubias

Photon detection Efficiency ~30%

Compact: typical matrix size ~ 1 × 1 mm2

Relatively Cheap: 20−30$/device

Insensitive to magnetic fieldsInsensitive to magnetic fields

Radiation hardness is sufficient for the endcap

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Noise is 100kHz − 2MHz not a problem: 5 p.e. threshold reduces rate to < 1kHz while maintaining ~ 99% MIP efficiency

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Endcap KLM Readout uses “oscilloscope on a chip”

110 DAQ fiber transceivers

28k channels1.8k TARGET2

transceivers28 FINESSE7 COPPER

110 SRM

TARGETKLM Si PMs

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KLM – Si-PMsResolve individual p.e.

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Barrel KLM Readout – very similar

110 DAQ fiber transceiverstransceivers

28 FINESSE7 COPPER

28k channels1.8k 16-channel

Waveform samplingASICs

110 SRM

Barrel KLM Readout18

Barrel KLM Readout – No ASIC – FPGA as digitizer

Schedule, Organization & Manpower

• DOE support level TBD (Intensity Frontier Rev)

• Project moving forward – 2013 completion, 2014 running (complete R&D “soon”) start2014 running (complete R&D soon ) start production

• Manpower limited, define partionable tasks

• Work packages and task sharing

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Questions?How to start?

Back-up slides

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iTOP Readout concept

Top ViewTop View2x 64-channel PMTs per fiber link

56x BLAB3 daughtercards (112x BLAB3)896 PMT channels/mod le (16 iTOP sta es)

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896 PMT channels/module (16 iTOP staves) 7 data, 7 trigger fiber pairs + HV power, LVDS

RF clock, Revolution marker pairs

BLAB timing performance:

• Comparable performance to best

CH1

CFD + HPTDC• MUCH lower power, no

d f h bl CH2need for huge cable plant!

• Using full samples

CH2

Using full samples significantly reduces the impact of noise

6 4 RMS• Photodetector limited 6.4 psRMS

22Advanced Detector Research award

NIM A602 (2009) 438

Photo-detector: Hamamatsu SL-10A i t 1” 1”• Approximate 1” x 1”

• 4 x 4 multi-anode• Interesting mechanical

challenges (case at HV)g ( )• Lifetime protection

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SL-10 Timing PerformanceNagoya Hawai’iNagoya Hawai i

σ 38 37σ ~ 38.37

N f i di i i CAMAC• Nagoya = constant fraction discriminator + CAMAC ADC/TDC H i’i f li + f t t ti

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• Hawai’i = waveform sampling + feature extraction

Initial read-out electronics concept: fully integrated modules (too big)

100mm high147mm long

Current read-out concept: split modules for access and coolingCurrent read out concept: split modules for access and cooling

66.5mm high

front-end transceivermodule

transceiver module

2577mm long

iTOP with expansion volume and split electronics modules

transceiver modules: 100mm x 55mm x 25mm

front-end module: +PMTs

Access opening limits size

to front-end moduleto DAQ

p gof front-end electronics!

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DSP_FIN• 500 MHz processor per core• 32x waveform channels per

Dual Core DSP

core

Dual Core DSP 128 MB SDRAM2.54 GB/s

284x Fiber Optic Connections

Dual Core DSP 128 MB SDRAM28

127 MHz

• 1 to 4 clock repeater• 1 to 4 REV repeater

CLK_FIN• CDCE62005 (0.35 ps RMS output jitter)

• 0.5 A @ +3.3V (1.7 W) per CDCE62005

127 MHz

127 MHz

127 MHz127 MHz

127 MHz

2929

127 MHz