L1 Intro Fabrication

8/14/2019 L1 Intro Fabrication

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GENERAL INTRODUCTION

and

FABRICATION OF MOSFET

Dr. Arti Noor,M. Tech Division, CDAC Noida.Email : [email protected]

14-9-2009


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Course Outline:

Basic MOS Theory : Introduction, Basic MOS Model,MOS inverter, MOS Circuit Layout & Simulation.

Combinational MOS Logic Design : Static and DynamicMOS Design.

Sequential MOS Logic Design. Interconnect & Clock Distribution . BiCMOS Logic Circuits.

Details are given in Handout.LAB TOOLS Tanner Tools.Mentor Graphics Tools.


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TEXT BOOKS:

1. Kang & Leblebigi CMOS Digital IC Circuit Analysis &Design- McGraw Hill, 2003.

2. Rabey, Digital Integrated Circuits Design, PearsonEducation, Second Edition, 2003.

References:

Weste and Eshraghian, Principles of CMOS VLSI design Addison-Wesley, 2002.

Additional reading from selected journals / papers.


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Course Objectives:Students should be able to :

Derive basic analytical MOS circuit equations.Locate information not presented in class, in the library.Analyze circuits using both analytical and CAD tools.

Use a design flow to design a CMOS integrated circuit in a teamenvironment.Interpret a design specification.Design test benches that can prove that a design meet a

specification.Identify regions where circuit models are valid.


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Course Objectives

For students to learn IC design usingstate-of-art design flows and CAD tools.


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Lets get started

We will review (learn for first time?) MOSphysics (in detail).

Why MOSFETs? CMOS circuits dissipate power only when switching

(they do use power when not switching, but is muchless than other circuits).

This allows for more circuits to be placed on one die.


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SIMPLIFIED VLSI DESIGN FLOW VIEW IN

THREE DOMAINS


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Introduction

IC technologies :

NMOS PMOS CMOS SOI BiCMOS GaAs


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Basic Fabrication Steps:

Wafer Processing. Mask making. Photolithography.

Oxidation. Diffusion. Etching. Poly-gate formation.

Metallization.


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Basic Fabrication Steps: Wafer Processing : single crystal wafer, diameter

70 mm to 200 mm, thickness less than 1mm, front facepolished, scratch free mirror finish.


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Mask making : After complete design the drawing is broken into

subsequent IC processing steps. These steps are called mask levels.

Electron beam machine known as patterngenerator is used for mask making. The interface is CIF between layout and mask

machine.

Mask machine transfers design features directly onphotosensitive glass plate using CIF.


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Photolithography : The process used to transfer apattern on wafer is called lithography. The processhas 6 steps.

1. Photoresist Coating.2. Pre baking.


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3. Alignment and exposing.


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4. Development.5. Post baking.


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Wafer after Removal of photoresist.


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Oxidation : The purpose of SiO 2 layer is

1. acts as component in MOS.2. acts as mask against diffusion.

3. used to isolate the devices4. provides electrical isolation in multilevelmetallization.

Several techniques : thermal oxidation, wetoxidation, CVD, Plasma oxidation.

LOCOS Oxidation for isolation.


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Diffusion : The purpose is to alter the type of conductivityby diffusing impurities.

Goal :

1. Control of impurity concentration.2. Uniformity.3. Reproducibility.

Two techniques : Furnace diffusion and IonImplantation.


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Metallization :

Is done to provide low resistance interconnects.

Common method is evaporation and sputtering. In high vacuum chamber the metal is deposited by

evaporation with subsequent condensation on

substrate target.


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Basic NMOS Fabrication Steps:

Formation of SiO 2 and then photoresist coating


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Photo-mask and then etching of selected area.


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The wafer is then placed into an oxidation furnace andthin oxide (the gate oxide) is grown to cover the etchedregion


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Basic NMOS Fabrication Steps:A layer of poly-crystalline silicon is deposited all over the

wafer.This layer is then patterned and etched to form the gate

of transistor .


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An n-type dopant is introduced into the opened regionsand diffused into the wafers.


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Oxide is deposited using Low Pressure Chemical Vapor Deposition (LPCVD) and is used for top coat protection.


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Basic NMOS Fabrication Steps:A layer of aluminum is deposited all over the wafer and

patterned and etched to form the interconnecting layersand the connections to channel Metal OxideSemiconductor.


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N-Well CMOS Fabrication Steps


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N-Well CMOS Fabrication Steps (contd.)


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Next Class Topic

Design Rules and MOS Transistor

Documents

L1 Intro Fabrication