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IEEE TRANSACTIONS ON POWER ELECTRONICS 1
Modulation Scheme for Three-PhaseDifferential-Mode Cuk Inverter
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Siamak Mehrnami, Student Member, IEEE, Sudip K. Mazumder, Senior Member, IEEE,and Harshit Soni, Student Member, IEEE
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Abstract—Three-phase differential-mode inverters are single-5stage inverters, which have the potential to reduce the number of6devices and cost with higher power density. Among such inverter7
topologies, differential-mode three-phase Cuk inverter (DTCI)8has some advantage over other topologies, including modular-9ity, lower number of switches, bidirectional power flow capabil-10ity, and galvanic isolation. DTCI is a promising configuration for11renewable-/alternative-energy applications with isolated and non-12isolated structures. The continuous modulation scheme (CMS),13which was introduced originally for the DTCI, activates all of three14modules of the inverter. CMS increases the circulating power in15modules and hence increases inverter power loss. This paper de-16scribes a discontinuous modulation scheme (DMS) for the DTCI17which deactivates one module at a time resulting in a discontin-18uous operation of the inverter modules. The experimental open-19and closed-loop results of DMS- and CMS-based DTCI are pro-20vided and compared. DMS reduces the circulating power, device21voltage ratings, and mitigates the DTCI losses. The DTCI exhibits22a nonlinear voltage gain with both DMS and CMS. It has been23demonstrated that by feed-forwarding the input voltage and incor-24porating a static linearization method, the harmonic distortion of25the output voltage is considerably reduced.26
Index Terms—Cuk, differential-mode, feed-forward, high-27frequency link, inverter, linearization, modulation, rectifier, renew-28able/alternative energy, single stage, switched-mode power supply29(SMPS), three phase.30
I. INTRODUCTION31
A S photovoltaics, batteries, and other renewable/alternative32
power sources continue their rapid growth, inverters are33
getting increasingly important both economically and environ-34
mentally. Many topologies have been introduced for three-phase35
inverters in the literature [1]–[3]. A typical transformer-less36
topology has a bridge architecture [4], [5]. It can be cascaded37
with boost converter on the dc side to achieve a peak gain38
higher than unity [6]. These topologies may yield common-39
mode leakage current for some applications [7], [8]. For some40
other applications, higher peak voltage gain requirement may41
give rise to the need for a transformer [9]. Given the need for low-42
cost inverter with galvanic isolation, high-frequency-link (HFL)43
inverters have emerged as a potential front runner [10]–[15].44
The simplest HFL topology often has a multistage topological45
Manuscript received January 1, 2015; revised April 9, 2015; accepted May26, 2015. Recommended for publication by Associate Editor F. Gao.
The authors are with the Laboratory for Energy and Switching-ElectronicsSystems, Department of Electrical and Computer Engineeringm, Universityof Illinois at Chicago, Chicago, IL 60607 USA (e-mail: [email protected];[email protected]; [email protected]).
Color versions of one or more of the figures in this paper are available onlineat http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TPEL.2015.2442157
Fig. 1. Illustration of the DTCI topology, which comprises three modules(Module A, Module B, and Module C).
architecture to accommodate the high-frequency transformer. 46
The stages of multistage topology may be decoupled by a dc- 47
link capacitor or dc-link inductor [16]. That may add to sys- 48
tem cost, reliability, loss, and power density. Slightly modified 49
topologies have been presented [10], [12]. They remove the dc 50
link capacitor/inductor by using special modulation techniques 51
[14]–[16], while they may achieve reduction in switching loss. 52
Overall, for low-power applications, the cost-benefit tradeoff of 53
a multistage HFL inverter topology requires careful attention. 54
As such, for low-power three-phase HFL inverter applications, 55
there is an enhanced thrust to seek single-stage topological so- 56
lutions [17]–[20]. 57
Single-stage topologies [21] are categorized, reviewed, and 58
compared in [3]. Input-series output-parallel topologies are in- 59
troduced in [22] and [23]. Three-phase SEPIC-based inverter 60
is shown by Diab et al. [24]. Differential-mode single-phase 61
Cuk inverter is introduced in [25], and its design and modu- 62
lation are presented in [26] and [27]. In [22] and [28], it is 63
shown that topological embodiment of the differential inverter 64
with Cuk converter has some advantages. The general concept 65
of polyphase differential inverters are introduced and the origi- 66
nal differential-mode three-phase Cuk inverter (DTCI) topology 67
is proposed in [29]. The DTCI control and design using con- 68
tinuous modulation scheme (CMS) are presented by Cuk and 69
Erickson [30]. 70
This paper presents the isolated DTCI as shown in Fig. 1. 71
The isolated DTCI topology comprises three modules, which 72
are connected in parallel at the dc side and connected to com- 73
mon ground at the ac side. Three phase load is connected dif- 74
ferentially to the positive terminal of each module. The DTCI 75
yields several useful features [30] that directly impact the cost, 76
0885-8993 © 2015 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.See http://www.ieee.org/publications standards/publications/rights/index.html for more information.
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2 IEEE TRANSACTIONS ON POWER ELECTRONICS
reliability, and power density. The DTCI comprises a limited77
number of switches all of which are low-side driven. Further, the78
inverter has the ability to support bidirectional power flow using79
the same set of switches and a seamless control. Yet another80
feature of the inverter is its ability to support voltage step-up81
and step-down functionalities that also enables the utility of the82
basic differential-mode topology for even nonisolated applica-83
tions. An added capability of the HFL Cuk inverter is its ability84
to support line-frequency ripple current without a large isola-85
tion transformer. Due to the presence of the two blocking ca-86
pacitors on the primary and secondary sides of the transformer,87
the magnetizing current of the transformer is essentially devoid88
of any line-frequency current component. Finally, the possibil-89
ity of coupled inductors and transformer has been introduced90
by Cuk and Erickson [31], which enhances the compactness of91
the inverter and leads to reduced input and output ripples. The92
DTCI topology with a CMS outlined by Diab et al. [24], in93
which primary devices have three-phase sinusoidal modulating94
signals with a dc offset as common mode. The secondary-side95
devices are complementary with respective primary-side switch96
and considering a proper dead time. The common-mode dc off-97
set of the output terminal voltages cancel each other because the98
load is connected differentially across the output-voltage termi-99
nals. However, this modulation scheme leads to circulation of100
power or reactive power flow through modules even with resis-101
tive load. This yields higher switching and conduction losses.102
Further, the dc offset voltage on output terminals of modules103
increases the peak voltages on the devices [32].104
There is hardly any discussion on the need for proper mod-105
ulation scheme for the DTCI in the literature [24], [25]. The106
discontinuous modulation to overcome the issue for single-107
phase differential-mode Cuk inverter is proposed in [32]; how-108
ever, there are substantial differences between implementation109
of modulation for single-phase and three-phase inverter. As110
such, this paper outlines a discontinuous modulation scheme111
(DMS) for the DTCI along with a description of the CMS in112
Section II. Further, the paper provides analytical insight into the113
performance comparison of DMS and CMS in Section III. The114
nonlinear behavior of the inverter leads to distortion of its output115
voltage when operating with either of the modulation schemes.116
A static linearization method with input voltage feed-forward is117
proposed to address the problem in Section IV. It has been shown118
that by using this method, the total harmonic distortion (THD)119
is reduced significantly below the acceptable level. Closed-loop120
control system is designed based on proportional resonant (PR)121
compensator [33] and experimentally implemented. Section V122
presents the experimentally obtained results of efficiency, device123
peak voltages, closed-loop transient, and THD. The experiments124
are carried out with proposed structures in the paper for both125
modulation schemes. They verify the analytical/simulation re-126
sults of Section III and show the significant superiority of DMS127
over CMS. In the rest of the paper, the inverter refers to the128
DTCI.129
II. MODULATION SCHEMES FOR THE DTCI130
In this section, we first present the CMS for completeness of131
the discussion. The power flow mechanism will be presented to132
point to the motivation for searching another modulation tech- 133
nique. Then, the DMS will be proposed as a way to reduce 134
the circulation power. It helps to mitigate part of losses and to 135
reduce the ratings of the active devices. Its implementation on 136
a digital control processor is also easy as it does not involve 137
complex control algorithms. 138
A. Continuous Modulation Scheme 139
The line voltages of the inverter (VAB , VBC , and VC A ) are 140
calculated by subtraction of output terminal voltages (Vout1 , 141
Vout2 and Vout3). Based on that, the normalized static line- 142
voltage gain (gAB , gBC , and gC A ) relations can be defined as 143
follows: 144
⎧⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎨
⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎩
gAB =VAB
nVDC= gA − gB =
Vout1
nVDC− Vout2
nVDC
=(
Da
1 − Da− Dc
1 − Dc
)
gBC =VBC
nVDC= gB − gC =
Vout2
nVDC− Vout3
nVDC
=(
Dc
1 − Dc− De
1 − De
)
gC A =VC A
nVDC= gC − gA =
Vout3
nVDC− Vout1
nVDC
=(
De
1 − De− Da
1 − Da
)
(1)
where Da through De are duty cycles of switches Qa through 145
Qe , respectively, VDC is the dc input voltage, n is turns ratio 146
of the transformers and gA , gB , and gC represents the nor- 147
malized voltage gain of the phases. The method of modulation 148
that suggested by Barzegar and Cuk [29] is to generate three 149
phase sinusoidal waveforms at the output terminals of the mod- 150
ules. The output voltages of the modules are unipolar, thus a 151
common-mode dc-offset is added to the sinusoidal voltages of 152
the terminals. It is assumed that the common-mode dc-offset 153
voltages are equal for all phases; therefore, they cancel out on 154
the line voltages. Thus, the normalized phase-voltage gains (gA , 155
gB , and gC ) of the inverter with CMS are defined as follows: 156
⎧⎪⎪⎪⎪⎪⎪⎨
⎪⎪⎪⎪⎪⎪⎩
gA = g∗ (1 + sin (ωt + γ))
gB = g∗(
1 + sin(
ωt − 2π
3+ γ
))
gC = g∗(
1 + sin(
ωt − 4π
3+ γ
))
.
(2)
Line voltages are also obtained as follows, in which g∗ is 157
normalized peak phase-voltage gain, ω is angular line frequency, 158
and γ represents an arbitrary initial phase 159
⎧⎪⎪⎪⎪⎪⎨
⎪⎪⎪⎪⎪⎩
VAB =√
3nVDCg∗sin(ωt +
π
6+ γ
)
VBC =√
3nVDCg∗ sin(ω − π
2+ γ
)
VC A =√
3nVDCg∗sin(
ωt − 7π
6+ γ
)
.
(3)
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This modulation is called CMS because the power flows con-160
tinuously in all modules. In order to understand the effect of161
modulation on the power loss, the flow of power in the modules162
is investigated next. It is shown that using CMS, the reactive163
power flows in modules even in the case of pure resistive load.164
Assuming that the three-phase load is resistive, the output cur-165
rents of the modules are in synchronism with their respective166
phase voltage as are captured by167⎧⎪⎪⎪⎪⎪⎪⎨
⎪⎪⎪⎪⎪⎪⎩
IA =nVDCg∗
Rsin (ωt + γ)
IB =nVDCg∗
Rsin (ωt − 2π/3 + γ)
IC =nVDCg∗
Rsin (ωt − 4π/3 + γ)
(4)
where R is the load resistance. The instantaneous power of168
module (pA , pB , or pC ) is the multiplication of the respective169
phase voltage and the phase current as shown in170⎧⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎨
⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎩
pA =(nVDCg∗)2
R
[sin2 (ωt + γ) + sin(ωt + γ)
]
pB =(nVDCg∗)2
R
[
sin2(
ωt − 2π
3+ γ
)
+ sin(
ωt − 2π
3+ γ
)]
pC =(nVDCg∗)2
R
[
sin2(
ωt − 2π
3+ γ
)
+ sin(
ωt − 2π
3+ γ
)]
.
(5)
Fig. 2 illustrates the simple implementation of CMS-based171
DTCI and it also shows the waveforms of the modulating sig-172
nals, output terminal voltages, and line voltages. Fig. 3 shows173
the power waveforms of the three modules of the inverter oper-174
ating with CMS during a complete line cycle; they are derived175
using (5). The piecewise power flow direction diagrams are also176
illustrated. It can be seen that the power flow is positive during177
half a cycle for modules, which implies that power is trans-178
mitted from source to load with a peak of 2 (nVD C g ∗)2
R . During179
the other half of the same line cycle, a small amount of neg-180
ative power flows, which reaches the peak of − 14
(nVD C g ∗)2
R at181
two points. This implies that, during this time, a part of power182
that has been transmitted to the load side by other module(s)183
returns to the source. So it is evident that instantaneous power184
changes direction, which indicates the presence of circulating185
(or reactive) power. The reactive power is not desirable because186
it increases the peak power which leads to higher peak voltage187
or higher current stress on the components; further, the conduc-188
tion and switching loses increase as well. The reactive power of189
the CMS-based DTCI will be mathematically calculated and it190
will be compared with the corresponding results obtained using191
DMS; this will be illustrated in next section.192
B. Discontinuous Modulation Scheme193
The CMS was originally introduced for the low-power am-194
plifiers of analog circuits [29] with limited focus on power loss.195
Fig. 2. (a) Illustration of realization of the CMS for the inverter. (b) Illustrationof the modulating signal of the primary side switches (duty cycle), terminalvoltages (Vout1 , Vout2 , and Vout3 ) of Modules A, B, and C, and line voltages(VA B , VB C , and VC A ) of the inverter using the CMS.
Fig. 3. Instantaneous output powers waveforms of the inverter when it isoperating with CMS.
For the inverter, and as evident from the illustration in Fig. 3, the 196
modulation scheme needs to be revised with enhanced emphasis 197
on reducing circulating power and associated power loss. There- 198
fore, the major motivation for development of a new scheme is 199
to mitigate the circulating power. A similar concept of mod- 200
ulation method for single-phase inverter in [32] is used, but 201
implementation of the concept for three phase inverter is differ- 202
ent. A closer scrutiny of (5) reveals that, because the first term 203
is squared and is always positive, the negative portion of the 204
power is caused by the second expression inside the bracket. 205
This expression is originated from the dc offset voltage at the 206
output terminal voltages. So a reduction in the dc-offset voltage 207
will reduce the circulating power and the device voltage stress. 208
The reason for adding a common-mode dc-offset voltage to 209
the phase voltages is to meet the voltage polarity restriction of 210
the modules. It is noted that loads are connected differentially 211
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4 IEEE TRANSACTIONS ON POWER ELECTRONICS
Fig. 4. Three phases of the output terminal voltages of DTCI assuming nodc-offset. The highlighted lower push of waveforms shows the minimum of thethree phase voltages.
between terminals and this common-mode voltage do not appear212
on them. With ideally bipolar modules, there is no need for213
offset voltages to be added and terminal voltages would look214
like Fig. 4. In the case of DTCI, a common-mode offset voltage215
is needed to keep the terminal voltage positive. But the point216
is that, this common-mode voltage does not need to be a dc217
value and it can vary with the time. Vmin is the smallest voltage218
between three terminal voltages (Vout1 , Vout2 , and Vout3) of219
the above mentioned ideal inverter, as highlighted in Fig. 4. The220
idea is to add a variable-offset voltage, which is equal to absolute221
value of the voltage Vmin (|Vmin |) at each instant of the line cycle.222
The advantage of using this minimized variable common-mode223
voltage is the reduction of reactive power going through the224
inverter as can be inferred by (5). The Vmin is identical to one of225
the phases at each 120°; as a result, one terminal voltage equals226
to zero during a 120° interval. The positive terminal voltages are227
always guaranteed with offset voltage minimized at each instant228
of the time, by using the described offset voltage.229
The output terminal voltage will be zero during the one-230
third of a line cycle with the proposed method. As such, this231
modulation scheme is referred to as DMS. The mathematical232
presentation of output terminal voltages of inverter operating233
with DMS is shown below:234⎧⎪⎪⎪⎪⎪⎨
⎪⎪⎪⎪⎪⎩
Vout1 = nVDCg∗ [sin (ωt + γ) + |Vmin |]
Vout2 = nVDCg∗[sin(
ωt − 2π
3+ γ
)
+ |Vmin |]
Vout3 = nVDCg∗[
sin(
ωt − 4π
3+ γ
)
+ |Vmin |]
(6)
in which Vmin is defined by235
Vm in =⎧⎪⎪⎪⎪⎪⎪⎨
⎪⎪⎪⎪⎪⎪⎩
sin(
ωt − 4π
3+ γ
)
if − π
6+ 2πm < ωt + γ <
π
2+ 2πm
sin(
ωt − 2π
3+ γ
)
ifπ
2+ 2πm < ωt + γ <
7π
6+ 2πm
sin (ωt + γ) if7π
6+ 2πm < ωt + γ <
11π
6+ 2πm
(7)
where m is an integer.236
Fig. 5 shows the ideal waveforms of the modulating signals,237
output terminal voltages, and line voltages of the DMS-based238
Fig. 5. Illustration of the modulating signal (representing the duty cycle) of theprimary-side switches, terminal voltages (Vout1 , Vout2 , and Vout3 ) of ModulesA, B, and C, and line voltages (VA B , VB C , and VC A ) of the DMS-based DTCI.
Fig. 6. Instantaneous output powers waveforms of the inverter when it isoperated using DMS.
DTCI. Even though the output terminal voltages do not look like 239
sinusoidal waveforms and have discontinuity, the line voltages 240
(i.e., phase-to-phase) are clean sinusoidal waveforms. Fig. 6 il- 241
lustrates the power flow direction along with power waveforms. 242
The power varies between the positive peak of 1.616 (nVD C g ∗)2
R 243
and negative peaks of −0.116 (nVD C g ∗)2
R . Comparing the results 244
for DMS with the same results for CMS shows DMS has smaller 245
positive and negative peaks at the first place. 246
III. ANALYSIS 247
This section provides the theoretical evaluation and analysis 248
of the CMS and the DMS assuming ideal switches. Section V 249
provides validating experimental results. 250
A. Circulating Power 251
As explained in Section II, both modulations yield circu- 252
lating power, but the magnitudes of the circulating power are 253
different. In order to have a base for measurement and compar- 254
ison of the circulating power in the inverter modules, the more 255
general definition of the reactive power, known as Fryze’s defi- 256
nition [34], will be used. Because each of the nominal modules 257
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MEHRNAMI et al.: MODULATION SCHEME FOR THREE-PHASE DIFFERENTIAL-MODE CUK INVERTER 5
of the inverter has identical topology, only one module (i.e.,258
Module A) is selected here for the calculation of the active259
and reactive power of the inverter. Fryze’s definition of reactive260
power is a comprehensive definition, which also encompasses261
nonlinear circuits. The following equations are based on this262
definition and can be used to capture the reactive power of263
Module A:264
PA = < pA (t) >avg=1T
∫ T
0Vout1(t)IA (t)dt (8)
S2A = P 2
A + Q2A = V 2
out1 (rms) I2A (rms)
=1T
∫ T
0V 2
out1 (t) dt1T
∫ T
0I2A (t)dt. (9)
where pA (t) is the instantaneous power, PA is the active power,265
QA is the reactive power, SA is the apparent power, and Vout1266
and IA are output terminal voltage and phase current of Module267
A. Using (8) and (9), the ratio of the reactive to the active power268
can be derived as follows:269
QA
PA=
√√√√√
1T
∫ T
0 V 2out1 (t) dt 1
T
∫ T
0 I2A (t)dt
[1T
∫ T
0 Vout1 (t) IA (t)dt]2 − 1. (10)
Now assuming a load with unity power factor and a negligible270
THD of the load voltage and the load current, we obtain the271
following relations for the CMS-based DTCI:272
⎧⎨
⎩
IA =nVDCg∗
Rsin (ωt + γ)
Vout1 = gAnVDC = nVDCg∗ (1 + sin (ωt + γ)) .
(11)
Substituting Vout1 and IA from (11) into (10) and simplifying273
the resultant expression, one obtains (12) as shown bottom of274
the page.275
It is noted that (12) is valid only for a unity-power-factor load276
and for a lossless CMS-based DTCI. It shows that the ratio of277
the reactive power to the active power is constant and do not278
vary with peak voltage gain of inverter. Also it is noted that the279
reactive power of DTCI is due to the nonlinear nature of inverter280
and it is not caused by any passive components of the topology.281
Similar calculation is carried out for DMS-based DTCI to282
compare the results with those obtained using CMS-based283
DTCI. Current IA is obtained in (4) and Vout1 for DMS-based284
DTCI is described by (6) and (7). If these values are substituted285
into (10), one obtains the ratio of the reactive power to the active286
Fig. 7. Comparison of the output terminal voltages of DTCI operating withCMS and DMS. The CMS-based DTCI results in higher peak for the outputterminal voltage; even though the line voltage of the inverter remains the samefor both cases.
power as follows: 287
QA
PA(DMS) =
√√√√√
(1 + 3
√3
8π
)× 1
2[ 1
2
]2 − 1 =√
1.413 = 1.188.
(13)It is noted that circulation power in the case of single-phase 288
inverter operating with DMS is zero [32]. In a case of DTCI, 289
the ratio is not zero, however, smaller than that obtained for 290
the CMS-based DTCI. By dividing these ratios, we will have 291
the circulating power ratio of CMS to DMS for three-phase 292
inverter, which is QC M SQD M S
= 1.19. It means that CMS has 19% 293
more circulating power than DMS. The circulating power leads 294
to both higher conduction losses and higher switching losses. 295
Furthermore, it is noted that there is no switching at one third 296
of times when using DMS (refer to Fig. 5) that impacts the 297
switching losses. The significant effect of the DMS on inverter 298
efficiency will be shown by experimental results in Section V. 299
B. Device Rating 300
The other advantage of using DMS over CMS is to reduce the 301
stress on some of the components. The mathematical compar- 302
ison of the peak voltage on the active components is provided 303
below. The simulation results are also provided to compare the 304
voltage and current peaks on other components. 305
Fig. 7 compares the output terminal voltage of phase A (Vout1) 306
of DTCI operating with CMS and DMS under the equal line- 307
voltage levels. The peak voltage of Vout1 , (i.e., by V ∗out1), is 308
higher for DTCI operating with CMS [V ∗out1 (CMS)]. Using 309
(11), V ∗out1(CMS) is found to be 2nVDCg∗, while the peak line 310
voltage is√
3nVDCg∗. In order to obtain V ∗out1 for DMS, one of 311
QA
PA(CMS) =
√√√√√√
(nVDCg∗)2∫ T
0 (1 + sin(ωt + γ))2 dt(
n×VD C ×g ∗
R
)2 ∫ T
0 sin2 (ωt + γ) dt
(nVD C g ∗)4
R2
[∫ T
0 (1 + sin (ωt + γ)) sin (ωt + γ) dt]2 − 1=
√√√√
32 × 1
2[ 1
2
]2 − 1 =√
2 = 1.414.
(12)
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Fig. 8. V ∗Q a (CMS)/V ∗
Q a (DMS) as a function of g∗.
the phase voltages should be calculated by substituting (7) into312
(6) as demonstrated below for phase A: (14) as shown bottom313
of the page.314
As evident from (14), the peak output terminal voltage of315
DTCI operating with DMS [V ∗out1(DMS)] equals
√3nVDCg∗316
and the line voltage matches that obtained using the DMS-based317
DTCI. The following equation summarizes these results as318
{V ∗
out1(CMS) = 2nVDCg∗,
V ∗out1 (DMS) =
√3nVDCg∗.
(15)
Following Fig. 1, the off-state voltage of each device in the319
module (VQa , VQb ) is given by the following set of expressions:320
⎧⎨
⎩
VQa = Vca +Vcb
n
VQb = nVca + Vcb
(16)
where Vca and Vcb are the voltages across the blocking capacitors321
Ca and Cb , respectively. In the steady state, using Vca = VDC322
and Vcb = Vout1 , (16) yields323
⎧⎨
⎩
VQa = VDC +Vout1
n
VQb = nVDC + Vout1 .
(17)
The voltage ratings of the devices should be designed for the324
worst-case condition, which happens at the peak output voltage.325
The ratio of the peak voltage of either of devices using CMS-326
based DTCI to the peak voltage of the device with DMS-based327
DTCI can be obtained by using (15) and (17). This ratio is328
simplified as a function of peak phase-voltage gain as follows,329
where V ∗Qa and V ∗
Qb are peak voltages on primary and secondary330
switches, respectively:331
V ∗Qa(CMS)
V ∗Qa(DMS)
=V ∗
Qb(CMS)V ∗
Qb(DMS)=
VDC + V ∗o u t 1 (CMS)
n
VDC + V ∗o u t (DMS)
n
=1 + 2g∗
1 +√
3g∗. (18)
Fig. 9. Simulation results for VQ a and VQ b obtained using (a) CMS and(b) DMS when the output voltage attains the maximum positive value.
It is noted that (18) does not include any device voltage spike, 332
which is dependent on the load, leakage inductance of the 333
transformer, the off-state voltage of the device, and printed- 334
circuit-board layout. As such, the actual peak voltages are 335
slightly higher than (17). Nevertheless, (18) still provides a 336
good approximation for comparison purposes as proved by ex- 337
perimental results in Section V. 338
The ratioV ∗
Q a (CMS)V ∗
Q a (DMS) as described by (18) is plotted in Fig. 8. 339
The ratio is always greater than one and the ratio increases with 340
increasing normalized phase-voltage gain. The purpose of the 341
plot is to demonstrate the effect of modulation on reduction 342
of device voltage rating following (18) and is validated using 343
simulation and experimental results as follows. 344
Fig. 9 shows the (Saber-based) simulation results for the peak 345
drain-to-source voltages of Qa and Qb operating with DMS and 346
CMS. These simulations are carried out using circuit parameters 347
that match those of the experimental prototype described in 348
Section V. Using these parameters, the ratios of VQ a (CMS)VQ a (DMS) and 349
Vout1 =
⎧⎪⎪⎪⎪⎪⎨
⎪⎪⎪⎪⎪⎩
√3nVDCg∗ sin
(ωt − π
6+ γ
), if − π
6+ 2πm < ωt + γ <
π
2+ 2πm
√3nVDCg∗ sin
(ωt +
π
6+ γ
), if
π
2+ 2πm < ωt + γ <
7π
6+ 2πm
0, if7π
6+ 2πm < ωt + γ <
11π
6+ 2πm.
(14)
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Fig. 10. Simulation results showing VoutA , Vcb , ILa , and IT a for the invertershown in Fig. 1 when the inverter is operated using (a) CMS and (b) DMS andwhen the output voltage attains the maximum positive value.
Fig. 11. Phase voltage and line voltage of DTCI operating with (a) CMS and(b) DMS.
VQ b (CMS)VQ b (DMS) are found to be 1.15, respectively, for g∗ = 3, VDC =350
50V, V ∗out = 295V, and an output power (Pout)of 500 W. This351
is found to be close to the theoretically predicted value as shown352
in Fig. 8 for g∗ = 3. In addition, Fig. 10 shows that, using DMS, a353
reduction in the voltage of output capacitor (VoutA ) and blocking354
capacitor (Vcb ) of the inverter is also achieved. Further, all of355
Fig. 12. Harmonic analysis of the line-voltage distortion caused by the non-linearity in the static voltage-gain of the DTCI operated with (a) CMS and(b) DMS. Magnitudes of the second, third, fourth, fifth, sixth, and seventhharmonics are shown as a percentage of the fundamental-frequency (60 Hz)component magnitude versus peak phase-voltage gain.
these results are captured during the positive peak of the output 356
voltage with transformer turns ratio of 2 (i.e., n = 2). 357
C. Distortion 358
The line voltage of the inverter is a nonlinear function of 359
the duty cycle for both CMS and DMS as evident in (1). In 360
order to compare the nonlinearity of the CMS and DMS, open- 361
loop sinusoidal modulating signal is applied to DTCI operating 362
with CMS and DMS. The simulation results are provided along 363
with harmonic contents. Fig. 11(a) shows phase voltage (VAn ) 364
and line voltage (VAB ) of DTCI operating with CMS, while 365
open-loop sinusoidal modulating signals are applied. Fig. 11(b) 366
shows the similar waveforms for DTCI operating with DMS. 367
Both simulations are carried out for line frequency of 60 Hz and 368
g∗ = 3. Fourier series analysis for line voltages versus g∗ are 369
shown in Fig. 12. The plots show the magnitude of Fourier series 370
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Fig. 13. Proposed architecture of the closed-loop controller for DTCI. Both CMS and DMS implementations are shown in a single diagram. The difference inthe implementations is shown by dotted lines and highlighted part (right) for CMS and highlighted part (left) for DMS.
Fig. 14. Experimental prototype of DTCI. It shows the TMS320F28335 DSP-based digital controller on the top right, three transformers in the middle, andprimary-side filter inductors and capacitors to the left.
coefficients as a percentage of the magnitude of fundamental-371
frequency component. It is evident from these results that the372
nonlinear voltage gain of DTCI causes distortion in the output373
voltage but the distortion is different for CMS and DMS. The dis-374
tortion magnitude also depends on the variation of the duty cycle375
during a line cycle. The range of duty cycle swing is proportional376
to normalized peak phase-voltage gain (g∗). As expected, the377
magnitude of the harmonics increase at higher gains, because378
duty cycle swing is larger for CMS- and DMS-based DTCI.379
Also, comparison of CMS and DMS results reveals that DTCI380
exhibits considerable distortion while operating with CMS and 381
DMS. The distortion of the inverter operating with CMS appears 382
mostly as second harmonic; however, the harmonic distortion 383
of the inverter operating with DMS is spread over a wide range 384
of harmonics which is apparent from time-domain waveforms 385
of the inverter operating with DMS. This is because of varying 386
common-mode offset modulating signal with sharp edges (see 387
Fig. 4) in DMS. Part of this varying common-mode modulating 388
signal passes to the output voltage because of nonlinearity of the 389
inverter. The large signal harmonic analysis of converter is done 390
analytically in [35]. Section IV is devoted to discuss this issue 391
and closed-loop implementation of the DMS-based DTCI. 392
IV. NONLINEARITY AND CLOSED LOOP 393
In Section III, it is shown that the nonlinearity in the volt- 394
age gain of the inverter causes considerable amount of volt- 395
age distortion. Darwish et al. [30] uses harmonic compensation 396
(HC) method to reduce the THD by eliminating some specific 397
harmonics. The same method has been adopted generally for 398
single-phase inverters to reduce the THD [32]. However, har- 399
monic compensator reduces the loop gain bandwidth. Nonlinear 400
compensation method may lead to enhanced transient responses 401
while yielding lower THD [36]. Furthermore, as evident from 402
Fig. 12, at least four harmonics with considerably large magni- 403
tudes should be mitigated using four HCs. This implies addi- 404
tional computational overhead for the DSP-based controller and 405
further impact on the transient response/stability of the system. 406
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TABLE ISPECIFICATIONS OF THE DTCI EXPERIMENTAL PROTOTYPE
Inputvoltage
Peak outputvoltage (0)
Outputpower
Outputfrequency
Transformerturns ratio (n)
Switchingfrequency
Primary-side filterinduc-
tance/Capacitance
Secondary-side filterinductance–Capacitance
BlockingCapacitance of
Primaryside/Secondary side
30–100 V 300 V 500 W 60 Hz 2 125 kHz 50 μH / 60 μF 100 μH / 8.8 μF 6.8 μF / 1.5 μF
The dynamic behavior of DTCI is nonlinear like most of407
the converters and a proper component selection and control408
design should be carried out for a practical system. The dy-409
namic model and closed-loop controller design consideration of410
Cuk-topology-based inverters have been studied extensively in411
literatures [29], [30], and [37]. But a major part of the output412
voltage distortion is due to nonlinear static relation of the in-413
verter as shown in Fig. 12. It is noted that the distortion results414
of Fig. 12 are obtained by simulating a simple DTCI without415
considering dynamics of the system. This paper proposes the PR416
compensator for the inverter in conjunction with a static non-417
linearity compensator along with feed-forward of input voltage.418
The compensator architecture is shown in Fig. 13.419
The reference voltages (VrefA , VrefB , and VrefC ) in Fig. 13420
represent the voltage reference signals for the three phases. The421
measured phase voltages are fed back to close the control loops.422
Phase voltage (VAn , VBn , or VC n ) is the potential difference of423
output terminal voltage of each DTCI module and the mid-point424
(null point) voltage (Vn ). Voltage Vn is with respect to negative425
output terminals of the modules and can be measured directly by426
a sensor or can be calculated based on output terminal voltages427
with assumption of a symmetrical three-phase load as428
Vn =Vout1 + Vout2 + Vout3
3. (19)
Error signal is fed to the PR compensator and the outputs of429
the compensators (CA , CB , or CC ) are fed to the modulator as430
shown in Fig. 13. The common-mode dc-offset voltage is added431
to control signal for the implementation of CMS as highlighted432
in Fig. 13. The resultant signal (i.e., GainA , GainB , and GainC )433
is applied to linearization block, which is followed by PWM434
generating block for implementing CMS.435
The block which is labeled as “min” in Fig. 13 calculates436
the minimum of three-phase control signals (CA , CB , or CC ).437
This block is used for implementation of DMS, as highlighted in438
Fig. 13. The generated minimum signal (i.e., Cmin ) is subtracted439
from each of three-phase control signals (CA , CB , or CC ). The440
resulting signal (i.e., GainA , GainB , and GainC ) is applied to441
linearization block, which is followed by PWM generating block442
for implementing DMS. It is noted that the PWM generator443
block generates pulses with constant frequency and variable444
duty cycle, and linearization block is explained next.445
Section III shows how the output voltage of the inverter is446
distorted in open-loop operation without linearization. The dis-447
tortion shown in Figs. 11 and 12 is only due to nonlinear static448
relationship between voltage-gain and duty cycle in (1). This449
nonlinearity can be mitigated effectively by calculating the in-450
version of relationship in (1). The phase-voltage gain of phase451
A (GA ) and normalized phase-voltage gain (gA ) is given by 452
⎧⎪⎪⎨
⎪⎪⎩
GA =Vout1
VDC= n
Da
1 − Da
gA =GA
n=
Vout1
nVDC=
Da
1 − Da.
(20)
With rearrangement of Da in terms of gA in (20), one can 453
obtain 454
Da =gA
1 + gA=
Vout1
nVDC + Vout1. (21)
The output signal of the first stage of modulator (i.e., GainA ) 455
can be assumed to be proportional to the output terminal voltage. 456
This assumption is useful because both GainA signal and Vout1 457
are supposed to have a single frequency and added offset. Note 458
that the added offset value to GainA (and consequently to Vout1) 459
is not important, because this value is added equally to all phases 460
and will be canceled out on line and phase voltages. Thus, the 461
following assumption is purposefully made for phase A, and 462
identical assumptions can be made for other phases as well: 463
GainA = ksVout1 (22)
where ks is the scaling factor that can be obtained by using loop 464
gains after controller design. By substituting (22) into (21), one 465
obtains 466
Da =gA
1 + gA=
GainA
ksnVDC + GainA. (23)
Equation (23) is important because, it captures the relation- 467
ship between the duty cycle and GainA . The other parameters 468
are either constant (n and ks) or can be measured (VDC ). Thus, 469
if (23) is implemented between the gain signals and duty cycle 470
signals for CMS and DMS, it will remove the static nonlinearity 471
of the open-loop gain of DTCI. We represent this block as “static 472
linearization block” or SLB as illustrated in Fig. 13. The new 473
open-loop module consists of series connection of SLB, PWM 474
generator, and power module. The static voltage gain relation 475
of this new open-loop system is linear as defined by (22). 476
V. EXPERIMENTAL RESULTS 477
This section provides the experimental results of the inverter 478
operating using DMS and CMS. A 500-W experimental pro- 479
totype of the inverter, as shown in Fig. 14, is implemented 480
and tested with CMS and DMS. A TMS320F28335 DSP-based 481
digital controller, with a 150-MHz clock, is used for implement- 482
ing DMS and CMS. Real-time execution time for closed-loop 483
control is close to 5 μs for DTCI with CMS or DMS. Specifi- 484
cations of the inverter prototype are provided in Table I. This 485
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Fig. 15. Experimental efficiency of the inverter for varying normalized peakphase-voltage gain obtained using DMS and CMS.
section continues with experimentally obtained efficiency re-486
sults first, which demonstrates a significant improvement in487
performance of the DMS-based DTCI compared to that ob-488
tained using the CMS-based DTCI. Subsequently, the measured489
peak device voltages are provided using CMS and DMS. These490
results are consistent with analytical and simulation results in491
Section III. The open-loop oscilloscope results will be presented492
as well, with and without SLB. The results prove the effective-493
ness of SLB to reduce distortion. Then, experimental transient494
and steady-state results for the proposed closed-loop schemes495
(see Fig. 13) are provided, which prove the effectiveness of the496
control structure.497
Fig. 15 shows the efficiency of the inverter for a line volt-498
age fixed at 208 V (RMS) and an output power of 500 W with499
normalized dc-voltage gain varying between 1.5 and 3 (corre-500
sponding to an input voltage (VDC ) variation between 50 and501
100 V). The difference between the efficiencies of the inverter502
operating with DMS and CMS is found to be significant. The503
improvement is almost constant at different peak gains and is504
consistent with the prediction from Section III-A, because the505
reactive power ratio of DTCI operating with CMS to that of506
operating with DMS is constant and it is not dependent on peak507
voltage gain.508
Next, the peak voltages of the switches (Qa , Qc , or Qe ) on509
the primary side of DTCI obtained using DMS and CMS are510
measured and plotted in Fig. 16(a). It is noted that the voltage511
ratings of the switches on the ac side are proportional to the512
switches on the dc side with the proportionality constant being513
the transformer turns ratio. To obtain the plots in Fig. 16, the514
input voltage is varied between 50 and 100 V for a constant515
output power of 500 W, while keeping the line voltage set at516
295 V (Peak). The results show that the gap between the peak517
voltage of the switches using DMS and CMS increases a little518
with increasing normalized phase-voltage gain. The ratios of519
the measured peak voltages of the primary-side switches of the520
inverter are shown in Fig. 16(b) and they are consistent with the521
predictions in Fig. 8 and the simulation results of Fig. 9.522
Next, distortion caused by nonlinearity of the open-loop in-523
verter operating with DMS and CMS is presented with exper-524
imental results. First, the open-loop DTCI without SLB is ex-525
cited with sinusoidal signals for both modulation schemes. The526
Fig. 16. (a) Experimentally determined peak voltage of the primary-sideswitches of the inverter with CMS (solid line) and DMS (dotted line).(b) Ratios of the two traces in (a).
experimental line voltages and phase voltages of the inverter op- 527
erating using CMS are shown in Fig. 17(a) and (b), respectively. 528
Fig. 18(a) and (b) shows the line voltages and phase voltages 529
of DTCI operating using DMS, respectively. For these experi- 530
ments, the peak instantaneous line voltages for both results are 531
set at 295 V (corresponding to 208-V ac RMS), while the in- 532
put voltage and output power are set respectively at 50 V and 533
500 W. The 30% THD is measured for this experiment with 534
DMS, while CMS yields THD of 26% under the similar condi- 535
tions. Further illustration of the problem is provided in Fig. 19, 536
which compares the measured THD results for the open-loop 537
DTCI operating with CMS (solid line) and DMS (dotted line) 538
versus peak line-voltage gains. The progressively adverse effect 539
of the line-voltage THD with increasing peak line-voltage gain 540
is predictable with increasing range of duty cycle swing. Higher 541
THD results for DMS-based DTCI compared to CMS-based 542
DTCI are consistent with Section III-C results. The effect of 543
SLB on open-loop responses is pursued next. 544
The static linearization method to overcome the distortion 545
problem is discussed in Section III and static linearization 546
method is proposed in Section IV based on (23). The SLB is 547
implemented for the experimental DTCI using a DSP controller. 548
The experiments are carried out for open-loop DTCI with SLB, 549
under the identical operating condition used to carry out the 550
experiments of Figs. 17–19. The line voltages and phase volt- 551
ages of the inverter operating with CMS are shown in Fig. 20(a) 552
and (b), respectively. Fig. 21(a) and (b) shows the line voltages 553
and phase voltages of DTCI operating using DMS, respectively. 554
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Fig. 17. Open-loop (a) line voltages and (b) phase voltages of DTCI, operatingwith CMS. The inverter is excited with sinusoidal signals without SLB.
Both experiments are carried out with SLB and DTCI is excited555
by three-phase sinusoidal signals (GainA through GainC ). A556
THD of about 6% is measured for these experiments with CMS557
and DMS under similar operating conditions. Further, illustra-558
tion of the problem is provided in Fig. 22, which compares the559
measured THD results for the open-loop DTCI with SLB oper-560
ating with CMS (solid line) and DMS (dotted line) versus peak561
line-voltage gain. The significant reduction of THD by using562
SLB proves the effectiveness of the method. Also, it is evident563
that DTCI with DMS yields even better THD results than using564
CMS with SLB.565
The remaining distortion after using static nonlinear compen-566
sation is primarily due to two factors: one is nonideal practical567
static phase-voltage gain, which does not exactly follow (20).568
The reason is the dead-time effect on the voltage gain of mod-569
ules. The other important factor of distortion is the dynamic570
behavior of DTCI. The improved THD of DTCI obtained using571
DMS (as compared to that obtained using CMS) is due to the572
second factor. The different dynamic behavior of the inverter573
with two modulations can be explained by small-signal aver-574
age model concept [30]. Each module equally contributes in the575
overall inverter total number of poles and zeroes in the model.576
DMS turn one of the modules off at each time, which means577
deactivating one-third of the contributing circuit to the dynamic578
Fig. 18. Open-loop (a) line voltages and (b) phase voltages of DTCI, operatingwith DMS. The inverter is excited with sinusoidal signals without SLB.
Fig. 19. Line-voltage THD results for open-loop DTCI without SLB operatingwith CMS (solid line) and DMS (dotted line), versus peak line-voltage gain.
response of the system. This results in reduced order dynamic 579
of the system and it affects the distortion of the inverter. 580
Subsequently, the closed-loop controllers, as illustrated in 581
Fig. 13, are implemented and the steady-state and transient re- 582
sults are presented below. The PR compensator is tuned to keep 583
a balance between satisfactory steady-state performance and 584
acceptable transient response [33], [38]. The peak line voltages 585
for both experiments are set at 295 V (corresponding to 208-V 586
RMS), while the output power are set at 500 W. Fig. 23 shows the 587
THD of the line voltage of the closed-loop DTCI as a function 588
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Fig. 20. Open-loop (a) line voltages and (b) phase voltages of DTCI, operatingwith CMS. The inverter is excited with sinusoidal signals applied to SLB.
Fig. 21. Open-loop (a) line voltages and (b) phase voltages of DTCI, operatingwith DMS. The inverter is excited with sinusoidal signals applied to SLB.
Fig. 22. Line-voltage THD results for the open-loop DTCI along with SLB.The inverter operating with CMS is solid line and DMS-based DTCI is repre-sented by dotted line, versus peak line-voltage gain. It shows a marked improve-ment in the THD of DTCI using SLB.
Fig. 23. Experimentally obtained THD of the line voltage as a function of thenormalized peak line-voltage gain of the closed-loop DTCI when it is operatedusing DMS (dotted line) and CMS (solid line).
of the line-voltage gain when the inverter is operated with DMS 589
(dotted line) and CMS (solid line). By comparing the open- and 590
closed-loop results of DTCI, as shown, respectively, in Figs. 22 591
and 23, one can observe that the closing loop reduces the THD of 592
the DMS-based and CMS-based closed-loop DTCI. In addition, 593
to achieve an acceptable THD, the goal is to achieve an accept- 594
able transient performance for the inverter. Consequently, the 595
gains of the fundamental-frequency compensator have to be so 596
chosen such that an optimal tradeoff between a lower harmonic 597
distortion and a satisfactory transient response is achieved. 598
In order to investigate the transient behavior of the inverter, 599
step responses of the system to load and reference changes are 600
captured for DTCI operating with CMS and DMS in Figs. 24 601
and 25, respectively. An induction motor is used as a load in 602
these experiments. A resistive load is paralleled to the motor 603
load using electronic switch to emulate the fast step load changes 604
in Figs. 24(a) and 25(b). Both modulations show similar tran- 605
sient during the step load changes, while DMS shows much 606
faster response to step reference change. The start-up wave- 607
forms of line voltages of DTCI operating with CMS and DMS 608
for resistive load are shown in Fig. 26(a) and (b), respectively. 609
Transient responses are found to be satisfactory and they do not 610
exhibit any overshoot or undershoot. The CMS- and DMS-based 611
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Fig. 24. Experimentally obtained step responses of line voltages of DTCIoperating with CMS to (a) reference changes and (b) load changes. The motoris used as a load in these experiments.
Fig. 25. Experimentally obtained step responses of line voltages of DTCIoperating with DMS to (a) reference changes and (b) load changes. The motoris used as a load in these experiments.
Fig. 26. Experimental obtained transient start-up responses of DTCI operatingwith (a) CMS and (b) DMS.
DTCI exhibit convergence after the third and second cycle, 612
respectively. 613
VI. CONCLUSION 614
The paper proposes a DMS for a DTCI and compares the 615
mechanism and performance of the DMS-based DTCI to that of 616
a prior-art CMS-based DTCI. The motivation for development 617
of DMS for DTCI was to reduce the circulating power in the 618
modules. An experimental hardware prototype was developed 619
for the inverter to validate and compare the results obtained op- 620
erating with DMS and CMS with focus on energy-conversion 621
efficiency, device rating, output-voltage distortion, and transient 622
response of the inverter. The experimental results show the sig- 623
nificant superiority of DMS in comparison to same results for 624
CMS. The efficiency increase of more than 5% is observed with 625
DMS. The peak device voltage rating reduction of 5–10% ob- 626
served depending on voltage gain conditions with DMS too. The 627
provided analytical/simulation results are also consistent with 628
the mentioned results. 629
The analysis shows the distorted output for open-loop DTCI 630
with both modulation schemes. The static linearization method 631
is proposed for inverter as an effective method to reduce dis- 632
tortion. The effectiveness of method is proved by experimen- 633
tal THD results after and before addition of static lineariza- 634
tion block for both modulation techniques. Finally closed-loop 635
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architecture is proposed and implemented. Experimental steady-636
state and start-up transient results are provided to show the ef-637
fectiveness of linearization for both modulation schemes. The638
DMS-based DTCI has a better dynamic response because of639
the reduced order of dynamic system. So lower THD and faster640
transient responses are also achieved with DMS as evident from641
the experimental results.642
An overall qualitative comparison between the DMS- and643
CMS-based operations of the inverter, as implemented currently,644
indicates that the DMS-based operation of the inverter has the645
potential to yield relatively higher saving in the power stage due646
to the reduced requirements of the device breakdown voltage647
and power handling.648
ACKNOWLEDGMENT649
Disclaimer: This work is related to the following intellectual650
property: S. K. Mazumder, “Differential mode inverters for re-651
newable and alternative energy systems,” filed by the University652
of Illinois at Chicago with the USPTO on 06/23/11 with patent653
application number 61/500 344.654
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Siamak Mehrnami (S’XX) received the B.S. de-782gree in electrical engineering from the University783of Tabriz, Tabriz, Iran, in 2006, the M.S. degree in784electrical engineering from the University of Tehran,785Tehran, Iran, in 2009, and the Ph.D. degree in elec-786trical engineering from the University of Illinois at787Chicago, Chicago, IL, USA, in 2015.
Q3788
He was a Contractor and a Member of solar car789team of the University of Tehran from 2009 to 2011.790He was also a Design Engineer at renewable energy791organization of Iran from 2010 to 2011. In 2011, he792
was a Research Assistant at the Laboratory of Energy and Switching Elec-793tronics Systems, University of Illinois at Chicago. He is a Senior Engineer at794LHV Power Corporation in CA working on EV chargers. His research interests795include but not limited to high-frequency link inverters, power electronics ap-796plications in renewable energies, drivers, electrical vehicles, and smart grids.797
798
Sudip K. Mazumder (SM’XX) received the Ph.D.799degree from the Department of Electrical and Com-800puter Engineering, Virginia Polytechnic and State801University, Blacksburg, VA, USA, in 2001.
Q4802
He is the Director of Laboratory for Energy and803Switching-Electronics Systems and a Professor in the804Department of Electrical and Computer Engineering,805University of Illinois, Chicago (UIC). He has more806than 20 years of professional experience and has held807R&D and design positions in leading industrial orga-808nizations and has served as Technical Consultant for809
several industries. He also serves as the President of NextWatt LLC, a small busi-810ness organization that he setup in 2008. Since joining UIC, he has been awarded811close to 40 sponsored projects by NSF, DOE, ONR, CEC, EPA, AFRL, NASA,812ARPA-E, NAVSEA, and multiple leading industries in above-referenced areas.813He has published more than 150 refereed papers in prestigious journals and814conferences and has published one book and six book chapters. Twenty-four815of his journal papers are published in IEEE transactions with a current impact816factor greater than 4. He has presented 43 invited/plenary/keynote presentations,817and currently, he also holds six issued and three pending patents.818
Dr. Mazumder received the University of Illinois’s University Scholar Award819in 2013. In 2011, he received the Teaching Recognition Program Award at UIC.820In 2008 and 2006, he received the prestigious Faculty Research Award from821UIC for outstanding research performance and excellent scholarly activities. He822also received the ONR Young Investigator Award and NSF CAREER Awards823in 2005 and 2003, respectively, and prestigious IEEE Prize Paper Awards in8242002 and 2007, respectively. He also received the best paper presentation in a825session award certificate from IEEE Industrial Electronics Conference in 2004826and 2012. In 2005, he led a team of University of Illinois, Chicago, student827team to first place in USA and third place in the world as a part of the highly828reputed IEEE sponsored International Future Energy Challenge competition.829He served as the first Editor-in-Chief for the International Journal of Power830Management Electronics (currently known as Advances in Power Electronics)831between 2006 and 2009. He has also served or is serving as a Guest Editor/Guest832Co-Editor for the following Transaction Special Issues: IEEE TRANSACTIONS833ON POWER ELECTRONICS Special Issue on Power Electronics in DC Distri-834bution Systems (2011–2013); Advances in Power Electronics Special Issue835on Advances in Power Electronics for Renewable Energy (2010–2011); IEEE836
TRANSACTIONS ON POWER ELECTRONICS Special Issue on High-Frequency- 837Link Power-Conversion Systems (2013–2014); IEEE TRANSACTIONS ON IN- 838DUSTRIAL ELECTRONICS Special Issue on Control Strategies for Spatially Dis- 839tributed Interactive Power Networks (2013–2014) (in process for submission); 840and Advances in Power Electronics Special Issue on All Electric Ship Technol- 841ogy (2012–2013). He currently serves as an Associate Editor for the following 842transactions: IEEE TRANSACTIONS ON POWER ELECTRONICS (since 2009), IEEE 843TRANSACTIONS ON INDUSTRIAL ELECTRONICS (since 2003), and IEEE TRANS- 844ACTIONS ON AEROSPACE AND ELECTRONICS SYSTEMS (since 2008). He is also 845an Editorial Board Member for Advances in Power Electronics. Previously, he 846has also served as an Associate Editor for IEEE TRANSACTIONS ON CIRCUITS 847AND SYSTEMS and IEEE POWER ELECTRONICS LETTER. 848
In 2010, he served as the Chair, Student/Industry Coordination Activities 849for IEEE Energy Conversion Congress and Exposition, which is the largest 850conference in power electronics today in North America. He served as the Co- 851Chair for of IEEE Power Electronics Society (PELS) Technical Committee on 852Sustainable Energy Systems and is currently serving as the Vice Chair of IEEE 853PELS Subcommittee on Distributed Generation and Renewable Energy. He is 854also serving as the Advisory Committee Member for 2012 IEEE India Interna- 855tional Conference on Power Electronics and has also served in the same capacity 856for 2010 IEEE International Symposium on Power Electronics for Distributed 857Generation Systems. He is serving/has served as Technical Program Committee 858Member for numerous IEEE sponsored and other reputed conferences including 859IEEE Energy Conversion Congress and Exposition, IEEE Applied Power Elec- 860tronics Conference and Exposition, IEEE Industrial Electronics Conference, 861IEEE International Symposium on Power Electronics for Distributed Genera- 862tion Systems. He was invited by the inaugural 2012 Clean Energy Trust Show 863Case, an event that connected entrepreneurs, investors, and researchers who can 864work together to commercialize the latest clean technology, to deliver his vision 865on Smart Grid. 866
867
Harshit Soni (S’XX) received the B.E. degree in 868electronics and communication engineering from the 869PES School of Engineering, Bengaluru, India, in 8702012. He has been working toward the M.S. degree 871in electrical and computer engineering from the Uni- 872versity of Illinois at Chicago (UIC), IL, USA, since 8732013. His thesis project at UIC is Modular Control 874of Differential mode Cuk Inverter. 875
His research interests include but are not lim- 876ited to high-frequency link inverter, dc/dc converters, 877control engineering, and GaN-based switching power 878
converters. 879880
