PCI-C664 Hardware Manual - Avionics Interface … ARINC664 Test & Development End System Hardware Manual 1 INTRODUCTION 1.1 General This document comprises the Hardware Manual for

November 2013

Hardware Manual

ARINC664 Test & Development End

System

PCI-C664

V02.00 Rev B

V02.00 Rev B

Hardware Manual

ARINC664 Test & Development End System

PCI-C664

November 2013

ARINC 664 Part 7 Products are offered in Partnership with

TTTech North America

ARINC664 Test & Development End System Hardware Manual II

Table of Contents

Section 1 ....................................................................................................1INTRODUCTION

.................................................................................................................... 11.1 General

.................................................................................................................... 21.2 Revision Information

.................................................................................................................... 21.3 How This Manual is Organized

.................................................................................................................... 31.4 Applicable Documents

...................................................................................................... 31.4.1 Industry Documents

...................................................................................................... 31.4.2 Product Specific Documents

Section 2 ....................................................................................................4STRUCTURE OF THE PCI-C664

Section 3 ....................................................................................................9INSTALLATION

.................................................................................................................... 93.1 Installing the PCI-C664 Module

...................................................................................................... 93.1.1 Installation Instructions

.................................................................................................................... 93.2 Connections to the I/O Signals

...................................................................................................... 93.2.1 Connection to the ARINC664/Ethernet

...................................................................................................... 103.2.2 Connection to JTAG Interface

Section 4 ....................................................................................................11TECHNICAL DATA

Section 5 ....................................................................................................12NOTES

.................................................................................................................... 125.1 Acronyms and Abbreviations

ARINC664 Test & Development End System Hardware Manual1

1 INTRODUCTION

1.1 General

This document comprises the Hardware Manual for the PCI-C664 Mezzanine Card. ThePCI-C664 is an ARINC664 Part 7 compliant End System (ES) module that provides aredundant ES (Network A and Network B) interface to an ARINC664 network on a 1/2length PCI form factor which can be mounted directly into standard PCI 3.3V and 5V slots(Also compatible with PXI-X slots).

The PCI-C664 provides small form factor pluggable (SFP) cages at the front panel forinterfacing to the ARINC664 network. The module is delivered with two10/100/1000BASE-T Copper SFP Transceivers supporting 10/100/1000BASE-T copperinterfaces to the Ethernet network. Optionally (using PN: PCI-C664-O), the ES module canbe delivered with two 850nm optical LC modules supporting 1.25Gbps IEEE 802.31000BASE-SX Ethernet network interfaces.

The PCI-C664 supports both a 33MHz and 66MHz PCI interface to the host system. Both32-bit and 64-bit wide PCI interfaces are also supported. The module is compatible withboth 3.3V and 5V PCI slots.

A software applications programmer's interface (API) library is provided with the module inorder to provide a high level intuitive applications programming interface to the features andfunction of the ES module. Support is provided for Windows XP, Windows 7, VxWorks(v5.x and v6.x), and Linux host system. Additional operating system support can be providedon request.

The PCI-C664 hardware module provides an on-board network protocol stack that offloads the Internet Protocol (IP) and User Datagram Protocol (UDP) processing from the hostsystem. Additionally, the hardware module provides ARINC653 Sampling and Queueingport functionality which is supported by the hardware. Via the software API, user applicationsare provided access to the messaging services at the ARINC653 (Sampling & Queueing),UDP, IP, and MAC layers. In addition to the full ARINC664 traffic shaping (Tx) andredundancy management (Rx) operations, the module also is capable of simultaneouslysupporting standard Ethernet best effort traffic classes.

Figure 1.1: Protocol Stack

ARINC664 Test & Development End System Hardware Manual 2

PMC664-ES Protocol Stack

In support of ARINC664 operations, the module is capable of supporting up to 128 OutputVirtual Links (VL) and 512 Input VL's. Up to 1024 Output message ports and 4096 Inputmessage ports are supported.

1.2 Revision Information

Version Date Author Changes

V01.00 Rev A 11 December 2011 T. Troshynski Creation of Document

V01.00 Rev B 15 December 2011 J. Cole Technical Revision

V02.00 Rev A 23 March 2012 T. Troshynski New HW build using AIT PCI Carrier

V02.00 Rev. B 5 November 2013 M. Amarawardana Format Updates

1.3 How This Manual is Organized

This PCI-C664 Hardware Manual is comprised of the following sections:

Section 1, INTRODUCTION, contains an overview of the PCI-C664 module

Section 2, STRUCTURE OF THE PCI-C664, describes the functionalarchitecture, components, and basic operation of the PCI-C664 module

Section 3, INSTALLATION, describes the steps required to install the PCI-C664device and to connect the device to other external interfaces, including theARINC664 Ethernet network

Section 4, TECHNICAL DATA, describes the technical specification of the PCI-C664.

Refer to the Ethernet SDK Installation Instructions (Windows), and the A664 ES


Application Programmer's Interface manual for details of the operation of the softwareinterface to the PCI-C664.

1.4 Applicable Documents

The following documents shall be considered to be a part of this document to the extent thatthey are referenced herein. In the event of conflict between the documents referenced and thecontents of this document, the contents of this document shall have precedence.

1.4.1 Industry Documents

ARINC Specification 664P7: Aircraft Data Network Part 7 Avionics Full DuplexSwitched Etherent (AFDX) Network, Published 09-2009IEEE 802.3-2008: Carrier Sense Multiple Accesses with Collision Detection (CSMA/CD) Access Method and Physical Layer SpecificationsPCI Local Bus Specification R2.3

1.4.2 Product Specific Documents

ARINC664 ES Applications Programmer's Interface, Doc No. 40303001ARINC664 Development Layer 3 & 4 End System Host Interface Specification, DocNo. 4032A001TTEthernet sNIC Interface Control Document, Doc No. D-STRATPHY-G-10-004


2 STRUCTURE OF THE PCI-C664

The core functions of the PCI-C664 are implemented in an onboard Altera Stratix IV FieldProgrammable Gate Array (FPGA). The onboard FPGA hosts the sNIC Media Access

Control (MAC) implementation as well as two embedded NIOS processors.

Figure 2: Structure of the PCI-C664

PCI-C664 Block Diagram

The sNIC MAC provides both the Ethernet MAC functions and the ARINC664 layer 2services including the ARINC664 transmit traffic shaping and the incoming integrity checkingand redundancy management functions. The sNIC is capable of managing up to 128 outputVL's and up to 512 input VL's. The sNIC also provides support for output VL's to beconfigured as cut-through VL's which bypass the ARINC664 traffic shaping and thereforesupport standard Ethernet operations. Additionally, in addition to supporting incomingARINC664 VL's the sNIC can simultaneously receive standard Ethernet frames notassociated to a specific ARINC664 VL.


The txNIOS embedded processor hosts an embedded software module that provides theonboard ARINC653, UDP, and IP services for the outgoing (transmit) data stream. ThetxNIOS is capable of supporting up to 1024 messaging ports. The following transmitmessaging port types are supported:

Table 2-I: Transmit Messaging Port Types

Port Type Description

COM_UDP(Sampling)

UDP Sampling Communication (COM) ports provide the output samplingservice specified in ARINC653. The ports transmit a statically configuredmessage size and the source and destination addressing (IP, UDP, andMAC) information is frozen in the port configuration. COM_UDP Samplingports DO NOT provide support for IP fragmentation and can handle up to1471 bytes of application payload data.

COM_UDP(Queuing)

UDP Queuing COM ports provide the output queuing service specified inARINC653. The ports can transmit variable length messages. The sourceand destination addressing (IP, UDP, and MAC) information is frozen in theport configuration. COM_UDP Queuing ports provide support for IPfragmentation. COM_UDP Queuing ports are capable of supporting up to8192 bytes of application payload data.

SAP_UDP UDP Service Access Ports (SAP) provide services to support client/servertype applications. The source addresses (IP, UDP, and MAC) and theoutput VL associated with the ports are frozen in the configuration but thedestination (IP and UDP) addresses are dynamic and provided by theapplication when a message is written to the port. SAP_UDP ports arecapable of supporting up to 8192 bytes of application payload. IPfragmentation is supported by SAP_UDP ports.

SAP_IP IP SAP ports provide an interface to which applications can write IP packetpayloads. The source addresses (IP and MAC) and the output VLassociated with the ports are frozen in the configuration but the destination(IP) addresses are dynamic and provided by the application. SAP_IP portsare capable of supporting up to 8200 bytes of application payload. IPfragmentation is supported by SAP_IP ports.

SAP_MAC MAC SAP ports provide an interface to which applications can writeEthernet frame payload data. The source address (MAC) and theassociated output VL are frozen in the configuration.



COTS_MAC COTS MAC ports provide an interface to which applications can writestandard Ethernet frame payloads. The MAC source address of the COTSMAC ports is frozen in the configuration. The destination MAC address andoptionally the MAC frame type are provided by the application each time amessage is written to the port.


The rxNIOS embedded processor hosts an embedded software module that provides theonboard ARINC653, UDP, and IP services for the incoming (receive) data stream. TherxNIOS is capable of supporting up to 4096 messaging ports. The following receivemessaging port types are supported:

Table 2-II: Receive Messaging Port Types


COM_UDP(Sampling)

UDP Sampling Communication (COM) ports provide the input samplingservice specified in ARINC653. The ports are configured to receive astatically configured message size. The source and destination addressing(IP, UDP, and MAC) information is frozen in the port configuration.COM_UDP Sampling ports DO NOT provide support for IP reassemblyand can handle up to 1471 bytes of application payload data. Samplingports do NOT queue received messages. Only the newest received messageis available to be read by the application.

COM_UDP(Queuing)

UDP Queuing COM ports provide the input queuing service specified inARINC653. The ports can receive variable length messages and themessages are queued into a first in first out (FIFO) that is read by theapplication. The source and destination addressing (IP, UDP, and MAC)information is frozen in the port configuration. COM_UDP Queuing portsprovide support for IP reassembly. COM_UDP Queuing ports are capableof supporting up to 8192 bytes of application payload data.

SAP_UDP UDP Service Access Ports (SAP) provide input services to support client/server type applications. The destination addresses (IP and UDP) and theinput VL associated with the ports are frozen in the configuration but thesource (IP and UDP) addresses are dynamic and provided to theapplication when a message is read from the port. SAP_UDP ports arecapable of supporting up to 8192 bytes of application payload. IPreassembly is supported by SAP_UDP ports.

SAP_IP IP SAP ports provide an interface from which application can read IPpacket payloads. The destination addresses (IP) and the input VLassociated with the ports are frozen in the configuration but the destination(IP) addresses are dynamic and provided to the application when a messageis read. SAP_IP ports are capable of supporting up to 8200 bytes ofapplication payload. IP reassembly is supported by SAP_IP ports.

SAP_MAC MAC SAP ports provide an interface from which applications can readEthernet frame payload data. The associated input VL is frozen in theconfiguration.



COTS_MAC COTS MAC ports provide an interface from which application can readstandard Ethernet frame payloads.


3 INSTALLATION

3.1 Installing the PCI-C664 Module

The PCI-C664 features full PCI 'plug-and-play' capability. There are no jumpers or switcheson the board which have to be modified by the user.

Note: We recommend that you use a wrist strap for any installations. If there is nowrist wrap available, then touch a metal plate on your system to ground yourselfand discharge any static electricity during the installation work.

The following instructions describe how to install the PCI-C664 module in your system.Follow the instructions carefully to avoid any damage to the device.

3.1.1 Installation Instructions

To Install the PCI-C664 Module:

1. Shut down your system and all peripheral devices. Unplug the power cordfrom the wall outlet. Inserting or removing modules with power applied mayresult in damage to the module devices.

2. Remove the system cover to gain access to the system slots.

3. Place the PCI-C664 mezzanine module into an open PCI slot in your system.Note: The PCI-C664 is a universal PCI module that can be inserted into3.3V or 5V PCI host slots.

4. Replace the cover of your system.

5. Connect system with power source and turn on the power to your system.

3.2 Connections to the I/O Signals

3.2.1 Connection to the ARINC664/Ethernet

The PCI-C664 module provides four SFP cages, only SFP Port 1 and SFP Port 2 are usedfor the redundant interface to the ARINC664/Ethernet network. SFP Port 1 is associatedwith ARINC664 Network A and SFP Port 2 is associated with ARINC664 Network B.

The PCI-C664 module is delivered with two 10/100/1000BASE-T Copper SFPTransceivers supporting 10/100/1000BASE-T copper interfaces to the Ethernet network viaa standard RJ45 connector.

Note: Optionally, when ordered using the part number PCI-C664-O, the module isdelivered with two 850nm optical LC modules supporting 1.25Gbps IEEE 802.3


1000BASE-SX Ethernet network interfaces.

3.2.2 Connection to JTAG Interface

The Debug connector of the PCI-C664 module provides access to a Joint Test Action Group(JTAG) chain of the card. A programming adapter can be provided upon request. Theprogramming adapter can be used in conjunction with the ALTERA USB Blaster JTAGprogrammer to support a debugging and programming interface to the components (sNIC,txNIOS, and rxNIOS) of the core Statix IV FPGA.


4 TECHNICAL DATA

PCI Interface: Fully compatible with PCI Standard (Revision 2.2)Universal PCI Module: 3.3V or 5V PCI Signalling, 32bit or 64 bit,33MHz/66MHz bus operationCompatible with PCI-X Slots Also

Ethernet Interface: SFP Cages provided for Redundant Ethernet InterfacesPN: PCI-C664 10/100/1000BASE-T Ethernet Interface (RJ45)PN: PCI-C664-O 1000BASE-SX Etherent Interface

ARINC 664: Up to 128 Output Virtual LinksUp to 1024 Output Sampling & Queuing PortsUp to 512 Input Virtual LinksUp to 4096 Input Sampling & Queuing Ports

Dimensions: Standard PCI Compliant 1/2 Length CardWidth: 15.24 mmDepth: 175.26 mmHeight: 106.68 mm

Temperature: 0°C to +55°C Operating-40°C to +85°C Storage

Humidity: 0 to 95% (non condensing)

Weight: approx. 11 ounces

Power: +12V: approx. 3W+3.3V: approx. 3W

Total: approx. 6W


5 NOTES

5.1 Acronyms and Abbreviations

ARINC Aeronautical Radio Inc.API Application Programmer's InterfaceCOM Communications (Port)COTS Common off the ShelfES End SystemIP Internet ProtocolJTAG Joint Test Action GroupMAC Media Access ControlPMC PCI MezzanineRx ReceiveSAP Service Access PortSBC Single Board ComputerSFP Small form factor pluggableTx TransmitUDP User Datagram ProtocolVL Virtual Link