Performance Analysis of Embedded Systems

1Swiss FederalInstitute of Technology

Computer Engineeringand Networks Laboratory

Performance Analysis of Embedded Systems

Lothar Thiele

ETH Zurich



Overview

Review of General Aspects

Modular Performance Analysis

Real-Time Calculus

Modeling

Application Scenarios



System Composition

Scheduling and ArbitrationTemplates

proportionalshareWFQ

staticdynamicfixed priority

EDFTDMA

FCFS

Communication Templates Computation Templates

DSPDSP

CC CANinterface

CANinterface

SDRAMSDRAM

RISCRISCECUECU

Architecture

RISCRISCSDRAM

SDRAM

ECUECU

priority

EDF

ECUECU



Role of Performance Estimation

Design validation:• equivalence of specification and

implementation• validation of non-functional aspects (power

consumption, throughput, delay)

Prerequisite for design space exploration:• part of feedback cycle in design

Performance estimation methods:• use of simulation, trace-based estimation

and analytic methods



Design Space Exploration

Application Architecture

Mapping

Estimation

Takes place on several levels of abstractionTakes place on several levels of abstraction



Why Is Estimation Difficult ?Non-determinism: • Uncertain system environment (different load

scenarios, unknown (worst case) input patterns).• Data dependent functional behavior.

Analyzability:• Complex hardware and software interactions in

processing nodes, communication components, scheduling and arbitration policies.

• Use of abstractions in analysis -> non-determinism.Interference: • Internal data streams interact on computing and

communication resources.• This interference determines stream characteristics

(cyclic dependency).



Why is Estimation Difficult ?

EPUEPU

EPUEPU

EPUEPU

EPUEPU

applicationstructure

hardwareplatform



Bounds, Guarantees and Predictability

t0 bestcase

worstcase

upperbound

lowerbound

variation of execution time

w.c. performance

w.c. guarantee

best case predictability worst case predictability



Overview


Composable Performance Analysis

Real-Time Calculus

Modeling




A Four-Step Approach

1. Abstraction: Build abstract models for “first class citizens”event streams -> abstract event streamsarchitecture elements -> resource modulesapplication processes -> performance modules

2. Performance Components: Combine performance modules using resource sharing information

3. Performance Network: Combine all models to a network that represents the performance aspects

4. Analysis



The “Big Picture”

Application Specification

Abstract Application

Abstract Architecture

Architecture Specification

Performance Network

T1 T2 T3

ARM9 DSP

loadscenario

s

architecture

elements

mapping relations

application

process

event streams

resourcemodules

performancemodules

abstract event

streams

abstract load

scenarios

performance

components



Step 1: Abstract Application Model

From a functional model…

event stream applicationprocess

(e.g. StateCharts … )



Step 1: Abstract Functional Units

… to an abstract application model

performance

moduleabstract

event stream

abstractresource stream

How do we calculate with abstract event streams and resources units?How do we calculate with abstract

event streams and resources units?

We use Real-Time Calculus!(min-max algebra)

We use Real-Time Calculus!(min-max algebra)



Step 2: Build Performance Components

How do we do scheduling?How do we do scheduling?



Step 2: Scheduling I

Fixed Priorit

y(FP)



Step 2: Scheduling II

share

Generalized

Processor Sharing(GPS)

Performance component of a

combined HW/SW/OS module; exposes

performance properties but hides

implementation



Step 3 and 4: Compose and Analyze

ARM9 DSP2Bus DSP1

’’ ’’ ’ ’

FP GPS FP

GPS GPS FP

’ ’

Application 1

Application 2

How can we compose performance modules ?

How can we compose performance modules ?

How can we add a new application?How can we add a new application?How can we estimate the load on resources?

How can we estimate the load on resources?

How can we estimate delay and memory?How can we estimate delay and memory?



Dynamic Analytic Models

inputtraces

model ofenvironm

entformalspecific

.

formalspecificatio

n

systemmodel

analysis

datasheets

model ofcomponent

s

program

analysis

estimationresults



Overview



Real-Time Calculus

Modeling




Scheduling AbstractionIdea:• unified view of task scheduling, arbitration

and output scheduling in networks:

• methods:• queueing theory (statistical bounds, Markov

chains)• real-time calculus (worst case bounds, min-max

algebra)



Foundations of Real-Time-Calculus

Linear System Theory [Baccelli, Cohen, Olsder, Quadrat 1992]

Calculus for Networks [Le Boudec 1998, 2001], [Cruz 1991]

Adversarial Queuing Theory [Andrews, Borodin, Kleinberg, Leighton, … 1996]

End-to-end deadlines [Parekh, Gallager 1994]



Event and Resource Models

How do we describe uncertain event streams and resources?How do we describe uncertain event streams and resources?



Arrival and Service Curves



max: 2 packetsmin: 0 packetsmax: 3 packetsmin: 1 packet

u

l

Event & Resource Models

Use arrival curves to capture packet streams:

time t

max: 1 packetmin: 0 packets

0 1 2

# of packets

1

2

3



Arrival Curves

Use the concept of arrival curves !

How do we describe uncertain input streams ? How do we describe uncertain input streams ?

maximum/minimum number of packets

in any interval of length 4

number of packetsin time interval [0,4]

],[ luR ],[ luR



Service Curves

Use the concept of service curves !

How do we describe uncertain resources ? How do we describe uncertain resources ?

maximum/minimum computing power in

any interval of length 2

computing powerin time interval [0,2]

],[ luC ],[ luC



Arrival and Service Curves

What else:• sub- and super-additivity• relation to max-+ algebra• operations correspond to convolution

RR

CC

CC

RR

inf

infsup

sup



Transformation of Curves by Modules

],[ ul

],[ ul

]','[ ul



Performance Modules

],[ ul

],[ ul

],[ ul

],[ ul

wvwv0inf

wvwv0sup

wvwv

0sup

wvwv 0

inf

wvwv ,min

uluuu ])([

llull ])[(

0 luu 0 ull



Compose and AnalyzePDSPI/O bus

fixedprio.

prop.share

fixedprio.

fixedprio.

],[ ua

la

]','[ ua

la

],[ ub

lb

]','[ ub

lb

]','[ //u

OIl

OI ]','[ ubus

lbus ]','[ u

DSPl

DSP ]','[ uP

lP



Compose and Analyze

delay d

backlog b

service curve l

arrival curve u

b

],[ ul

],[ ul



Everything Together

App. Model

Architecture Model

PerformanceNetwork

AllocationBinding

Scheduling resourcemodel

performancememory

delay

application structure

inputstreammodel

TDMA

fixedpriorit

y

WFQ



Overview



Real-Time Calculus

Modeling




Open QuestionsHow do we model different event types and correlation in event streams ?How do we model type-dependent processing (different modes of operation, example MPEG coding and decoding) ?How do we model caches ?

Use more involved abstractions,for example finite state automataUse more involved abstractions,

for example finite state automata



Refined Abstractions using FSMs



Event Stream Model

F#events vs. time interval order of events



Functional Unit Model

FSM can modelarchitecture detailsprogram flowscheduling policiestype-dependent behavior

Improvement in estimation quality in several application studies.

input_event/resource_demand/output_event



Additional Analysis MethodsAnalyze timed FSMs with respect to their timing properties. For example:

Applicable methods: minimum cycle mean [Karp], periodic graphs [Cohen, Dubois, Quadrat]

minimal and maximal accumulated delay/demand/eventsfor n consecutive transitions(and its inverse) in a compactrepresentation

minimal and maximal accumulated delay/demand/eventsfor n consecutive transitions(and its inverse) in a compactrepresentation



Missing Link(s)Link to lower layer analysis methods (like abstract interpretation)

assembler programassembler program model of computer architecture

model of computer architecture

analysisanalysis

a,b,c d,e,f,g



Overview



Real-Time Calculus

Modeling




ExperiencesNetwork processor modeling (IBM)• Detailed study of a network processor• Good match between simulation and

analytic methods (delay, memory)Use of methodology in other projects and case studies• BridgeCo• Siemens• Netmodule

Implementation and integration into design space exploration



Application ModelExample of a simple stream processing task structure:



Architecture ModelIn general, we assume an arbitrary heterogeneous architecture consisting of computing resources, memory and communication resources.



Design Space Exploration Strategy



Exploration Cycle

EXPO – Tool architecture

MOSES

EXPO SPEA 2

selectionof “good” architectures

system architectureperformance values

task graph, scenario graph,

flows & resources



EXPO - Tool

Tool available online:http://www.tik.ee.ethz.ch/expo/expo.html

Tool available online:http://www.tik.ee.ethz.ch/expo/expo.html



Results

Performance for encryption/decryption

Performance forRT voice processing



Acknowledgement

The presentation contains contributions by • Samarjit Chakraborty• Matthias Dyer• Simon Künzli• Matthias Gries• Alexander Maxiaguine

Documents

Performance Analysis of Embedded Systems