Post Layout Optimization for PDIC

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Implemetation of a

Post-Layout Optimization method with

Automatic Device Type Selectionwithin practical analog circuit design processes

Torsten Reich, Boyko Dimov, Christian Lang, Volker Boos, Eckhard Hennig


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Outline

Motivation

Proposed approaches Post-layout-optimization

Automatic Device Type Selection

Applications

BiCMOS buffer amplifier

Photodetector IC for a high-speed Blu-ray Disc R/W pickup system

Conclusions

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Motivation (1): Pre-Layout vs. Post-Layout Performance

Problem: discrepancy between pre- and post-layout performance of analogand mixed-signal circuits

Reason: layout parasitics due to devices (20%) and interconnects (80%)

Requirement: Parasitic-Aware design (pre-layout or post-layout)

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Post-layoutPre-layout

330 MHz 270 MHz

800 MHz 380 MHz

medium performance circuits

high performance circuits


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Motivation (2): Device Type Selection in BiCMOS Circuits

Fixed set of bipolar transistor device types (non-scalable or scalablein discrete steps)

Device types must be chosen manually inefficient trial and errorapproach

Requirement: Computer-aided circuit sizing with Automatic Device

Type Selection4

BJT Type 1?

BJT Type 2?

BJT Type n?


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Goal

Apply post-layout optimization and Automatic Device TypeSelection simultaneously to BiCMOS circuit design for

increased design efficiency

reduced performance discrepancies (schematic vs. post-layout)

improved layout reuse capability

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Post-Layout Optimization: Proposed Approach

layout-reuse

Second way:

First way:

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course pre-layout optimization+

post-layout optimization

Reference: T.Reich et al, IEEE ICECS, 2009


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Automatic Device Type Selection: Proposed Approach

model card

Supertransistor

Supertransistor device model interpolates continuously over allavailable BJT types (fixed and scalable)

2 continuous sweeping parameters type and emitter length

Piecewise linear interpolation over BJT model card set

Suitable for gradient-based optimization algorithm (snap-to-gridrequired after optimization) Reference: B.Dimov et al, Adv. Radio Sci. 7, 2009

type 1 (emitter length 0.5 .. 50 m)

type 2 (fixed emitter length = 1 m)

type n (emitter length 10 .. 180 m)

circuit simulator

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Post-layout optimization

Pre-layout optimization

parameter:

type =

emitter length =


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Implementation: Optimization Environment

Pre- and post-layout optimization using WickeD (MunEDA)

Additional validation using Cadence 6 optimizer

Regular design parameters (MOS W/L, R, C, ...)

Sweeping parameters of Supertransistor

(discrete and continuous)

Deterministic Optimization

Sensitivity analysis

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Application 1: BiCMOS Buffer Amplifier, Layout Reuse

Redesign existing BiCMOS buffer amplifier for new load specifications

Goals: improve performance, reuse layout

17 design parameters (9 regular device parameters and 8 sweepingparameters of Supertransistor model instances)

Simplified circuit diagram of the BiCMOS amplifier (Ref. P. M. Furth, MSCS 1993)

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Size DeviceParameters

SelectDevice Types


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Application 1: Results

initial

aexPre-layout-opt:

opt-results aex

Performance/

device parameters

Goal

post-

layout

Initial

(aex)

Optimization method

Pre-layout

Opt0(aex)

Post-layout (ADTS)

Opt2

3dB-Bandwidth (MHz) >700 323 (269) 806 (384) 700

Phase margin ( ) >55 69 (64) 61 (57) 55

Peaking (dB) 300 199 (248) 304 (365) 331

Supply current (mA)


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Pre-layout opt (sch)

Pre-layout opt (aex)

Post-layout opt = aex

Cost: 1.5 days for post-layout optimization and layout modifications

Strongly decreased discrepancy schematic (sch) vs. post-layout (aex):> 20% (270 MHz) < 5% (700 MHz)

Comparison of frequency responses

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Application 1: Layout Modifications

BJT types exchanged

Scalable circuit elements resized

Layout modified in < 0.5 days 90% time saved

(vs. new layout)

Modifications within the existing layout of the BiCMOS buffer amplifier

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Application 2: High-speed Blu-ray Disc Pickup System

laser diode (DVD: 650nm)

objective lens (DVD/CD)

coupling lens collimator (DVD/CD)

Grating lensCD: 780nm

reflection mirror

(DVD/CD)

dichoticmirror grating (DVD: 650nm)

detection lens(DVD/CD)

half mirrorlaser diodeCD: 780nm

disc

Photodetector IC (PDIC)

Reference: Blu-ray Disc Founders (2004)

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Application 2: High-Speed Blu-ray Disc Pickup System

4x Main path

1x rf path

Post-layout optimization (worst-case) of the complete amplifier chain

Goal: > 300 MHz bandwidth for all 8 channel gain settings

Specification not achieved with manual design

> 50 design parameters and supermodel sweeping parameters

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Measured frequency responses for one gain

300 MHz

Fabricated chip of the pickup system

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Post-layout bandwidth > 300 MHz was achieved for all gains

Post-layout optimization of the whole amplifier chain took less than 2days


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Conclusion

Discrepancy between pre- and post-layout performances was nearlyremoved due to parasitic awareness in post-layout optimization

Automatic Device Type Selection is very efficient for automated circuitdesign (EDA)

Successful application of both methods in a complex industrial project

excellent post-layout performance (> 300 MHz for 12x Blu-ray PDIC)

less time and manpower as in comparable projects (cost saving ~25%)

The method is easy to implement in common design environments(e.g. Cadence 5/6, WickeD optimizer )

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Thank you for your attention!

Torsten Reich

scientific co-worker, Department of Microelectronics

IMMS GmbH Tel.: +49 361-663 2561

Ehrenbergstrae 27 Fax: +49 361-663 2501

98693 Ilmenau, Germany

Institutsteil Erfurt

http://www.imms.de E-Mail: [email protected]

Documents

Post Layout Optimization for PDIC