Power distribution in SLHC trackers using embedded DC-DC ...€¦ · SLHC trackers: what needs to be powered? Detector Read-out hybrid Front-End readout ASIC-I digital ≥I analog

11

Power distribution in SLHC Power distribution in SLHC trackers using embedded DCtrackers using embedded DC--DC DC

convertersconverters

F.FaccioF.FaccioCERN CERN –– PHPH--ESEESE

PH seminar, Jan09PH seminar, Jan09 F.FaccioF.Faccio, PH/ESE, PH/ESE 22

OutlineOutline

Power distribution in the trackersPower distribution in the trackersAlternative solutions to distribute powerAlternative solutions to distribute powerProposed scheme using DCProposed scheme using DC--DC convertersDC convertersSpecific technical difficultiesSpecific technical difficulties

Semiconductor technologySemiconductor technologyEMC (conducted and radiated noise)EMC (conducted and radiated noise)Inductor designInductor design

Towards compact design and integrationTowards compact design and integrationConclusionConclusion


Distributing powerDistributing powerPatch Panels (passive connectors ensuring current path between different cables. Regulation is very seldom used)

Current path from PS to module (or more seldom star of modules) and return. Cables get thinner approaching the collision point to be compatible with material budget.

PS

No on-detector conversion. Low-voltage (2.5-5V) required by electronics provided directly from off-detector. Sense wire necessary for PS to provide correct voltage to electronics.


Distributing powerDistributing power


A few numbersA few numbersThese numbers are approximate, useful to get a feeling

Total consumption in CMS tracker (strip + pixels)33 kW on active electronics, 16 kAPower lost on cables P=RI2=33 kW (out of which 14 kW inside the tracker)With basic “average” assumptions (cable length 10m including return, all copper cables) this is equivalent to about 300 Kg of copper in the tracker volume!

~50 kW ~6x cooling

Bring power + remove heat = material

SLHC trackers: 10x more channels?Impossible to linearly extrapolate the present scheme, this would result in much more material (cooling and/or cables)

Warning: improved power distribution ALONE will not improve the tracker. It is essential to reduce as much as possible the power required by the electronics!


SLHC trackers: what needs to be SLHC trackers: what needs to be powered?powered?

Det

ecto

r

Read-outhybrid

FrontFront--End readout ASICEnd readout ASIC- Idigital ≥ Ianalog (for instance, current projection for ATLAS Short Strip readout is Ianalog ~ 17mA, Idigital ~ 51mA) - 2 power domains: Van=1.2V, Vdig=0.9-0.8V (as low as possible). The availability of 2 domains contributes significantly to power saving!

All ASICs will be manufactured in an advanced CMOS (or BiCMOS) process, 130nm generation or below. Here we consider only CMOS ASICs.

Hybrid/Module controllerHybrid/Module controller- Ensures communication (data, timing, trigger, possibly DCS) - Digital functions only - It might require I/Os at 2.5V

Other than the rod/stave controllerrod/stave controller, , optoelectronics componentsoptoelectronics components will also have to be used, requiring an additional power domain (2.5-3V)

Detector moduleDetector module

Rod/staveRod/stave


OutlineOutline

Power distribution in the trackers Power distribution in the trackers Alternative solutions to distribute powerAlternative solutions to distribute powerProposed scheme using DCProposed scheme using DC--DC convertersDC convertersSpecific technical difficultiesSpecific technical difficulties




Alternative distribution schemesAlternative distribution schemesDifferent schemes are being investigated in HEP. They all decrease the current to be brought to the tracker.

Serial powering• Connecting modules with exactly the same current in series• Sizeable effort ongoing within ATLAS (strips and pixels)

I

10xI

I

1xI

Local voltage conversion• Using DC-DC conversion to provide correct voltage to the module/chip, while distributing

higher voltage• Need a high conversion ratio (min 6, better 10) to achieve high global efficiency

DC-DC10xV, I V, 10xI

I1xI10xV


DCDC--DC conversion optionsDC conversion optionsSwitched devices

Cyclic transfer of energy from input to storing element, where it is used by the load

Different types:Piezoelectric transformers

Use of ceramic materials to transfer energy from primary to secondary side, exploiting piezoelectric effectNo commercial step-down component availableProposed by University of Tokyo within ATLAS

Switched capacitors convertersUse of capacitors to store energyMostly used to step-up the voltage (charge pumps), but step-down solutions are also foundSome work ongoing in LBNL (custom integrated component), PSI (on-chip converters) and INFN Florence (custom component with discrete devices)

Magnetic convertersUse of inductors to store energyBy far the most commonly used type of converterWork ongoing in Yale & BNL (commercial components), and CERN (custom components) This talk will focus on the CERN activity, within PHThis talk will focus on the CERN activity, within PH--ESE, and supported by ESE, and supported by PH R&D program and EU FP7 SLHCPH R&D program and EU FP7 SLHC--PP programPP program

in out


Piezoelectric transformersPiezoelectric transformers

2-days workshop organized in April at CERNHeld with a consultancy firm on piezoceramic materials and (in particular) their applicationsNothing similar to what we would need exists – requirement for developing both the custom ceramic device AND the driving circuitry

• No on-field reliability data exist!!Further difficulties emerged during the workshop

• Need for an output rectifier (difficult to achieve high efficiency for low voltage)

• Since the capacitance of the transformer has to be matched to the load, its size gets unpractical in our application (several cm per side, very thin)

• The transformer can not cope with sudden output open – too much energy stored that can not be dissipated. This is a safety concern

~ Electric field orientationOrientation of mechanical vibration

~

Conceptual representation for Rosen type transformer


Switched capacitors convertersSwitched capacitors convertersIdentical capacitors are connected alternately in series/parallel in 2 phasesConversion ratio determined by n of capacitors

Generally integer => output voltage not regulated

Connection of capacitors in the 2 phases done by integrated switches (transistors)

Switches need to have low R for high efficiency (hence large size)N of switches increases with conversion ratio

• More switches = more energy required for switching = less efficiency

Unsuitable for integration of high conversion ratio, high current, high efficiency, regulated output

Vin

Vin

4

Vin

2

3Vin

4

Vout

Vin

4

Vout

Phase 1

Phase 2


Magnetic DCMagnetic DC--DC convertersDC convertersSchematic operation shown for the simplest topology: the buck converterIt requires 1 inductor with current changing in time (this generates a magnetic field)

12

IL

control

load

Vin Vout

+-

L

Vin

Vout

t

= Duty cycle

Vin-Vout

L

Vout

L


SLHCSLHC--specific requirementsspecific requirements

Converters to be placed inside the tracker volume

Magnetic field (up to 4T)

Radiation field (>100Mrd, >1015n/cm2)

Environment sensitive to noise (EMI)

No commercial component exists, need for a custom development


Consequences of magnetic fieldConsequences of magnetic field

We are forced to use coreless (air-core) inductorsThis has a big impact on the available inductance magnitude (and ESR), hence on the design of the converter

Max B ATLAS

Max B CMS

Material


OutlineOutline





Proposed power distribution schemeProposed power distribution scheme

Conversion stage 2 (ratio 2)Conversion stage 2 (ratio 2)- Embedded in controller or readout ASIC- Closely same converter for analog and digital (different current, hence different size of switching transistors): macros (IP blocks) in same technology

Conversion stage 1 (ratio 4Conversion stage 1 (ratio 4--5.5)5.5)-Vin=10V => high-V technology-Same ASIC development for analog and digital, only feedback resistive bridge is different

10V“analog bus” 2.5V

“digital bus” 1.8V

0.9V(core)

2.5V(I/O) 0.9V

(Vdig)1.25V(Vana)

0.9V(Vdig)

1.25V(Vana)

Controller ASIC Readout ASICs


Example implementation (ATLAS Example implementation (ATLAS Short Strip concept)Short Strip concept)

Distribution with 2 conversion stagesOnly 1 line to the stave (10-12V), all other voltages generated locally Stage 1:

It is composed of 2 converters It generates 2 intermediate power buses (2.5 for analog and 1.8 for digital) It provides 1.6W for analog and 2W for digital, but could provide more than 2x that power – allowing to power 4 hybrids with even higher efficiency if mechanical integration allows it

Stage 2:Switched capacitor converter with fixed conversion ratio = 2It is integrated directly on-chip (2 per chip, analog and digital)

Efficient because able to provide locally the voltage required by the load (different for analog and digital) 10-12V

2 Converter stage2 on-chip

Det

ecto

r

2.5V bus1.8V bus

2 Converter stage 1

Hybrid controller

Voltage for SMC and optoelectronics generated locally by a converter stage 1

10-12V

Rod/staveRod/stave


Offered modularityOffered modularity

Serial “module enable”bus from SMC

10-12V

2.5V power bus1.8V power bus

HCDC-DC

Serial “chip enable”bus from HC

Easy controlModule power turned on/off by SMC via serial bus to DC-DC converters in stage 1FE ASIC individually turned on/off by HC via serial busOther configurations possible, for instance:

HC powered via separate 2.5V line under the control of SMCDC-DC converters on module controlled by HC)

Individual converter compositionDC-DC ASIC in plastic package (~7x7x1 mm)A few SMD componentsAir-core inductor

Size dependent on chosen design (to be discussed later)


OutlineOutline

Power distribution in the trackers Power distribution in the trackers Alternative solutions to distribute powerAlternative solutions to distribute powerProposed scheme using DCProposed scheme using DC--DC convertersDC convertersSpecific technical difficulties (for stage 1)Specific technical difficulties (for stage 1)




Semiconductor technologySemiconductor technologyThe converter requires the use of a technology able to work up to at least 15-20V

Such technology is very different from the advanced low-voltage (1-2.5V) CMOS processes used for readout and control electronics, for which we know well the radiation performance and how to improve it

High-voltage technologies are typically tailored for automotive applications

Need to survey the market and develop radiation-tolerant design techniques enabling the converter to survive the SLHC radiation environment (> 10Mrd)A 0.35μm technology has been extensively tested (see next slide)In the near future, 3 other technologies will be tested in the 0.18-0.13μm nodes

Properties of high-voltage transistors largely determine converter’s performance

Need for small Ron, and small gate capacitance (especially Cgd) for given Ron!

Prototypes in 0.35μm


Candidate technologiesCandidate technologiesAll technologies offer “low voltage” devices from a mixed-signal technology, with the addition of a “high-voltage” module (up to 80V in some cases)Some properties of the high-voltage transistors are summarized in the table below (for NMOS transistors, that have to be used as switches)

Tech Node (um)

Trans type

Max Vds(V)

Vgs(V)

Tox(nm)

Ron*um (kOhm*um)

Status

0.35 LateralVertical

1480

3.53.5

77

833

Tested

0.18 Lateral 20 5.5 12 4.75 Tested

0.13 Lateral 20 4.8 8.5 7 Tested

0.25 Lateral 20 2.5 5 4-5 Tested

0.18 Lateral 20 1.8 4.5 9.3 First MPW April 09


Radiation requirementsRadiation requirementsSimulation data taken from ATLAS documents, for 3000fb-1

(radiation levels in the tracker should be reasonably similar for CMS). No safety factor included

1E+0

1E+1

1E+2

1E+3

1E+4

0 10 20 30 40 50 60 70 80 90 100 110 120

Radius (cm)

TID

(Mrd

)

With safety factor 2, we can take the following number as a benchmark

20cm: 2e15 n/cm2, 250 Mrd


Radiation effects in Radiation effects in ““highhigh--VV””technologiestechnologies

Low-voltage transistors in all these technologies can satisfy our radiation requirements (marginally for 0.35μm technology, well for the others)

Effects on High-V transistors (generally “Lateral Drift MOS, LDMOS):

NMOS transistors performance more relevant, since they are used as “power switches” (their Ron determines the efficiency of the converter)TID (tested with X-rays):

• Vth shift• Leakage current (NMOS only)• Ron increase

Displacement damage (tested with protons)• Increase resistance in drift region, Ron increase


Radiation effects in LDMOSRadiation effects in LDMOS

n+

gate

oxide n+p-well n-well

Trapping centers in n-well, created via displacement damage, might increase resistance (NMOS and PMOS)

Holes trapped in the lateral oxide, due to TID, might open leakage current paths (NMOS only)

Generic representation of an N-LDMOS transistor

Charges trapped in the gate oxide, due to TID, might induce Vth shifts


Id=f(vg) in logarithmic scale

1.00E-12

1.00E-11

1.00E-10

1.00E-09

1.00E-08

1.00E-07

1.00E-06

1.00E-05

1.00E-04

1.00E-03

1.00E-02

1.00E-01

-0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5

Vg (V)

Id (A

)

prerad300krad1Mrad21Mrad

Examples of TID effects (NMOS)Examples of TID effects (NMOS)

Id=f(Vg) for Vds=12V

1.0E-11

1.0E-10

1.0E-9

1.0E-8

1.0E-7

1.0E-6

1.0E-5

1.0E-4

1.0E-3

1.0E-2

1.0E-1

-0.5 0.5 1.5 2.5 3.5 4.5Vgs (V)

Ids

(A) prerad

1Mrd10Mrd

80Mrd100Mrd

166Mrd258Mrd

annealing

Id=f(Vg) for Vds=14V

1.0E-11

1.0E-10

1.0E-9

1.0E-8

1.0E-7

1.0E-6

1.0E-5

1.0E-4

1.0E-3

1.0E-2

-0.5 0.0 0.5 1.0 1.5 2.0 2.5

Vgs (V)

Ids

(A) prerad

1 Mrd5 Mrd63 Mrd93 Mrd350 Mrdannealing

Leakage (large increase)

Large Vth shift No leakage, small Vth shift


Examples of displacement damage Examples of displacement damage effectseffects

Id=f(Vg) for Vgs=4.5V

0.0E+0

5.0E-4

1.0E-3

1.5E-3

2.0E-3

2.5E-3

3.0E-3

3.5E-3

0.0 2.0 4.0 6.0 8.0 10.0Vds (V)

Ids

(A)

prerad

5e14 p/cm21e15 p/cm2

2e15 p/cm25e15 p/cm2

1e16 p/cm2

Id=f(Vg) for Vgs=2.5V

0.0E+0

5.0E-4

1.0E-3

1.5E-3

2.0E-3

2.5E-3

3.0E-3

0.0 2.0 4.0 6.0 8.0 10.0 12.0 14.0Vds (V)

Ids

(A)

prerad5e14 p/cm21e15 p/cm22e15 p/cm25e15 p/cm27e15 p/cm21e16 p/cm2

NMOS, Ron (Vgs=4.5V)

0%

100%

200%

300%

400%

500%

600%

700%

1E+13 1E+14 1E+15 1E+16Proton fluence (p/cm2)

Ron

var

iatio

n (%

)

0

50

100

150

200

250

300

350Eq

uiva

lent

TID

(Mrd

)LDN_10_05U

LDN_10_06

LDN_10_5

Equivalent TID

NMOS, Ron (Vgs=2.5V)

0%

50%

100%

150%

200%

250%

1E+13 1E+14 1E+15 1E+16Proton fluence (p/cm2)

Ron

var

iatio

n (%

)

0

50

100

150

200

250

300

350

Equi

vale

nt T

ID (M

rd)

LDN_07_90

LDN_06

Equivalent TID

… and in on-resistance (Ron)

Effect visible in output characteristics [Id=f(Vds)]


Summary of resultsSummary of resultsOne technology (0.25μm node) has demonstrated radiation tolerance compatible with benchmark:

NMOS Ron decrease below 60% for 2.5·1015 n/cm2 (1MeV equivalent)Vth shift manageable (below 200mV for NMOS, 400mV for PMOS @ 350Mrd)Negligible leakage current with TIDOverall, radiation could affect converter performance as small drop of efficiency (below 5%)

One technology (0.13μm node) could satisfy requirements for installation further from collision point, where fluence is limited below 1·1015 n/cm2 (1MeV equivalent)The other 2 technologies are less performant and will not be considered furtherConclusion:

While starting prototype work in the 0.25um technology, another 0.18μm technology will be tested in 2009 (we look for a second source with comparable radiation performance)


OutlineOutline





EMC issuesEMC issuesWithout any doubt, switching converters inside the tracker are an additional source of noiseNoise can be conducted (via the cables) or radiated (near-field emission from inductor, loops, and switching nodes). Both propagation paths have to be controlledAction is required in 2 directions

Decrease the noise from the sourceControl the noise path – ultimately design a more robust system

EMI (dV/dt)

EMI (dI/dt)

EMI (dI/dt)

EMI (dψ/dt)


Conducted noise measurementConducted noise measurement

Reference test bench developed within ESE

Well defined measurement methods for reproducible and comparable results.Independence from the system

and from the bulk power source.Arrangement of cables, input and

output filter (LISN) around the converter under test, all above a ground plane.


Conducted CM noise from custom Conducted CM noise from custom prototypes prototypes

Several custom DC-DC prototypes (buck topology) using discrete commercial components have been manufacturedProper design of PCB and choice of passive components (caps) drastically decrease the conducted noise

Example: output common mode noise for 2 custom prototypes using identical discrete components (commercial driver + switches). Only the design of the PCB and the passive components differ

Frequency (Hz) Frequency (Hz)

Noi

se (d

BuA

)

“Reference” level based on Class A limit from CISPR11 converted to current on a given impedance (Careful: this is NOT a real limit)


Modeling CM noiseModeling CM noiseUnderstanding the noise source in detail is necessary to developefficient countermeasuresWe used our custom DC-DC prototypes (discrete components) to develop a model and cross-check it against real data

1. Parasitic capacitances at all nodes are extracted for the converter PCB using Q3D

2. Passive components are fully characterized in frequency, and replaced by their equivalent model

3. Switches are replaced by voltage sources – the analysis in frequency is possible by making the FFT of the measured Vds of the transistors

4. All elements are inserted in a model, which is simulated using PSPICE

5. Results are compared with measured data

Comparison to measurements show that main mechanism are well accounted forImpact of capacitor choice (value, ESL, ESR) understoodThis guides design choices in new prototypes


Radiated noiseRadiated noiseEffects of radiated noise from the inductor have been studied using a Si Strip readout module from TOTEMThe readout is binary and uses the VFAT FE ASICThe S-curve was measured at nominal parameters (threshold, settings), and noise is represented by the slope of the S-curve

Architecture of VFAT ASICSi strip detector with 4 readout VFAT ASICs


Radiated noise (magnetic field)Radiated noise (magnetic field)The susceptibility of systems to the magnetic field emitted by inductors of power converters is a major concern. System tests were carried out on TOTEM, with a coil driven by an amplified RF source. The coil is accurately positioned above the detector, the bondings and the ASICs and the induced noise is analyzed from the test DAQ.

538 nH air core, 1A.

Distance to center (mm)

Field (uT)

4 1560

9 88

14 19

19 6.4

24 2.9

100 uT at 5 mm from edge

Coil edge


Susceptibility to Magnetic FieldSusceptibility to Magnetic FieldSensitivity as function of distanceSensitivity as function of distance

Noise estimated at 1MHz, 1A peak.

The sensors and the bondings are insensitive to the inductor couplings for distances greater than 20 mm.


Susceptibility to Magnetic FieldSusceptibility to Magnetic FieldShielding of inductor (Al wrap)Shielding of inductor (Al wrap)

The shielding of the coil with Al foil allows protecting the front-end against radiated noise


Powering a Si Strip module with Powering a Si Strip module with DCDC--DC converter prototypes (1)DC converter prototypes (1)

•Measurements on the TOTEM Si Strip module, with detector biased

•3 locations were exercised, with no impacton the noise performance of the system

•Cables were still relatively long in this test

The front-end ASICs were powered by a DC/DC converter prototype (PH-ESE) with the CM output noise shown in the figure to the left – switching frequency = 1MHz

X1X2 X3

VFAT# Nominal Noise

X1(far, long

cable)

X2(close, long

cable)

X3(close, short

cable)

1 1.76 1.70 1.73 1.76

2 1.81 1.72 1.70 1.73

3 1.68 1.55 1.62 1.62

4 1.56 1.59 1.59 1.59


• DCDC mounted on top of the detector without shield, d < 15 mm to be able to see some coupling effect

• This is radiated noise (cables as in previous measurements, hence no influence of conducted noise as before)

X2 X3

VFAT# Nominal Noise

X4(top of strips)

1 1.76 2.79

2 1.81 2.32

3 1.68 1.85

4 1.56 1.76




• DCDC connected to the module via very short cables

• Conducted noise increases (inductance of long cables actively filters noise) and a small noise increase is observed

• The measured noise is different with different converter prototypes


Summary of EMC issuesSummary of EMC issuesBoth conducted and radiated noise have to be considered

Conducted noise can be decreased, when its sources are understood, with careful layout, appropriate choice of passive components, appropriate choice of converter topology and implementation

• System configuration has an important impact on the effect of conducted noise (grounding, return path for currents, …)

Radiated noise mainly – but not only – comes from the inductor

• It can be reduced by increasing the distance to the sensitive electronics and detector or – better – by shielding

Experiments on Si strip modules with binary readout (TOTEM, ATLAS SCT) have shown that even present converter prototypes can power the modules with small or no impact on system noise

This is very encouraging in view of the availability of optimized and compact converters


Further reducing conducted noiseFurther reducing conducted noise

Conducted noise performance of the converter can be improved by pi-filtersUsing small (SMD-grade) capacitor and inductor at input and output, we could decrease considerably the CM noise of our prototypesMeasurement was made with “amateur-grade”modifications to existing prototypes…

Noise floor different because of change of attenuation factor (30 to 10dB) in the measurement to enable the observation of the much smaller noise. ONLY PEAK value matters!

“Reference” levels based on Class A and B limits from CISPR11 converted to current on a given impedance (Careful: this is NOT a real limit)

Prototype 3

Without filters

With filters

Small size of components of pi-filter


OutlineOutline





Requirements for the inductorRequirements for the inductor

Value: up to 500-700nH (this is feasible with air-core)Compact for high integrationLight for low material budgetWith small ESR both in DC and AC (at the switching frequency) for high efficiencyIt needs to be shielded for low radiated noise


Different airDifferent air--core inductorscore inductorsAir-core inductors can be manufactured in different configurations: planar, solenoid, toroid

Planar (on PCB)Planar (on PCB)ESR(DC)>100mΩ

SolenoidSolenoidESR(DC)~10-30mΩ

ToroidToroidESR(DC)~20-30mΩ for custom winding, largely dependent on implementation for PCB toroid


Air core solenoidAir core solenoid

A 100μm Al shield is placed 4mm far from the solenoid not to affect the inductance value (and create losses)

0 2 4 6 8 10 12 14 16 1810-7

10-6

10-5

10-4

10-3

10-2

Distance from the center of the solenoid [mm]

Mag

netic

indu

ctio

n [T

]

Solenoid without shieldSolenoid with shield at 4mm

We simulated (Ansoft Maxwell 3D) the magnetic field from inductors of different type, and the effect of shielding

An unshielded solenoid radiates considerably the surrounding space

65 mm

65 mm

The shield is very effective in decreasing the EM radiation

But the volume is largely increased AND this structure is mechanically unstable as it is…


AirAir--core core toroidtoroid

Air-core toroid contains the main magnetic field (the one determining the inductance value)…

… but it still radiates because of the one-loop current path around its center

This can in principle be shielded effectively by “wrapping” the inductor in an Al layer

Fabrication can be done industrially – custom winding available at different companies

The volume of the inductor is large, and addition of a solid shield in fabrication process has to be studied


““OptimizedOptimized”” PCB PCB toroidtoroid (1)(1)Custom design exploiting PCB technology: easy to manufacture, characteristics well reproducibleDesign can be optimized for low volume, low ESR, minimum radiated noiseWith the help of simulation tools (Ansoft Maxwell 3D and Q3D Extractor), we estimated inductance, capacitance and ESR for different designs. This guided the choice of the samples to manufacture as prototypes

Design for low ESR: larger diameter, use of 2 layers in parallel for each petal

Design for smaller radiated noise: current flows in opposite direction in the two halves around the center

Design examples


““OptimizedOptimized”” PCB PCB toroidtoroid (2)(2)

0 2 4 6 8 10 1210

-7

10-6

10-5

10-4

10-3

10-2

Distance from the border of the inductors [mm]

Mag

netic

indu

ctio

n [T

]

150nH solenoid unshieldedStandard 150nH PCB toroid150nH PCB toroid shielded

Due to the compact design, the radiated field is smaller than for a solenoidThis field can be shielded with the addition of two Al layers (top and bottom)This shields the “parasitic” field, hence the inductor value is unaffected

A series of PCB toroids has been designed and is now being manufacturedMeasurements will be compared to simulation


OutlineOutline





Towards integration (1)Towards integration (1)Compact design

Reducing the size of the full converterDesign compatible with tracker layout (evolving) in terms of area, volume, material budget, cooling

System functionalityTaylor design to required powerIntegration in the system (protections, control, turn-on and off procedures)

System testsUse converter prototypes to power available system prototypes (evolving)

PCB substrateASIC SMD devices

Inductor

Integration in ATLAS SCT module designFrom D.FerrereUniversity of Geneva

2 converters (analog and digital power)


Towards integration (2)Towards integration (2)

Conversion stage 2Switched-capacitor on-chip converterFixed conversion ratio = 2No control feedback, easy design (need for optimizing efficiency, minimizing noise)Efficiency estimate is high (above 90%) for the small current of a single FE ASICNeed to demonstrate it on first readout ASIC prototypes (possibility to power the analog FE via such a converter on-chip)


OutlineOutline





ConclusionConclusion

Distributing power is SLHC trackers requires a different scheme than what has been used for LHC trackersThe use of DC-DC converters enables to meet the requirements, but implies the availability of “custom”converters (radiation, magnetic field, EMC)Technical difficulties for the successful development of the converters are being solved. Converter design for integration in final system is evolvingPH R&D program and EU FP7 SLHC-PP program provide essential resources for this crucial development

Documents

Power distribution in SLHC trackers using embedded DC-DC ...€¦ · SLHC trackers: what needs to be powered? Detector Read-out hybrid Front-End readout ASIC-I digital ≥I analog