SHRI VISHNU ENGINEERING COLLEGE FOR WOMEN::BHIMAVARAM

Report A Two-day Workshop on

“Analog and Digital CMOS IC Design flow using Mentor Graphics EDA tools”

5-6 October, 2015

Convenor: Prof.GRLVN Srinivasa Raju

Coordinator: Mr.V .Srinivasa Rao

SVECW Dept. of ECE Mentor Graphics EDA Tools

2 Report 2015

Shri Vishnu Engineering College for Women

Bhimavaram-534 202

A REPORT

on

A Two-day Workshop on

“Analog and Digital CMOS IC Design flow using Mentor Graphics EDA tools”

5th-6th October, 2015

(Under TEQIP-II) for PG students and Faculty of SVECW and other institutions

Organized by

Department of Electronics and Communication

Engineering

About the Training program:

The main purpose of this workshop is to provide an opportunity for engineering

faculty from Academic Institutions, engineers from Industries and Post Graduate Students

to get the exposure and interaction with the field experts, who are involved in the research

and development activities in VLSI Design. Eminent persons from industry will be invited

to deliver special lectures and demonstrations. In addition to giving exposure to recent

topics of designing VLSI circuits for Mixed Signal Circuits using EDA tool like Mentor

Graphics and ADS(Advance Design System).

The Workshop will give impetus to participants to do their research and development

activities in the area of VLSI Design and related applications. Therefore solutions for the

many real world problems will be attempted in an efficient way using the EDA tools

The objectives of the program:

Coverage of Semicustom and Full Custom IC Design flow using Mentor Graphics

tools with ADK 3.1 library

Focus on backend design flow with relevant details on physical design & verification

Current trends and challenges in very deep submicron technology

Insights into concepts of Analog and mixed signal design and focus on concepts of

physical verification flow

SVECW Dept. of ECE Mentor Graphics EDA Tools

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Course outline:

Topics Covered:

Overview of ASIC Full custom and Semicustom IC Design flow

Digital back end flow – schematic entry

Concepts of Analog IC Design flow

Analog & Mixed Signal CMOS IC design flow

Concepts of Parasitic Extraction and back annotation, area analysis and power

analysis

Inaugural Session:

On 5th

October, the proceedings began with inauguration ceremony, with the esteemed

presence of Honourable principal Dr. G. Srinivasa Rao , Convenor & and HOD of ECE

Department Prof G.R.L.V.N Srinivas Raju , along with coordinator Mr V.Srinivasa Rao.

Principal of SVECW, Dr. G. Srinivasa Rao Delivered the welcome speech, Prof

G.R.L.V.N Srinivas Raju, Head, Electronics and Communication Engineering Department,

gave the introductory speech about the schedule and key features of the Program.

Coordinator of this program Proposed vote of thanks for this Inaugural session.

Glimpses of Inauguration Ceremony:

GALLERY

Opening remarks by the Principal

Opening Remarks by the Convener

SVECW Dept. of ECE Mentor Graphics EDA Tools

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Opening Remarks by co-ordinator

SVECW Dept. of ECE Mentor Graphics EDA Tools

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Gathering for the workshop

Paying tributes to late Dr B.V.Raju,Founder Shri Vishnu

Educational Society by Principal Dr

G.Srinivasarao,Principal of SVECW.

SVECW Dept. of ECE Mentor Graphics EDA Tools

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SVECW Dept. of ECE Mentor Graphics EDA Tools

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Opening remarks by the Resource Person

SVECW Dept. of ECE Mentor Graphics EDA Tools

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Technical sessions

SHRI VISHNU ENGINEERING COLLEGE FOR WOMEN: BHIMAVARAM

(Autonomous)

Work Shop Schedule for Analog and Digital CMOS IC Design flow using Mentor Graphics EDA

tools, 5-6 October, 2015

Date Timings Event

5/10/2015 9.30am-10.30am Inaugural Function

10.30am-10.45am Tea Break

10.45am-11.30am Overview of ASIC Full custom and

Semicustom IC Design flow.

11.30am-12.00am Lab session 1 – Digital back end flow –

schematic entry,

12.00am-1.00pm Creating the stimulus (Test Bench) and

performing the Simulation.

Physical design concepts & Hands on

exercise using Pyxis tool flow

1.00pm-2.00pm Lunch Break

SVECW Dept. of ECE Mentor Graphics EDA Tools

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2.00pm-3.30pm Lab Session 2: Physical Verification (LVS

and DRC checks) using Calibre & Post

Layout

3.30pm-3.45pm Tea Break

3.45pm-5.00pm Simulation using ELDO.

Concepts of Parasitic Extraction and

back annotation, area analysis and

power analysis

6/10/2015 9.00am-11.00am Concepts of Analog IC Design flow -

basic analog design blocks

11.am-11.15am Tea Break

11.15am-1.00pm Analog & Mixed Signal CMOS IC design

flow

1.00pm-2.00pm Lunch Break

2.00pm-3.30pm Lab session 3: Modeling and analysis of

a single stage Differential Amplifier

Modeling

3.30pm-3.45pm Tea Break

3.45pm-5.00pm Semicustom Design Flow using mentor

Graphics EDA ( HEP1) tools

5.00pm-5.30pm Valedictory function

Valedictory Function:

The last session was the valedictory session. The valedictory function was addressed by

Convenor & and HOD of ECE Department Prof G.R.L.V.N Srinivas Raju , Coordinator Mr

V.srinivasaRao,Resource Person,shared experiences about this Workshop. Some of the

participants expressed their experiences in the workshop.The function ended with vote of

thanks by Mr.V.SrinivasaRao, who expressed his gratitude towards all the dignitaries,

participants and all other helping hands, which contributed towards the success of the event.

SVECW Dept. of ECE Mentor Graphics EDA Tools

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GALLERY

Horning Resource person with memento

SVECW Dept. of ECE Mentor Graphics EDA Tools

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Final remarks by resource Person

Hands on Experience(Practical Sessions)

SVECW Dept. of ECE Mentor Graphics EDA Tools

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Vote of Thanks by

Convener

Feedback by Student

SVECW Dept. of ECE Mentor Graphics EDA Tools

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Certificates Distribution to the Participants