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8/16/2019 SST11CP15
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©2013 Silicon Storage Technology, Inc. DS70005016C 08/13
Data Sheet
www.microchip.com
Features
• Small package size
– 12-contact UQFN (2mm x 2mm x 0.6mm max thick-ness)
• Wide operating voltage range
– VCC = 3.0–5.0V
• High linear output power:
– 802.11a OFDM Spectrum mask compliance up to 23dBm at 3V.
– Added EVM ~3% up to 20 dBm, typically at 5V VCC,across 5.1-5.9 GHz for 54 Mbps 802.11a signal
• High power-added efficiency/low operating currentfor 54 Mbps 802.11a applications
– ~11% @ POUT = 19 dBm for 54 Mbps, 3.3V VCC
• Gain:– Typically 26 dB gain across broadband
4.9-5.9 GHz, 3.3V VCC
• Low idle current
– ~120 mA ICQ
• High speed power-up/-down
– Turn on/off time (10%~90%)
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4.9-5.9 GHz High-Linearity Power AmplifierSST11CP15
Data Sheet
Functional Blocks
Figure 1: Functional Block Diagram
1
1428 B1.0
2
3
9
8
7
12 11 10
4 5 6
RFIN
VCCb
VREF1
V R E F 2
V R E F 3
D E T
NC
RFOUT
GND
V C C 3
V C C 2
V C C 1
Input
Match
BiasControl
Power
Detection
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4.9-5.9 GHz High-Linearity Power AmplifierSST11CP15
Data Sheet
Pin Assignments
Figure 2: Pin Assignments for 12-contact UQFN
1
1428 P1.0
2
3
9
8
7
12 11 10
4 5 6
RFIN
VCCb
VREF1
V R E F 2
V R E F 3
D E T
NC
RFOUT
GND
V C C 3
V C C 2
V C C 1
Top View(Contacts facing down)
RF and DC GND
0
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4.9-5.9 GHz High-Linearity Power AmplifierSST11CP15
Data Sheet
Pin Descriptions
Table 1: Pin Description
Symbol Pin No. Pin Name Type1
1. I=Input, O=Output
Function
GND 0 Ground The center pad should be connected to RF ground with several
low inductance, low resistance vias.
RFIN 1 I RF input, DC decoupled
VCCb 2 Power Sup-
ply
PWR Supply voltage for bias circuit
VREF1 3 PWR Current Control
VREF2 4 PWR Current Control
VREF3 5 PWR Current Control
DET 6 O On-chip power detector
NC 7 No Connec-tion
Unconnected pin
RFOUT 8 O RF Output
GND 9 Ground Ground (NC is acceptable)
VCC3 10 Power Sup-
ply
PWR Power supply, 3rd stage
VCC2 11 Power Sup-
ply
PWR Power supply, 2nd stage
VCC1 12 Power Sup-
ply
PWR Power supply, 1st stage
T1.1 75016
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4.9-5.9 GHz High-Linearity Power AmplifierSST11CP15
Data Sheet
Electrical Specifications
The AC and DC specifications for the power amplifier interface signals. Refer to Table 3 for the DC voltage and
current specifications. Refer to Figures 3 through12 for the RF performance.
Absolute Maximum Stress Ratings (Applied conditions greater than those listed under “AbsoluteMaximum Stress Ratings” may cause permanent damage to the device. This is a stress rating only andfunctional operation of the device at these conditions or conditions greater than those defined in theoperational sections of this data sheet is not implied. Exposure to absolute maximum stress rating con-ditions may affect device reliability.)
Supply Voltage at pins 2, 10, 11, 12 (VCC). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +5.5V
DC supply current (ICC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500 mA
Operating Temperature (TA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -20ºC to +85ºC
Storage Temperature (TSTG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40ºC to +120ºC
Maximum Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +150ºCMaximum Output Power. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 dBm
Surface Mount Solder Reflow Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C for 10 seconds
Table 2: Operating Range
Range Ambient Temp VCC
Industrial -10°C to +85°C 3.3V-5.0V
T2.1 75016
Table 3: DC Electrical Characteristics
Symbol Parameter Min. Typ Max. UnitVCC Supply Voltage at pins 2, 10, 11, 12 2.7 3.3 5.0 V
ICC Supply Current @ POUT = 18 dBm
VCC = 3.3V 220 mA
VCC = 4.2V 240 mA
VCC = 5.0V 290 mA
ICQ VCC quiescent current
VCC = 3.3V 135 mA
VCC = 4.2V 170 mA
VCC = 5.0V 175 mA
IOFF Shut down current 1.0 10 µA
VREG Reference Voltage for recommended application 2.85 VT3.0 75016
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4.9-5.9 GHz High-Linearity Power AmplifierSST11CP15
Data Sheet
Table 4: AC Electrical Characteristics for Configuration
Symbol Parameter Min Typ Max Unit
FL-U Frequency range 4.9 5.9 GHzLinear Power Output power with 3% EVM at 54 Mbps OFDM signal
VCC = 3.3V 18 dBm
VCC = 5.0V 20 dBm
ACPRA Output power level with 802.11a mask compliance
VCC = 3.3V 23 dBm
VCC = 5.0V 23 dBm
Gain Power gain from 4.9–5.9 GHz
VCC = 3.3V 26 dB
VCC = 5.0V 22 dB
T4.1 75016
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4.9-5.9 GHz High-Linearity Power AmplifierSST11CP15
Data Sheet
Typical Performance Characteristics
Test Conditions: VCC = 3.3V, TA = 25°C, VREG = 2.85V unless otherwise noted
EVM for 54 Mbps Operation using data plus sequence test configuration
Figure 3: EVM versus Output Power, VCC = 3.3V, VREG = 2.85
Figure 4: Power Supply Current versus Output Power, VCC = 3.3V, VREG = 2.85
1428 F4.1
EVM versus Output Power
0
1
2
3
4
5
6
7
8
9
10
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21
Output Power (dBm)
E V M
( % )
Freq=4.9 GHz
Freq=5.1 GHz
Freq=5.5 GHz
Freq=5.825 GHz
1428 F5.1
60708090
100110120130140150160170180190200210220230240250260270280290300
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21
S u p p l y
C u r r e n t ( m A )
Output Power (dBm)
Supply Current versus Output Power
Freq=4.9 GHz
Freg=5.1 GHz
Freq=5.5 GHz
Freq=5.825 GHz
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Data Sheet
Figure 5: Power Gain versus Output Power, VCC = 3.3V, VREG = 2.85
Figure 6: Maximum Mask Compliance, VCC = 3.3V, VREG = 2.85, Frequency = 5.5 GHz atPOUT = 23.3 dBm with ICC = 390 mA
1428 F7.1
10111213141516
171819202122232425262728293031323334
10 11 12 13 14 15 16 17 18 19 20 21
P o w e r G a i n ( d B )
Output Power (dBm)
Power Gain versus Output Power
Freq=4.9 GHz
Freg=5.1 GHz
Freq=5.5 GHz
Freq=5.825 GHz
1428 F6.0
Spectrum Mask 802.11a (5500MHz)
-80
-70
-60
-50
-40
-30
-20
-10
0
5.45 5.55
Frequency(GHz)
A m p l i t u d e ( d B )
Spectrum
Relative limit
5.5
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Data Sheet
Figure 7: Detector Voltage vs Output Power, VCC = 3.3V, VREG = 2.85
Figure 8: PAE vs Output Power, VCC = 3.3V, VREG = 2.85
1428 F8.1
0.30
0.40
0.50
0.60
0.70
0.80
0.90
1.00
1.10
1.20
1.30
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21
D e t e c t o r V o l t a g e ( V )
Output Power (dBm)
Detector Voltage versus Output Power
Freq=4.9 GHz
Freq=5.5 GHz
Freq=5.5 GHz
Freq=5.825 GHz
1428 F9.1
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21
P A E ( % )
Output Power (dBm)
PAE versus Output Power
Freq=4.9 GHz
Freg=5.1 GHz
Freq=5.5 GHz
Freq=5.825 GHz
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4.9-5.9 GHz High-Linearity Power AmplifierSST11CP15
Data Sheet
Typical Performance characteristics
Test Conditions: VCC = 5.0V, TA = 25°C, VREG = 2.90V unless otherwise noted
Figure 9: EVM versus Output Power, VCC = 5.0V, VREG = 2.90V
Figure 10:DC Current versus Output Power, VCC = 5.0V, VREG = 2.90V
1428 F13.0
0
1
2
3
4
5
6
7
8
9
10
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23
E V M
( % )
Output Power (dBm)
EVM versus Output Power
4920
5180
5500
5850
1428 F14.0
100120140160
180200220240260280300320340360380400420
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23
S u p p l y C u r r e n t ( m A )
Output Power (dBm)
Supply Current versus Output Power
4920 5180
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4.9-5.9 GHz High-Linearity Power AmplifierSST11CP15
Data Sheet
Figure 11:Gain versus Output Power, VCC = 5.0V, VREG = 2.90V
1428 F12.0
0
2
46
8
10
12
14
16
18
20
22
24
26
28
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23
P o w e r G a i n ( d B )
Output Power (dBm)
Power Gain versus Output Power
4920
5180
5500
5850
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Data Sheet
Figure 12:S-Parameters
1428 S-Parms.1.0
S12 versus Frequency
-80
-70
-60
-50
-40
-30
-20
-10
0
0.0 1.0 2 .0 3 .0 4 .0 5.0 6 .0 7.0 8 .0 9 .0 10 .0 11.0 12 .0 13 .0
Frequency (GHz)
S 1 2 ( d B )
S11 versus Frequency
-40
-35
-30
-25
-20
-15
-10
-5
0
0 .0 1.0 2 .0 3 .0 4 .0 5.0 6 .0 7.0 8 .0 9 .0 10 .0 11.0 12 .0 13 .0
Frequency (GHz)
S 1 1 ( d B )
-40
-30
-20
-10
0
10
20
30
40
0.0 1.0 2 .0 3 .0 4 .0 5.0 6 .0 7.0 8 .0 9 .0 10 .0 11.0 12 .0 13 .0-40
-35
-30
-25
-20
-15
-10
-5
0
0 .0 1.0 2 .0 3 .0 4 .0 5.0 6 .0 7.0 8 .0 9 .0 10 .0 11.0 12 .0 13 .0
S22 versus Frequency
Frequency (GHz)
S 2 2 ( d B )
S21 versus Frequency
Frequency (GHz)
S 2 1 ( d B )
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4.9-5.9 GHz High-Linearity Power AmplifierSST11CP15
Data Sheet
Figure 13:Typical Application for High-Linearity 802.11a/n Application (VCC = 3.3V,
VREG=2.85V)
1428 F11.1
1
2
3
9
8
7
12 11 10
4 5 6
50Ω
RFIN
50Ω
35 mil from the edge of the package
0Ω
105Ω
DET
VREG
68Ω Test ConditionsVREG = 2.85VVCC=VCCb=3.3V
0.7 pF
0.1 µF
0.1 pF
RFOUT
VCC
4.7 µF0.1 µF0.1 µF
200 pF
11CP15
2X2 12L UQFN
Top ViewVCCb
0.1 µF
Note: The SST11CP15 has on-chip DC-blocking caps for RF ports
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4.9-5.9 GHz High-Linearity Power AmplifierSST11CP15
Data Sheet
Figure 14:Typical Application for High-Linearity 802.11a/n Application (VCC = 5.0V,VREG=2.90V)
1428 F15.0
1
2
3
9
8
7
12 11 10
4 5 6
50Ω
RFIN
50Ω
Capacitor placement is measured from
edge of PA to edge of capacitor.
0Ω
87Ω
DET
VREG
87Ω Test ConditionsVREG = 2.9VVCC=VCCb=5.0V
50Ω
146mil
12mil
20mil
0.7 pF
0.1 µF
RFOUT
VCC
4.7 µF0.1 µF0.1 µF
200 pF
11CP15
2X2 12L UQFN
Top ViewVCCb
0.1 µF
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Data Sheet
Product Ordering Information
Valid combinations for SST11CP15
SST11CP15-QUBE
SST11CP15 Evaluation Kits
SST11CP15-QUBE-K
Note:Valid combinations are those products in mass production or will be in mass production. Consult your SST
sales representative to confirm availability of valid combinations and to determine availability of new combi-nations.
SST 11 CP 15 - QUBE
XX XX XX - XXXX
Environmental Attribute
E1 = non-Pb contact (lead) finish
Package Modifier
B = 12 contact
PackageTypeQU = UQFN
Product Family Identifier
ProductTypeP = Power Amplifier
VoltageC = 3.0-5.0V
Frequency of Operation1 = 4.9-5.9 GHz
Product Line1 = SST Communications
1. Environmental suffix “E” denotes non-Pb sol-
der. SST non-Pb solder devices are “RoHSCompliant”.
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4.9-5.9 GHz High-Linearity Power AmplifierSST11CP15
Data Sheet
Packaging Diagrams
Figure 15:12-contact Ultra-thin Quad Flat No-lead (UQFN)SST Package Code: QUB
12-uqfn-2x2-QUB-2.0
0.4 BSC
See notes2 and 3
Pin #1
0.25
0.15
0.92
0.34
0.24
TOP VIEW BOTTOM VIEWSIDE VIEW
1mm
0.265
0.165
Pin #1(laser
engravedsee note 2)
2.00 ±0.05
2.00 ±0.05
0.075
Note: 1. Similar to JEDEC JEP95 UQFN/USON variants, though number of contacts and some dimensions are different.
2. The topside pin #1 indicator is laser engraved; its approximate shape and location is as shown.
3. From the bottom view, the pin #1 indicator may be either a curved indent or a 45-degree chamfer.
4. The external paddle is electrically connected to the die back-side and to VSS.
This paddle must be soldered to the PC board; it is required to connect this paddle to the V SS of the unit.
Connection of this paddle to any other voltage potential will result in shorts and electrical malfunction of
the device.
5. Untoleranced dimensions are nominal target dimensions.
6. All linear dimensions are in millimeters (max/min).
0.60
0.50
0.05 Max
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Data Sheet
Table 5:Revision History
Revision Description Date
00 • Initial Release of Data Sheet Jul 201001 • Updated Features on page 1; Table 3 on page 6; and Figures 4, 5, 7,
8, and 14Jan 2011
A • Updated Features on page 1, Table 3 on page 6, and Table 4 onpage 7
• Added Figures -11 and 14
• Applied new document format
• Released document under letter revision system
• Updated spec number from Sy1428 to DS76016
Aug 2011
B • Updated Figure 15 to reflect new Pin 1 indicator Jul 2012
C • Fixed figure references in history table and “Electrical Specifications”
on page 6 to point to the correct figures
Aug 2013
© 2013 Silicon Storage Technology, Inc–a Microchip Technology Company. All rights reserved.
SST, Silicon Storage Technology, the SST logo, SuperFlash, MTP, and FlashFlex are registered trademarks of Silicon Storage Tech-nology, Inc. MPF, SQI, Serial Quad I/O, and Z-Scale are trademarks of Silicon Storage Technology, Inc. All other trademarks andregistered trademarks mentioned herein are the property of their respective owners.
Specifications aresubject to change without notice. Refer to www.microchip.com for themost recent documentation. For the most current
package drawings, please see the Packaging Specification located at http://www.microchip.com/packaging.Memory sizes denote raw storage capacity; actual usable capacity may be less.
SST makes no warranty for the use of its products other than those expressly contained in the Standard Terms and Conditions ofSale.
For sales office locations and information, please see www.microchip.com.
Silicon Storage Technology, Inc.
A Microchip Technology Company
www.microchip.com
ISBN:978-1-62077-406-9