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SURF ‘n TURF Gary S. Varner University of Hawai , i, Manoa ANITA Collaboration Meeting @ UC Irvine April 7 th , 2005

SURF ‘n TURFidlab/presentations... · SURF v2? Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005 25 • Improvements (?) – Routing simplification: • 5 CPLDs + 1 FPGA

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Page 1: SURF ‘n TURFidlab/presentations... · SURF v2? Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005 25 • Improvements (?) – Routing simplification: • 5 CPLDs + 1 FPGA

SURF ‘n TURF

Gary S. VarnerUniversity of Hawai

,i, Manoa

ANITA Collaboration Meeting @ UC IrvineApril 7th, 2005

Page 2: SURF ‘n TURFidlab/presentations... · SURF v2? Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005 25 • Improvements (?) – Routing simplification: • 5 CPLDs + 1 FPGA

Talks Overview: 2 parts

1Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005

• Sampling Unit for RF (SURF) evolution– Digitization: STRAW, LABRADOR generations

– SURFpro evaluation, SURFv1

– Mezzanine card/DDTs

• Important System Issues:– Power

• DC draw update

• RF levels

– Timing analysis

– Testing plans/issues (TURFpro integration)

Page 3: SURF ‘n TURFidlab/presentations... · SURF v2? Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005 25 • Improvements (?) – Routing simplification: • 5 CPLDs + 1 FPGA

Basic trigger/digitizer data stream

2Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005

• Split signal: 1 path to trigger, 1 for digitizer

• Use multiple frequency bands for trigger

• Digitizer runs ONLY when triggered to save power

Page 4: SURF ‘n TURFidlab/presentations... · SURF v2? Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005 25 • Improvements (?) – Routing simplification: • 5 CPLDs + 1 FPGA

Specifications

3Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005

# of RF channels 80 32 top; 32 bottom; 8 bicone; 8 vetoSampling rate 3 GSa/s > NyquistSample resolution > 9 bits 3 bits noise + dynamic rangeSample window 256 85ns time window# of Sample buffers 4 (2) multi-hit (extended window)Power/channel < 1W excluding tertiary amplification, triggering# of Trigger bands 4 200-400; 400-650; 650-880; 880-1200# of Trigger channels 8 per antenna (4bands x RCP,LCP)Trigger threshold <= 2.3σ operation well into the thermal noiseAccidental trigger rate < 5Hz at target Trigger thresholdL2 Trigger latency 45ns to issue Hold signalGlobal Trigger latency as necessary multi-buffering of analog permits

Sampling

Trigger

Page 5: SURF ‘n TURFidlab/presentations... · SURF v2? Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005 25 • Improvements (?) – Routing simplification: • 5 CPLDs + 1 FPGA

RF Digitizer checklist

4Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005

• Sampling Rate >= 3GSa/s

• 12-bit ADC performance

• Analog Bandwidth >= 1.2 GHz

• Dynamic Range >= 9 bits

Page 6: SURF ‘n TURFidlab/presentations... · SURF v2? Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005 25 • Improvements (?) – Routing simplification: • 5 CPLDs + 1 FPGA

LABRADOR sampling & linearity

5Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005

• Excellent ADC linearity

• Sampling rates up to 4 GSa/s with voltage overdrive

Page 7: SURF ‘n TURFidlab/presentations... · SURF v2? Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005 25 • Improvements (?) – Routing simplification: • 5 CPLDs + 1 FPGA

6Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005

-3

-2

-1

0

1

2

3

0 200 400 600 800 1000 1200

RF Frequency [MHz]

Am

plitu

de [d

B]

-15dB sine wave

LABRADOR bandwidth

• Bandwidth measured by two separate methods: RF sine wave (1050MHz max) and transient impulses

Page 8: SURF ‘n TURFidlab/presentations... · SURF v2? Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005 25 • Improvements (?) – Routing simplification: • 5 CPLDs + 1 FPGA

LAB1 dynamic range

7Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005

Labrador1 Output Data RLD4=22K, GainRef=0.4V

y = 2076.6x4 - 13018x3 + 30799x2 - 33101x + 15955R2 = 0.9998

1500

1700

1900

2100

2300

2500

2700

2900

3100

0.7 0.9 1.1 1.3 1.5 1.7 1.9 2.1

Voltage (V)

Out

put D

ata

RLD3=50KPoly. (RLD3=50K)

-10

-8

-6

-4

-2

0

2

4

6

8

10

0.7 0.9 1.1 1.3 1.5 1.7 1.9 2.1

Voltage (V)

Diffe

renc

e

1V range = 971 counts (~1 count/mV)

Low: 0.4mV/countMid: 1.5mV/count

High: 4.5mV/count

Page 9: SURF ‘n TURFidlab/presentations... · SURF v2? Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005 25 • Improvements (?) – Routing simplification: • 5 CPLDs + 1 FPGA

LABRADOR2 – Jing Cao

8Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005

Trans-impedance source follower– LABRADOR2

• ~1mV “noise”, > 1V full scale (and linear + non-inverted)

• 10 bits should be feasible

• No changes to RF feed/timing or power

• Initial testing early ’05 – didn’t understand results

Page 10: SURF ‘n TURFidlab/presentations... · SURF v2? Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005 25 • Improvements (?) – Routing simplification: • 5 CPLDs + 1 FPGA

LABRADOR/2 floorplan

9Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005

8x HS Analog out, 1x MUX out

8 chan. * 256 samples

128x Wilk ADCs

Analog“Superbuffers”

StraightShot

RF inputs

Random access:

Page 11: SURF ‘n TURFidlab/presentations... · SURF v2? Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005 25 • Improvements (?) – Routing simplification: • 5 CPLDs + 1 FPGA

LAB2 Test bench

10Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005

LAB2 (indistinguishable from LABRADOR @ this resolution)

Page 12: SURF ‘n TURFidlab/presentations... · SURF v2? Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005 25 • Improvements (?) – Routing simplification: • 5 CPLDs + 1 FPGA

LAB2 DC Linearity

11Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005

0

500

1000

1500

2000

2500

3000

3500

-1 -0.5 0 0.5 1 1.5

Voltage (V)

Out

put D

ata

1.5 counts/mV

-30

-20

-10

0

10

20

30

40

-0.4 -0.2 0 0.2 0.4 0.6 0.8 1 1.2 1.4

Voltage

Diff

eren

ce

Linear Residuals

1.6V dynamic range(DC transfer)

Key: Transimpedance Source Follower

Allows operation without input offset

Page 13: SURF ‘n TURFidlab/presentations... · SURF v2? Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005 25 • Improvements (?) – Routing simplification: • 5 CPLDs + 1 FPGA

LAB2 Problem

12Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005

Vofs

78fF

ReadWrite

Vin

Rsense

Vout

Vdd

78fF

ReadWrite

VinPMOS PMOS

LAB2

For reasonable settling time, need strong sense I;However, closed channels strongly active

LABRADOR

Decided for SURF v.1, LABRADOR only option

Page 14: SURF ‘n TURFidlab/presentations... · SURF v2? Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005 25 • Improvements (?) – Routing simplification: • 5 CPLDs + 1 FPGA

LAB3 (?)

13Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005

Faster Readout:– Why not put an ADC in every storage cell?

• Readout could be < 100us (40us convert and 50us data transfer)

• No analog sample transfer (biggest headache)

– Give up analog waveform out

• 9 RF channels (1 dedicated timing)

• Greatly simplified control

• Implement 4 bucket “tail catcher”

• Modified termination scheme– Truly 50 Ω– No resistive drop across array

Page 15: SURF ‘n TURFidlab/presentations... · SURF v2? Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005 25 • Improvements (?) – Routing simplification: • 5 CPLDs + 1 FPGA

14Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005

Architecture Comparison

Wilkinson ADC

40k

Gain

Analog

buffers

10k

10k

20k

40k

Analog

buffersinputs

4 RF

inputs

4 RF

4

4

timing control

SCA bank: 4 rows x 256 columns

SCA bank: 4 rows x 256 columns

8

8 12

Gain

20k

inputs

4 RF

12

128x Wilkinson ADC

AMUX

LABRADOR(2) architecture

timing control

inputs

5 RF

LABRADOR(3) architecture

SCA bank: 5 rows x 260 columns

SCA bank: 4 rows x 260 columns

+−

+−

input

Page 16: SURF ‘n TURFidlab/presentations... · SURF v2? Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005 25 • Improvements (?) – Routing simplification: • 5 CPLDs + 1 FPGA

Chip comparison

15Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005

LABRADOR, LAB2 LAB3

41 analog/control lines (better VDD/GND)Very simple state machine

65 analog/control lines3-deep nested state machine

Page 17: SURF ‘n TURFidlab/presentations... · SURF v2? Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005 25 • Improvements (?) – Routing simplification: • 5 CPLDs + 1 FPGA

Trigger checklist

16Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005

• Good Band spacing

• Sufficient amplitude through TDD

• Net length balancing

Page 18: SURF ‘n TURFidlab/presentations... · SURF v2? Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005 25 • Improvements (?) – Routing simplification: • 5 CPLDs + 1 FPGA

RFCeval – 0th order prototype

17Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005

Quick Reference:

•RFCeval == Radio Freq Comp evaluation board•STRAW == Self-Triggered Recorder for Analog Waveforms•LABRADOR == Large Analog Bandwidth Recorder And Digitizer with Ordered Readout

Page 19: SURF ‘n TURFidlab/presentations... · SURF v2? Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005 25 • Improvements (?) – Routing simplification: • 5 CPLDs + 1 FPGA

18Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005

SURFpro

Pro = Prototype

Page 20: SURF ‘n TURFidlab/presentations... · SURF v2? Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005 25 • Improvements (?) – Routing simplification: • 5 CPLDs + 1 FPGA

Diode Detector Test (DDT) Eval

19Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005

Trigger Studies

Filter Banding

Tunnel Diode

DDT BoardDDT2 Board

Filter Banding

Tunnel Diode

Page 21: SURF ‘n TURFidlab/presentations... · SURF v2? Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005 25 • Improvements (?) – Routing simplification: • 5 CPLDs + 1 FPGA

Filter Banding

20Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005

0 5 10 15

x 108

−80

−70

−60

−50

−40

−30

−20

−10

Freq. Hz

pow

er d

B

DDT2 rcp all 4 bands with vertical input

ver−>rcp1ver−>rcp2ver−>rcp3ver−>rcp4

• some balancing needed• band tuning

Page 22: SURF ‘n TURFidlab/presentations... · SURF v2? Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005 25 • Improvements (?) – Routing simplification: • 5 CPLDs + 1 FPGA

Modified Bands

21Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005

SURFv1 Proposed Band Pass

-20

-18

-16

-14

-12

-10

-8

-6

-4

-2

0

0 500 1000 1500

Frequency [MHz]

Am

plitu

de [d

B]

LFCN-225Filter XLFCN-490HFCN-650LFCN-630HFCN-880Outer BP

Page 23: SURF ‘n TURFidlab/presentations... · SURF v2? Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005 25 • Improvements (?) – Routing simplification: • 5 CPLDs + 1 FPGA

Diode detector Response

22Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005

σ

Voltageσ

Exponential distribution

<P>

Power:

P/<P>

P/<P>

~7ns integration

Gaussian distribution

Tunnel Diode DetectorLNA

Quad−ridgehorn antenna

Needs amplification!

Tunnel Diode Output Single Channel Trigger Rate

0

0.5

1

1.5

2

2.5

3

3.5

4

4.5

5

3 3.2 3.4 3.6 3.8 4 4.2 4.4 4.6 4.8 5

Power/<Power>

Co

un

t R

ate

[M

Hz]

singles

2.3σ ~= 3.9 P/<P>

Page 24: SURF ‘n TURFidlab/presentations... · SURF v2? Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005 25 • Improvements (?) – Routing simplification: • 5 CPLDs + 1 FPGA

23Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005

SURF v1

RF

split

RF

split

RF

split

RF

split

16

16

16

LNAs

LNAs

LNAs

LNAs

4

4

16

16

back

plan

e

x4 LABRADOR

split

RF

8

8

8

8

8

16Discrim.

Tra

nsiti

on M

odul

e Sl

ots

cPCI

32

LVDS

SURFv1 TURF

16

QR−horn#1

#2

#3

#4

QR−horn

QR−horn

QR−horn

H

V

V

V

V

H

H

H

CPLDs

hybrid

Master

BandingTrigger

90−deg

hybrid

FPGA

local bus

PCI3

2

J4

J1

ADC

TunnelDiodes

PLX9030

Sampling

RF Power Monitor

DACs

Threshold

90−deg

SURF High Occupancy RF Trigger (SHORT) board

Page 25: SURF ‘n TURFidlab/presentations... · SURF v2? Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005 25 • Improvements (?) – Routing simplification: • 5 CPLDs + 1 FPGA

24Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005

SURF v1

SURF v1

Page 26: SURF ‘n TURFidlab/presentations... · SURF v2? Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005 25 • Improvements (?) – Routing simplification: • 5 CPLDs + 1 FPGA

SURF v2?

25Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005

• Improvements (?)– Routing simplification:

• 5 CPLDs + 1 FPGA 1FPGA

• More space for LAB(3?) routing – net length balancing

– Dedicated reference timing channel?

– Remove dedicated comparators? (use FPGA LVDS receivers as comparators – less EMI and power)

• Triggering OK (?) [isolate changes to SHORT board?]

Page 27: SURF ‘n TURFidlab/presentations... · SURF v2? Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005 25 • Improvements (?) – Routing simplification: • 5 CPLDs + 1 FPGA

Online Documentation

26Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005

http://www.phys.hawaii.edu/~idlab

Page 28: SURF ‘n TURFidlab/presentations... · SURF v2? Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005 25 • Improvements (?) – Routing simplification: • 5 CPLDs + 1 FPGA

Part I Summary

27Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005

• Much progress since last met in autumn– Some RF components STILL on order

• Plans:– Defer to after the break – additional input

• SURF board cost ~ 10k$ per board– All RF components (4.8k$ in Tunnel Diodes alone)

Page 29: SURF ‘n TURFidlab/presentations... · SURF v2? Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005 25 • Improvements (?) – Routing simplification: • 5 CPLDs + 1 FPGA

Part 2:

28Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005

• Important System Issues:– Power

• DC draw update

• RF levels

– Timing analysis

– Testing plans/issues (TURFpro integration)

Page 30: SURF ‘n TURFidlab/presentations... · SURF v2? Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005 25 • Improvements (?) – Routing simplification: • 5 CPLDs + 1 FPGA

SURFv1 DC Power

29Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005

Qty . Part Number M anufacturer Supp lier Static Power(ea.) Dynamic P+ (ea.) Total [W]8 AD5324BRM Analog Dev Digi-Key 2.00E-03 0 0.03 BUF04701AIDGSR Texas Instr Digi-Key 5.50E-03 8.00E-03 0.0 1.1mA*5V 2V-1k *45 CD4051BE Texas Instr Digi-Key 1.50E-02 0 0.1 3mA*5V4 CD74HC7046AM Texas Instr Digi-Key 0.066 0 0.3 20mA*3.34 LABRADOR ID Lab/TSM C TS MC/MOS IS 0.5 0.1 2.4 .2A*2.5V 20% Dig includes CPLD8 M AX9201 M axim M axim 0.058 2.00E-03 0.5 5mA*-5V 3mA*5V x2 dynamic1 LTC1415CG Linear Tech Digi-Key 5.50E-02 0 0.1 spec max 55mW8 M AX4003 M axim M axim 0.02079 0 0.2 6.5mA*3.31 PLX_PCI9030 PLX 0.495 0 0.5 150mA*3.31 XC3S200 Xilinx Avnet 0.06525 0.6525 0.7 20mA*1.2+16.5mA*2.5 *10 dynamic4 XC95144XL Xilinx Digi-Key 0 0 0.0 included in LABRADOR number1 XC95144XL_TQ144 Xilinx 0.264 0 0.3 80mA*3.3 avg @ 50MHz effective -- dynamic incl.1 XCF01S-VO10C Xilinx 0.0495 0 0.0 15mA*3.38 VAM -6 M ini-Circuits M ini-Circuits 0.085 0.0425 1.0 17mA*5V 50% loading ?

64 VAM -6 M ini-Circuits M ini-Circuits 0.09 0.045 8.6 24mA*5V 50% loading ? on SHORT board

TOTAL = 14.7 W

Power breakdownLABRADOR 1.2 maxDigital control 3.0Analog misc. 0.3RF amplification 9.7RF power monitor 0.3Trigger 0.5

14.94707

SURFpro Power Breakdown

LABRADOR8%Digital control

20%

Analog misc.2%

RF amplification65%

RF power monitor2%

Trigger 3%

-5Vmay go away

Page 31: SURF ‘n TURFidlab/presentations... · SURF v2? Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005 25 • Improvements (?) – Routing simplification: • 5 CPLDs + 1 FPGA

SURFv1 RF Power

30Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005

Antenna -84.8 dBmHorn Elec dB

[1] Antenna feed loss 0.00 -84.8 SWR included on antenna page (set to 0.0 here)[2] Cable loss -0.15 -85.0 guess for short quad shield[3] Coupler insertion loss -0.18 -85.2 1.5 Wellatone C6600-102[4] Bandpass filter -1.2 -86.4 Wainwright WHKS 185-8SS[5] Limiter -0.2 -86.6 Adv Ctrl Circuits ACLM4932C46

Tsys increase 1.73 -84.8LNA insertion loss 0.00 -84.8 included on antenna+LNA page (set to 0.0 here)LNA gain 37 -47.8 Miteq AFS4-00100200-10-15P4 thermal noise added on ant+lna pageLNA return loss 0.00 -47.8 2.0 output VSWR only affect back power! (set to 0.0 here)

[7] Attenuator -3.00 -50.8 Minicircuits (?)2nd amp insertion loss -0.12 -51.0 1.4 VSWR2nd amp gain, typical 40 -11.0 Mini-circuits ZKL-1R52nd amp return loss -0.24 -11.2 1.6 VSWR

[9] Long cable loss -1 -12.2 5 meters of RG-6???2nd BP filter -1.2 -13.4 needed to enforce passband just before DAQ, cuts out-of-band powerFeedthrough conn -0.04 -13.4 1.2patch cable loss -0.2 -13.6

SURFpro SMA input conn -0.04 -13.7 1.2First split insert loss -0.8 -14.51st split (SBTC-2-20) -3 -17.5

Trigger chainvoltage into labrador chain 29.9 mV voltage into trigger chain 29.9 mV2nd split insert loss -0.8 -18.3 VAM-6 insert loss -0.12 -17.62nd split (SBTC-2-20) -3 -21.3 VAM-6 gain 16 -1.63rd split insert loss -0.8 -22.1 VAM-6 return loss -0.2 -1.83rd split (SBTC-2-20) -3 -25.1 2nd split insert loss -0.8 -2.42745 insert loss -0.05 -25.1 2nd split (SBTC-2-20) -3 -5.4UPC2745TB gain 0 -25.1 3rd split insert loss -0.8 -6.22745 return loss -0.19 3rd split (SBTC-2-20) -3 -9.2LABR insert loss (incl pad) -3 -28.1 Filters: bands 1/2/3/4Total power [dBm ] -28.1 Insertion loss -0.8 -10.0 -4.03 -13.2 -2.284 -11.5 -2.04 -11.2Noise RMS power [W ] 1.54E-06 Fractional band 0.175 -17.6 0.28 -18.7 0.25 -17.5 0.43 -14.9Noise voltage [mV] 8.8 90-degree hybridsLAB full scale (+/-) mV 500 Insertion loss -0.83 -18.4 -1.28 -20.0 -1.68 -19.2 -0.31 -15.2LAB lsb [mV] 1.50 PWRM split insert loss -0.8 -19.2 -0.8 -20.8 -0.8 -20.0 -0.8 -16.0Number noise counts 5.9 PWRM split(SBTC-2-20) -3 -22.2 -3 -23.8 -3 -23.0 -3 -19.0 2.00 VSWRNumber of noise bits 2.55 Diode detector [ins.] -0.51 -22.7 -0.51 -24.3 -0.51 -23.5 -0.51 -19.5Dynamic range 699.9 Noise RMS [mW] 5.37E-03 3.68E-03 4.48E-03 1.12E-02

noise rms into diode, mV 16.38 13.56 14.97 23.64

Diode detector [gain] log10(Vout,mV) = 2.24 log10(Vin,mV) -3.315 from fitted response dataDiode LPF Vout,mV 0.243 0.160 0.199 0.549VAM-6 net gain/V,mV 16.00 1.5 1.0 1.3 3.5pad -3.00VAM-6 net gain 16.00Avg amplitude [mV] 6.9 4.5 5.6 15.5Trigger thres. (P/<P>) 3.9Trigger amplitude [mV] 26.72 17.56 21.85 60.38trigger rms power (dBm) -18.45 -22.10 -20.20 -11.37

SLQ-K07 SLQ-K09 SLQ-K10 SQH-8012

LFCN-320 filterX/LFCN-400 HFCN-650/LFCN-800 HFCN-880

Antenna noise power in =

LABRADOR chain

[6]

[8]

Page 32: SURF ‘n TURFidlab/presentations... · SURF v2? Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005 25 • Improvements (?) – Routing simplification: • 5 CPLDs + 1 FPGA

Timing Path

31Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005

• TURF bridges cPCI modules along backplane--sees local trigger pattern across antenna clusters

• Issues data hold, then digitize if trigger pattern is satisfied

4

4

4

4

Page 33: SURF ‘n TURFidlab/presentations... · SURF v2? Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005 25 • Improvements (?) – Routing simplification: • 5 CPLDs + 1 FPGA

Diode Detector Test (DDT) Eval

32Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005

Trigger Studies

DDT Board

2 times of interest:

1. Absolute time w.r.t. PPS2. Channel-to-channel timing

Page 34: SURF ‘n TURFidlab/presentations... · SURF v2? Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005 25 • Improvements (?) – Routing simplification: • 5 CPLDs + 1 FPGA

Trigger Timing Measurement

33Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005

2ns/bin

1.2ns resolution

(Spartan-3)

Local Oscillator Stability:5x10-10

+ Freq. Mult. Jitter~ 1.34ns

Not timing resolution!

Page 35: SURF ‘n TURFidlab/presentations... · SURF v2? Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005 25 • Improvements (?) – Routing simplification: • 5 CPLDs + 1 FPGA

Timing Fan-out Jitter

34Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005

• LABRADOR time encoding– Interpolate HITBUS (hold/Halt):

• 330ps/SQRT(12) ~ 95ps

• LVDS/CPLD fan-out jitter – many 100ps

• TURF fan-out intrinsic timing– To be evaluated

– Now have SURF <-> TURF link running, can test

• Dedicated timing signal (?)– LAB3 provides this option

Page 36: SURF ‘n TURFidlab/presentations... · SURF v2? Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005 25 • Improvements (?) – Routing simplification: • 5 CPLDs + 1 FPGA

Trigger Studies

35Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005

Logical segmentation

L2 = 2 of 5

Top cluster

Phi = 0(1 of 16)

Bottom cluster

L2 = 2 of 5

Nadir clusterL2 = 2 of 3

(example Trigger Type = 1 shown)

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Studies/Documentation Owed

36Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005

• SURF User’s Manual (programmer’s manual)

• TURFIO User’s Manual

• TURF Trigger Timing measurement results

• FPGA discriminator study (DDT)

• Student project: Trigger sensitivity to non-Gaussian noise and self-generated noise

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Specifications - anon

37Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005

# of RF channels 80 24 channels (30% done)Sampling rate 3 GSa/s achievedSample resolution > 9 bits TBD (LAB1 marginal)Sample window 256 achieved# of Sample buffers 4 (2) achievedPower/channel < 1W 1.8W est. (measurement soon)# of Trigger bands 4 achieved, to be studied# of Trigger channels 8 fits (barely) -- SHORT has 100's of pcsTrigger threshold <= 2.3σ TBD (1/f, local impulsive)Accidental trigger rate < 5Hz TBDL2 Trigger latency 45ns TBD (can test with TV set-up)Global Trigger latency as necessary achieved

Sampling

Trigger

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Part II Summary

38Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005

• Ready for TV test:– Has been useful integration exercise

– Most parts TV rated – qualify the rest

• Plans:– Evaluation of SURFv1 performance

– Start serious TURF studies (how many boards needed?)

– TV test hardware enough for EM flight

• Design issues: – More LABs needed (Rev. 1 or 3); when?

– SURFv2 ?

– Freeze design when?

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Back-up slides

39Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005

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Template

40Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005

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Aside: LABRADOR sampling speed

41Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005

STRAW2 Sampling Freq.

0

0.5

1

1.5

2

2.5

3

3.5

1 1.5 2 2.5 3

Freq. Adj. Voltage (ROVDD) [V]

Sam

plin

g Fr

eq. [

GH

z]

Avg.-cycle+cycleSPICE

High/Low CTRL:• Extend to 4 GSa/s• Improve odd/event• Low freq operation

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Askaryan Signature

42Gary S. Varner, ANITA Collab Meeting @ UC Irvine, April 2005

0 2 4 6 8

Time (ns)

• Significant signal power at large frequencies

• Strong linear polarization (near 100%)