Two’s Complement Number wheel for 4 bit

numbers

Addition

Subtraction

Booth’s Theory

0011111025+24+23+22+21

26-21

• Looks for transitions from 0-1 (add) and 1-0 (minus)

• Uses a “phoney” bit -1 (i.e. to the right of bit 0)

• Assumes two’s complement signed numbers – extend bit width of unsigned numbers if

necessary.

Booths Algorithm

Two’s complement multiplication examples

Division

CCS compiler w/ 2’s complement

#device PIC16F877 *=8 ADC=8void main(){

signed int c;c=-4;

}

0000 3000 movlw 0x0 0001 008A movwf 0xA 0002 2804 goto MAIN 0003 0000 nop 0004 0184 MAIN clrf 0x4 0005 301F movlw 0x1F 0006 0583 andwf 0x3 0007 30FC movlw 0xFC 0008 00A1 movwf 0x21 0009 0063 sleep

Addition/Subtraction

0000 3000 movlw 0x0 0001 008A movwf 0xA 0002 2804 goto MAIN 0003 0000 nop 0004 0184 MAIN clrf 0x4 0005 301F movlw 0x1F 0006 0583 andwf 0x3 0007 30FC movlw 0xFC 0008 00A1 movwf 0x21 0009 3002 movlw 0x2 000A 0721 addwf 0x21,W 000B 00A2 movwf 0x22

#device PIC16F877 *=8 ADC=8void main(){

signed int c;signed int b;c=-4;b=c+2;

}

Addgood movf datalo,W ; W = datalo

addwf resultlo,F ; resultlo = resultlo + W

movf datahi,W ; W = datahi

btfsc STATUS,C ; If no carry ...

incfsz resulthi,F ; if resulthi is 0 after the increment

; ... don't do the addition

addwf resulthi,W

movwf resulthi ; resulthi = resulthi + W

Subrgd movf Q2_lo,W

subwf Q1_lo,W ; W = Q1_lo - Q2_lo

movwf R_lo

movf Q2_hi,W

btfss STATUS,C ; need to borrow?

goto Borrow

subwf Q1_hi,W ; W = Q1_hi - Q2_hi

movwf R_hi

goto Done

Borrow subwf Q1_hi,W ; W = Q1_hi - Q2_hi

movwf R_hi

decf R_hi,F ; do the decrement after

Done return

Multiplication&

Division

0063 0184 MAIN clrf 0x4 0064 301F movlw 0x1F 0065 0583 andwf 0x3 0066 30FA movlw 0xFA 0067 00A1 movwf 0x21 0068 0821 movf 0x21,W 0069 00A3 movwf 0x23 006A 3005 movlw 0x5 006B 00A4 movwf 0x24 006C 2804 goto 0x4 006D 0878 movf 0x78,W 006E 00A2 movwf 0x22 006F 0821 movf 0x21,W 0070 00A3 movwf 0x23 0071 3003 movlw 0x3 0072 00A4 movwf 0x24 0073 283B goto 0x3B 0074 0878 movf 0x78,W 0075 00A2 movwf 0x22 0076 0063 sleep

#device PIC16F877 *=8 ADC=8void main(){

signed int c;signed int b;c=-6;b=c*5;b=c/3;

}goto vs. call?

; 8x8 unsigned multiply routine.

; No checks made for M1 or M2 equal to zero

clrf R_hi ; Clear result location

clrf R_lo

movlw 0x08 ; setup loop count

movwf cntr

movf M1,W ; initialize W with M1

Umul rrf M2,F ; rotate into carry to check bits

btfsc STATUS,C ; if carry set i.e. bit was 1

addwf R_hi,F ; ... we add

rrf R_hi,F ; shift over for the next addition

rrf R_lo,F

decf cntr,F ; check the loop count

btfss STATUS,Z

goto Umul

return

CCS CompilerInteger multiplication

• Repeated addition– store result sign– convert both integers to unsigned– store one integer in W– For each bit in integer;

• if set add W to the result

• rotate result

– if result sign is negative, convert the result

BCD

• Decimal: Facilitates easy conversion to/from human input

• BCD: Each digit represented by an n-bit binary number

• Packed BCD: 2 digits represented in a single byte

5 9

0 1 0 1 1 0 0 1

ASCII

• Visible Character Codes• Control Codes

– Physical Communication Control

– Logical Communication Control

– Physical Device Control

– Physical Device Format Effects

– Code Extenders

– Information Separators

From: http://www.mindspring.com/~jc1/serial/Resources/ASCII.html

Floating point arithmetic

SBE ; B is known

E E E

E E E

E E

E E

X Y YS S

E EX Y YS S

X YS S

X YS

S

X Y X B Y BX Y

X Y X B Y B

X Y X Y B

XXB

Y Y

CCS compiler floating point numbers

CCS floating point example

#device PIC16F877 *=8 ADC=8void main(){

float c;c=1.25;

}

0000 3000 movlw 0x0 0001 008A movwf 0xA 0002 2804 goto MAIN 0003 0000 nop 0004 0184 MAIN clrf 0x4 0005 301F movlw 0x1F 0006 0583 andwf 0x3 0007 307F movlw 0x7F 0008 00A1 movwf 0x21 0009 3020 movlw 0x20 000A 00A2 movwf 0x22 000B 3000 movlw 0x0 000C 00A3 movwf 0x23 000D 00A4 movwf 0x24 000E 0063 sleep

Should we use floating point with the PIC?

• VERY LONG programs, which are processor intensive – try CCS assembler

float c=2.3;

c=2.3;

c=2.3*1.25;

• Possible Alternatives– lookup tables– fixed point representation

(factored arithmetic)

See:http://www.phanderson.com/PIC/16C84/calc_disc_1.html

Memory Wars

• Bit Numbering• Bit Ordering• Data Alignment• End-ian-ness

Changing bit-widths

• 2’s complement – extend/reduce the sign bit

• BCD– fill with 0’s at front

• ASCII– defined as 7-bit

• Floating point– fill significand (mantissa) at end– add the change in offset to

exponent

Assembler ProgrammingDirectives, Good Practice

• LIST p=<target microcontroller>

• #include <file> – predefined constants for target microcontroller

• <const> EQU <value> – define own constants (can be used for the

addresses of variables)

• Labels in the first column• nop at address 0x00 (ICD)• goto at address 0x01 (Interrupts)

• ORG <addr> – next code line appears at this address

• BANKSEL <addr> – switch banks to that for the specified address

• sleep at the end of the main routine– Be careful that main code does not

“accidentally” run into subroutine code and vice versa

• END -- end of the code

Table Creation/Lookup

table addwf PCL, F ; add W and store in PCL retlw B'00000001' ; return 1 in W if W = 1 retlw B'00000011' ; return 3 in W if W = 2 retlw B'00000110' ; return 6 in W if W = 3 retlw B'00000010' ; return 2 in W if W = 4 end

DT “Bat”,0retlw A’B’retlw A’a’retlw A’t’retlw 0

Table Creation/Lookup

DE (8-bit data in the EEPROM memory)

ORG 0x02100DE “Bat”,0

BSF STATUS, RP1 ;BCF STATUS, RP0 ;Bank 2MOVF ADDR, W ;Write addressMOVWF EEADR ;to read fromBSF STATUS, RP0 ;Bank 3BCF EECON1, EEPGD ;Point to Data memoryBSF EECON1, RD ;Start read operationBCF STATUS, RP0 ;Bank 2MOVF EEDATA, W ;W = EEDATA

Table Creation/Lookup

DA (14-bit data in the program memory) ASCII strings packed two chars to a word

DA "abcdef"will put 30E2 31E4 32E6 3380 into program memory

DA 0xFFFFwill put 0x3FFF into program memory

BSF STATUS, RP1 ;BCF STATUS, RP0 ;Bank 2MOVF ADDRL, W ;Write theMOVWF EEADR ;address bytesMOVF ADDRH,W ;for the desiredMOVWF EEADRH ;address to readBSF STATUS, RP0 ;Bank 3BSF EECON1, EEPGD ;Point to Program memoryBSF EECON1, RD ;Start read operationNOP ;Required two NOPsNOP ;BCF STATUS, RP0 ;Bank 2MOVF EEDATA, W ;DATAL = EEDATAMOVWF DATAL ;MOVF EEDATH,W ;DATAH = EEDATHMOVWF DATAH ;

movf countl,F

btfsc STATUS,Z

decf counth,F

decf countl,F

movf countl,F

btfsc STATUS,Z

movf count,F

btfsc STATUS,Z

goto Bz

goto Nbz

Page IV-6, Q.1

Original Code:• 1 case: 2+8+2 • 216-1 cases: 2+9+2• Avg. Cycles: 9• Max. Cycles: 9

Modified Code:• Remove 1 line• Swap 2 lines• 1 case: 2+8+2• 216-1 cases: 2+7+2• Avg. Cycles: 7• Max. Cycles: 8

sRedundant

Subtraction of 1 can never result

in both a borrow and a zero result

i.e. if the carry flag is clear,

the zero flag is never set.

Early Exit• C, Z 256 cases: 2+5+2• C, Z 256*254 cases:

2+5+2

Remaining C, Z• 255 cases 2+8+2• 1 case: 2+9+2

• Avg. Cycles: 5• Max. Cycles: 9

movlw 1

subwf countl,F

btfss STATUS,C

decfsz counth,F

btfss STATUS,Z

goto Nbz

movf counth,W

btfss STATUS,Z

goto Nbz

goto Bz

Page IV-6, Q.1 Tutorial Group Solution

Tutorial Group page IV-6 Q. 6

To divide an x-bit dividend by a q-bit divisor using Booth’s like division– make an (q+x) bit number for the q-bit

remainder and x-bit quotient

– initialise the uppermost q-bits with the sign bit of the dividend, and the lower x-bits with the dividend

– Loop for x times:• arithmetic left shift the (q+x) bit number

• if the sign is the same as(different from) the divisor

– subtract(add) the divisor from(to) the uppermost q bits

– if the result sign is different from the original sign; undo

– if the result sign is the same as the original sign OR the whole (q+x) number is 0; set the LSB of the (q+x) bit number to 1

– Remainder is top q-bits. If the divisor and dividend signs are same (different), the answer is the (complement of ) bottom x-bits