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Page 1: Embedded Systems Project Based Training|Engineering Projects,Summer Training

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Winter training,Readymade Projects,Buy Projects,Corporate Training,Offered By Technogroovy Systems Techogroovy Systems India Pvt Ltd , www.technogroovy.com, Cell- +91-7500347448 , +91-7533940322 Mail : [email protected]

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Internal Architecture

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89C51 µC

1234567891011121314151617181920

4039383736353433323130292827262524232221

VCCP0.0P0.1P0.2P0.3P0.4P0.5P0.6P0.7EA/VPPALE/PROGPSENP2.7P2.6P2.5P2.4P2.3P2.2P2.1P2.0

P1.0P1.1P1.2P1.3P1.4P1.5P1.6P1.7

ResetP3.0P3.1P3.2P3.3P3.4P3.5P3.6P3.7

XTAL1XTAL2

GND

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I/O Port Programming

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Port 1

• Port 1 occupies a total of 8 pins. It can be used as input or output.

• This port does not need any pull-up resistor since it already has pull-up resistor internally.

• Port 1 as input– If port1 is configured as output port, to make it as input

port again, it must be programmed as by writing 1 to all its bits.

Example:-MOV A,#0FFH ;A=FF hexMOV P1,A ;make P1 an input port

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Port 2

• Port 2 act similarly to port 1.

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A Brief Description of Pinouts of AT89C51

• Pins 1-8 : Pins 1 through 8 are the pins of Port 1. Port 1 is a dedicated

I/O port; so these pins are available for interfacing external devices as required. No alternate function is assigned to these pins.

• Pin 9 : Pin Number 9 is the system RESET (RST) of CPU of AT89C51.

AT89C51 is reset by holding RST high for at least two machine cycles and then returning it low. The Reset may be manually activated using a switch, or may be activated upon power-up using RC network. After a system reset, Program Counter is loaded with 0000H. When RST returns low, program execution begins at the first location in code memory at address 0000H.

...continued

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• Pins 10-17 : Pins’ numbers 10 through 17 constitute Port 3 which is a

dual purpose port. As well as general purpose I/O, these pins are multifunctional with each having an alternate purpose related to special features of C51. These features along with pins are summarized in the coming table :

A Brief Description of Pinouts of AT89C51

…continued

...continued

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A Brief Description of Pinouts of AT89C51

…continued

Symbols followed by Pound Sign(#) are “Low Enable”

Pin # Bit # Symbol Bit Add Alternate Function10 P3.0 RxD B0 H Receive data for Serial Port11 P3.1 TxD B1 H Transmit data for Serial Port12 P3.2 INT0# B2 H External Interrupt 013 P3.3 INT1# B3 H External Interrupt 114 P3.4 T0 B4 H Timer/Counter 0 external input15 P3.5 T1 B5 H Timer/Counter 1 external input16 P3.6 WR# B6 H External Memory write strobe17 P3.7 RD# B7 H External Memory read strobe

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• Pins 18-19 : Pins’ numbers 18 and 19 comprise the inputs of crystal to be

connected to the on-chip oscillator of AT89C51. Two Stabilizing capacitors of 30 pF each are also required.

• Pin 20 : It is the common ground of 89C51 and accompanying

networks.

• Pins 21-28 : Pins 21 through 28 are of Port 2.

Port 2 is a also a dual purpose port. It can serve as a general purpose I/O port or as the high byte of the address bus for designs with external code memory or more than 128 bytes of data memory.

A Brief Description of Pinouts of AT89C51

…continued

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• The 8051 has an on-chip oscillator but requires an external clock to run it. Most often a quartz crystal oscillator is connected to inputs XTAL1 (pin 19) and XTAL2 (pin 18). The quartz crystal oscillator connected to XTAL1 and XTAL2 .One side of each capacitor is connected to the ground as shown in Figure.

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• Pin 29 and Pin 31 : These pins are used in conjunction with external code

memory being used or else. On Pin number 29 is a control signal PSEN# (Program Store Enable) that enables external code (Program) memory. It is usually connected to an EEPROMs Output Enable(OE#) pin to permit reading of program bytes. Pin 31 i.e. EA# (External Access) is either tied high (+5V) or low (ground). If high, the C51 executes programs from internal ROM otherwise from external code memory (and then PSEN# comes into play).

• Pins 32 - 39 and Pin Number 30:Pins 32 through 39 make up Port 0. Port 0 ,in addition to being used as an I/O port, has the capacity to act as multiplexed data and address bus. The discrimination of data and address is provided through ALE (Address Latch Enable) which is Pin number 30.

A Brief Description of Pinouts of AT89C51

…continued

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The 8051 family members, such as the 8751/52, 89C51/52, or DS89C4xO, all come with on-chip ROM to store programs. In such cases, the EA pin is connected to Vcc. For family members such as the 8031 and 8032 in which there is no on-chip ROM. code is stored on an external ROM and is fetched by the 8031/32. Therefore, for the 8031 the EA pin must be connected to GND to indicate that the code is stored externally. EA. which stands for “external access,” is pin number 31 in the DIP packages. It is an input pin and must be connected to either Vcc or GND. In other words, it cannot be left unconnected.

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• Pins 40 : POWER SUPPLY

A Brief Description of Pinouts of AT89C51

…continued

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AT89C51 RAM

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Register Banks

R1R2R5R7 R6 R4 R3 R0

R1R2R5R7 R6 R4 R3 R0

R1R2R5R7 R6 R4 R3 R0

R1R2R5R7 R6 R4 R3 R0 RB – 3

RB – 2

RB – 1

RB – 0

1Fh –18h

17h –10h

0Fh – 08h

07h – 00h

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Special Function Registers

PCON DPH DPL SP P0*TH1 TH0 TL1 TL0 TMOD TCON*

P1*SBUF SCON*

P2*IE*P3*IP*

PSW*

A*

B*FFh - F8hF7h - F0hEFh - E8hE7h - E0hDFh - D8hD7h - D0hCFh - C8hC7h - C0hBFh - B8hB7h - B0hAFh - A8hA7h - A0h9Fh - 98h97h - 90h8Fh - 88h87h - 80h

* - Bit Addressable Registers

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Description of SFR.. Accumulator (E0h) – It is an 8-bit register. It is the main Input

register of ALU(Arithmatic & Logical unit) & used in all arithmatic &

logical operations. The Bits of this register can be accessed by either

name of bits or by address of bits.

B (F0h) – It is also an 8-bit register. It is also the input register of

ALU(Arithmatic & Logical unit) & used in multiplication & divide

operations. The Bits of this register can be accessed by either name of

bits or by address of bits.

ACC.7 ACC.6 ACC.5 ACC.4 ACC.3 ACC.2 ACC.1 ACC.0

E7h E6h E5h E4h E3h E2h E1h E0h

B.7 B.6 B.5 B.4 B.3 B.2 B.1 B.0

F7h F6h F5h F4h F3h F2h F1h F0h

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Description of SFR.. P0 (80h), P1 (90h), P2 (A0h), P3 (B0h) – P0, P1, P2, and P3 are the

SFR latches of Ports 0, 1, 2, and 3, respectively.

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Description of SFR.. Program Counter (PC – Not Addressable) – It is an 16 bit not

addressable register that contain the address of next instruction of

program that is to be executed.

DPTR (DPH,DPL – 83h,82h) - The Data Pointer (DPTR) consists of a high

byte (DPH) and a low byte (DPL). Its intended function is to hold a 16-bit

address. It may be manipulated as a 16-bit register or as two

independent 8-bit registers.

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Registers

A

B

R0

R1

R3

R4

R2

R5

R7

R6

DPH DPL

PC

DPTR

PC

Some 8051 16-bit Register

Some 8-bitt Registers of the 8051

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Instructions

• Mov- mov destination,source ;copy source to

destination ex-mov a,#55h mov r0,a r0=a=55h

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