SPICE MODEL of 2SJ652 (Standard+BDS Model) in SPICE PARK

All Rights Reserved Copyright (c) Bee Technologies Inc. 2008

1

Device Modeling Report

Bee Technologies Inc.

COMPONENTS: Power MOSFET (Model Parameters) PART NUMBER: 2SJ652 MANUFACTURER: SANYO Body Diode (Model Parameters) / ESD Protection Diode


2

MOSFET MODEL

PSpice model parameter

Model description

LEVEL

L Channel Length

W Channel Width

KP Transconductance

RS Source Ohmic Resistance

RD Ohmic Drain Resistance

VTO Zero-bias Threshold Voltage

RDS Drain-Source Shunt Resistance

TOX Gate Oxide Thickness

CGSO Zero-bias Gate-Source Capacitance

CGDO Zero-bias Gate-Drain Capacitance

CBD Zero-bias Bulk-Drain Junction Capacitance

MJ Bulk Junction Grading Coefficient

PB Bulk Junction Potential

FC Bulk Junction Forward-bias Capacitance Coefficient

RG Gate Ohmic Resistance

IS Bulk Junction Saturation Current

N Bulk Junction Emission Coefficient

RB Bulk Series Resistance

PHI Surface Inversion Potential

GAMMA Body-effect Parameter

DELTA Width effect on Threshold Voltage

ETA Static Feedback on Threshold Voltage

THETA Mobility Modulation

KAPPA Saturation Field Factor

VMAX Maximum Drift Velocity of Carriers

XJ Metallurgical Junction Depth

UO Surface Mobility


3

0

5

10

15

20

25

30

35

40

45

0.0 10.0 20.0 30.0 40.0 50.0

gfs

(S)

Drain Current ID (-A)

Measurement

Simulation

Transconductance Characteristic

Circuit Simulation Result

Comparison table

-Id(A) gfs(S)

Error (%) Measurement Simulation

1.0000 9.000 9.414 4.60

2.0000 12.500 12.814 2.51

5.0000 18.600 18.857 1.38

10.0000 25.400 24.736 -2.61

20.0000 32.200 31.729 -1.46

50.0000 41.500 42.357 2.07


4

V1

0Vdc

V2

-10

0

V3

0Vdc

U12SJ652

V_V1

0V -1.0V -2.0V -3.0V -4.0V -5.0V

I(V3)

0A

-10A

-20A

-30A

-40A

-50A

Vgs-Id Characteristic

Circuit Simulation result

Evaluation circuit


5

Comparison Graph Circuit Simulation Result

Simulation Result

-ID(A) -VGS(V)

Error (%) Measurement Simulation

1 2.450 2.421 -1.20

2 2.550 2.510 -1.56

5 2.700 2.698 -0.06

10 2.900 2.927 0.92

20 3.250 3.279 0.89

50 4.100 4.079 -0.51


6

U12SJ652

0

V3

0Vdc

VDS

0Vdc

V1

-10

V_VDS

0V -100mV -200mV -300mV -400mV

I(V3)

0A

-1A

-2A

-3A

-4A

-5A

-6A

-7A

-8A

-9A

-10A

-11A

-12A

-13A

-14A

Rds(on) Characteristic


Evaluation circuit

Simulation Result

ID=-14A, VGS=-10V Measurement Simulation Error (%)

RDS (on) mΩ 28.500 28.500 0.00


7

Time*1mA

0 10n 20n 30n 40n 50n 60n 70n 80n

V(W1:4)

0V

-1V

-2V

-3V

-4V

-5V

-6V

-7V

-8V

-9V

-10V

Gate Charge Characteristic


Evaluation circuit

Simulation Result

VDD=-30V,ID=-28A ,VGS=-10V

Measurement Simulation Error (%)

Qgs nC 15.000 15.035 0.23

Qgd nC 12.000 11.958 -0.35

Qg nC 80.000 57.746 -27.82

VDD

-30

I1TD = 0

TF = 5nPW = 600uPER = 1000u

I1 = 0I2 = 1m

TR = 5n

-

+

W1

ION = 0uAIOFF = 1mAW

I228

0

D2Dbreak

U12SJ652


8

Capacitance Characteristic

Simulation Result

VSD(V) Cbd(pF)

Error(%) Measurement Simulation

0 810.000 810.000 0.000

5 280.000 279.250 -0.268

10 195.000 196.900 0.974

15 160.000 158.800 -0.750

20 135.000 135.900 0.667

25 120.000 120.265 0.221

30 110.000 108.755 -1.132

Simulation

Measurement


9

Time

0.6us 0.7us 0.8us 0.9us 1.0us 1.1us 1.2us 1.3us

V(U1:G) V(U1:D)/3

0V

-2V

-4V

-6V

-8V

-10V

-12V

-14V

Switching Time Characteristic


Evaluation circuit

Simulation Result

ID=-14A, VDD=-30V VGS=0/-10V

Measurement Simulation Error(%)

td(on) ns 33.000 33.016 0.05

0

VDD-30Vdc

V2TD = 1u

TF = 5nPW = 10uPER = 20u

V1 = 0

TR = 5n

V2 = 20

U12SJ652

L2

50nH

R2

50

R1

50

L1

30nH

RL

2.1


10

V2

-5

V1

0

0

V3

0Vdc

U12SJ652

V_V2

0V -0.5V -1.0V -1.5V -2.0V -2.5V -3.0V -3.5V -4.0V -4.5V

I(V3)

0A

-10A

-20A

-30A

-40A

-50A

Output Characteristic


Evaluation circuit

VGS=-3V

- 4

-6 -10


11

U12SJ652

VDS

0

Vsense

0Vdc

V_VDS

0V 0.3V 0.6V 0.9V 1.2V 1.5V

I(Vsense)

1.0mA

10mA

100mA

1.0A

10A

70A

BODY DIODE SPICE MODEL Forward Current Characteristic


Evaluation Circuit


12

0.001

0.010

0.100

1.000

10.000

0 0.3 0.6 0.9 1.2 1.5

Dra

in r

evers

e cu

rren

t ID

R (

-A)

Source - Drain voltage VSD (-V)

Measurement

Simulation

Comparison Graph Circuit Simulation Result

Simulation Result

IDR(-A) VSD(-V)

%Error Measurement Simulation

0.001 0.5000 0.4973 -0.53

0.01 0.5600 0.5595 -0.08

0.1 0.6200 0.6223 0.38

1 0.6950 0.6913 -0.53

2 0.7200 0.7176 -0.33

5 0.7600 0.7641 0.54

10 0.8150 0.8150 0.00

20 0.8900 0.8882 -0.20

50 1.0500 1.0505 0.05


13

U12SJ652

V1

TD = 90ns

TF = 10nsPW = 1usPER = 100us

V1 = -9.4v

TR = 10ns

V2 = 10.6v

R1

50

0

Time

0.2us 0.6us 1.0us 1.4us 1.8us 2.2us

I(R1)

-400mA

-300mA

-200mA

-100mA

-0mA

100mA

200mA

300mA

400mA

Reverse Recovery Characteristic Circuit Simulation Result

Evaluation Circuit

Compare Measurement vs. Simulation

Measurement Simulation Error (%)

trj ns 28.000 27.853 -0.52


14

Reverse Recovery Characteristic Reference

Trj=28.00(ns) Trb=72.00(ns) Conditions:Ifwd=lrev=0.2(A),Rl=50

Relation between trj and trb

Example

Measurement


15

R1

0.001m

V1

0Vdc

0

U1

2SJ652

R2

100MEG

V_V1

0V -10V -20V -30V -40V -50V

I(R1)

0A

-2mA

-4mA

-6mA

-8mA

-10mA

ESD PROTECTION DIODE SPICE MODEL Zener Voltage Characteristic


Evaluation Circuit


16

Zener Voltage Characteristic Reference

Technology

SPICE MODEL of 2SJ652 (Standard+BDS Model) in SPICE PARK