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IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 29, NO. 2, FEBRUARY 2014 759
Efficiency Optimization Through Current-Sharingfor Paralleled DC–DC Boost Converters With
Parameter EstimationHugues Renaudineau, Azeddine Houari, Ahmed Shahin, Jean-Philippe Martin, Serge Pierfederici,
Farid Meibody-Tabar, and Bernard Gerardin
Abstract—In this paper, a new current sharing technique on ageneral case of N paralleled DC–DC boost converters is presented.The proposed optimization is based on the knowledge of individualboost parameters. Every loss through the structure are modeled byequivalent resistors. Using an accurate online estimation of thoseresistors, the losses through each individual converter can be de-termined. Then, a new current sharing scheme is defined aiming tomaximize the global efficiency of the overall structure. To verify theproposed method, simulations and experiments have been realizedon a three-parallel boost converters structure.
Index Terms—Boost converters, current-sharing, parallel con-verters, parameter estimation.
I. INTRODUCTION
PARALLELING dc–dc converters is widely used sinceit leads to many desirable features [1]. First, paralleling
dc–dc converters allows a reduction of the size of components,especially inductive ones. It also reduces stress among individ-ual converters by segmenting the total power, leading to a betterglobal efficiency. Furthermore, this leads to an enhanced relia-bility, and allows possible reconfigurations when one or more ofthe paralleled modules present malfunctioning. In nonisolatedapplications, the boost converter is one of the most used sinceit is well known and allows good efficiency. In this paper, an Nparallel boost converters structure with one output capacitor isconsidered, as shown in Fig. 1.
A good reliability of energy conversion is always needed. Bydiagnosing the fault in its early stages, the reliability of the powerconversion system can be increased significantly [2]. To achievethis, it is very interesting to develop an efficient online parameterestimation. Many parameter estimation techniques have already
Manuscript received July 10, 2012; revised September 20, 2012, December21, 2012, and February 15, 2013; accepted March 18, 2013. Date of currentversion August 20, 2013. Recommended for publication by Associate EditorD. Vinnikov.
H. Renaudineau, A. Houari, J.-P. Martin, S. Pierfederici, and F. Meibody-Tabar are with the Universite de Lorraine Vandoeuvre-les-Nancy 54516, France(e-mail: [email protected]; [email protected]; [email protected]; [email protected]; [email protected]).
A. Shahin is with the El-Mansoura University, El-Mansoura 35516, Egypt(e-mail: [email protected]).
B. Gerardin is with ATECH society, Ennery 57365, France (e-mail:[email protected]).
Color versions of one or more of the figures in this paper are available onlineat http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TPEL.2013.2256369
Fig. 1. N parallel boost converters structure with one output capacitor.
been proposed for dc–dc boost converters. For example, in [3]and [4] a method to estimate inductance, capacitor, capacitorserial resistance, and load is presented. One of the main disad-vantages of the proposed technique, as for those proposed in [5]and [6], is that it requires a sampling frequency much higherthan switching frequency. For the present application, the sam-pling frequency is kept equal to the switching frequency. Forthis reason, Shahin et al. work [7] is of great interest. In thispaper, the authors proposed a method to model and estimatelosses of the boost converter through two equivalent resistors.Note that even if loss modeling is only represented through re-sistors, those parameters include every loss of the converter suchas capacitive or inductive ones.
Current sharing is an important functionality for parallelpower converters to ensure reliable and efficient operation [8].A good review of current-sharing techniques has been proposedby Chen et al. in [9] on different interconnection schemes. Afirst method for controlling parallel boost converters is to defineone converter as the master which imposes output voltage whileothers are slave and only current regulated. Master–slave con-trol have been used in [1] and [10]. Unfortunately, this controlstrategy is not suitable for a good reliability of the global sys-tem since it might suffer from fault tolerance against the failureof the master converter [1]. Another method found in the lit-erature is to use current sharing to manage the output voltageerror as done in [11] by using synergetic control. In [12], current
0885-8993 © 2013 IEEE
760 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 29, NO. 2, FEBRUARY 2014
sharing is directly integrated in a nonlinear controller design onthe case of a double-input H-bridge-based buckboost–buckboostconverter. A last method which can be underlined is presentedin [13] where the sharing scheme is used to cancel circulatingcurrent between parallel inverters.
However, in most of the applications, current reference isequally divided between the parallel elements as done in [14]–[17]. Equal power repartition has for example been used in [18],where the control is realized with a classical PID. Many studiespropose an equal repartition among many different structures,as for example in [19] on paralleled dual active bridge dc–dcconverters. This is also the case for classical control techniquesof paralleled inverters as done in [20] and [21]. Equal repartitionis also used while thinking in voltage mode controlled structureswith no current sensors as done in [22] and [23] on multiphasebuck converter structures.
In this paper, a new current-sharing method based on theknowledge of estimated loss parameters is proposed. As previ-ously mentioned, compared with the sharing techniques foundin the literature, the proposed method presents real advantages.In most of the literature, the current repartition is only designedin order to allow the system to work. However, as it will be un-derline in this paper, the repartition can influence on the globalstructure efficiency. Classically, this is not taken into account. Inthis aim, the new sharing scheme proposed in this paper allowsus to maximize the global efficiency of the overall structure.
II. STRUCTURE MODELING AND ESTIMATION
A. Model of the Structure
The system consists in N parallel boost converters with oneoutput capacitor as shown in Fig. 1. The considered modelingequations (1a) and (1b) are a direct application of Shahin et al.work [7]. In this paper, it is proposed to model losses througha boost converter by adding N serial and one parallel resistorsin the conventional ideal model. For the considered application,each individual boost converter model has a serial resistancersk
, while a unique parallel resistor Rp includes all the restof the losses for the whole structure. This difference with themethod proposed in [7] comes from the nature of the structurewith only one output capacitor and one output current sensor.The next section details the method to obtain an accurate onlineestimation of the resistor values⎧⎪⎪⎪⎨
⎪⎪⎪⎩
Lkdikdt
= Vin − rskik − (1 − dk ) Vo (1a)
CodVo
dt=
N∑
k=1
(1 − dk ) ik − iLoad − Vo
Rp(1b)
where dk represents the duty cycle corresponding to the PWMoutput signal uk .
Even if the adopted loss modeling is only represented throughresistors, it is useful to underline that not only ohmic losses aretaken into account. In fact, every loss through the converteris taken into account with those of equivalent resistors, suchas core hysteresis and eddy current losses, conduction ohmiclosses, and switching losses of semiconductors [7]. Particularly,
the parallel resistor Rp does not only represent the capacitorCo losses through its ESR. Indeed, it is well known the evenunder zero power, boost converters still present losses, whichwill be taken into account through parameter Rp while serialresistor is not able to model this behavior. Finally, parametersrsk
and Rp represent the overall losses through the structure.This will be verified in the experimental part by checking thatcalculated losses correspond to measurement. For a more detaildescription of this loss modeling technique, the reader is invitedto read reference [7], where analytical study is presented, aswell has load dependence behavior of such a modeling in thecase of a single-boost converter.
It has to be noticed that the estimation of losses through theconverters can also been used for others purpose. As an exam-ple, it can be used for verifying the ageing of the individualconverters by checking on the variations of the estimated equiv-alent resistors. This aspect cannot be developed in this papersince it is not its goal, but reader is again invited to read [7] formore details on the estimation.
B. Parameters Online Estimation
Before designing control laws and current-sharing technique,the system parameters need to be estimated. This has to be real-ized by considering online sampled signals, namely, Vin , ik , Vo
and iLoad . As proposed in [7], it is possible to estimate theequivalent loss resistors following (2) and (4).
Considering that the input power follows its reference Pin =P ref
in ∀t, serial resistors will be estimated through (2). This con-dition will be ensured with the current regulation presented inSection III
drsk
dt= λsk
·(Poutk
− Poutk
)·(
Vin
Pink
)2
. (2)
Wherepower Poutkand estimated power Poutk
follow (3), andλsk
convergence coefficients corresponding to serial resistor rsk
⎧⎨
⎩
Poutk= (1 − dk ) Voik
Poutk= Pink
− rsk
(Pink
Vin
)2
.(3)
Then, considering the output voltage perfectly regulated(Vo = V ref
o ∀t), the parallel resistor will be estimated through(4). This condition will be ensured through the energy regulationpresented in the following section
dRp
dt= λp ·
(id − id
)·R2
p
Vo. (4)
Where current id =∑
k (1 − dk ) ik , estimated current id =iLoad + Vo
Rp, and λp convergence coefficient for parallel resistor
Rp .
C. Stability of the Estimation
Exponential stability can be proved easily with the classicalLyapunov approach [7]. The stability and dynamics of the pro-posed estimations are determined by coefficients λsk
and λp .In order to demonstrate their stability, the Lyapunov candidate
RENAUDINEAU et al.: EFFICIENCY OPTIMIZATION THROUGH CURRENT-SHARING FOR PARALLELED DC–DC BOOST CONVERTERS 761
Fig. 2. Control strategy. Measurements are in green.
functions following (5) are defined as⎧⎪⎨
⎪⎩
V (rsk) =
12
(Poutk
− Poutk
)2
V(Rp
)=
12
(id − id
)2.
(5)
For a positive input power, their derivative can be expressedthrough (6)⎧⎪⎪⎪⎪⎪⎨
⎪⎪⎪⎪⎪⎩
V (rsk) =
(Poutk
− Poutk
) d(Poutk
− Poutk
)
drsk
drsk
dt
V(Rp
)=
(id − id
) d(id − id
)
dRp
dRp
dt
(6)
The derivatives of Lyapunov functions (6) can be simplifiedin view of (2) and (4), leading to (7)
⎧⎪⎪⎪⎨
⎪⎪⎪⎩
V (rsk) = −λsk
(Poutk
− Poutk
)2≤ −2λsk
V (rsk)
∀λsk, λp > 0
V(Rp
)= −λp
(id − id
)2≤ −2λpV
(Rp
).
(7)
Then, by choosing those two parameters positive, it is demon-strated that the estimation errors exponentially converge to 0.
III. CONTROL DESIGN
To ensure the control of the structure, it has been decidedto design a two-loop control scheme. A first controller enablesvoltage regulation through energy control. It is based on flat-ness control method. A second-loop controller, based on slidingmethod, ensure the current regulation for each individual con-verter. The proposed control strategy ensures asymptotic stabil-ity, robustness against parameter variations, and high dynamicsregulation. A block schematic of the entire control is given inFig. 2.
A. Energy Control Loop Based on Flatness
Flatness was firstly defined by Fliess et al. [24] using theformalism of differential algebra. It has been decided to indi-rectly control the output voltage Vo by regulating the energy E(8) stored in the capacitor Co . As detailed in [25] and [7], it ispossible to demonstrate that E is a flat output for the consideredsystem in view of (1a) and (1b)
E =12CoV
2o . (8)
To obtain a relationship between the input current referencesirefk and the flat output system E, the derivative E is considered
as
E = Pout − PLoad − V 2o
Rp. (9)
To ensure reference tracking, a second-order control law as(10) is proposed to cancel the static error(Eref −E
)+2ξE ωnE
(Eref −E)+ω2nE
∫
(Eref − E) dt = 0.
(10)The power Pout is given as follows:
Pout = Pin −N∑
k=1
rsk
(
αkPin
Vin
)2
. (11)
The parameters αk are power repartition coefficients. In thenext section, a new current-sharing scheme aiming to maximizethe overall efficiency will be detailed as a function of the pa-rameters αk . However, in order to transfer the needed powerthrough the structure, repartition coefficients must follow:
N∑
k=1
αk = 1 ⇒ αN = 1 −N −1∑
k=1
αk . (12)
Finally, current references are deduced from (13). ParameterP ref
in of this equation will be defined in Section IV
irefk = αk
P refin
Vin. (13)
B. Current Loops Design—a Sliding Approach
To ensure current regulation, it has been decided to design asliding-based controller as used in [26]. Sliding based controlallows robust regulation and has been detailed in [27]. It has al-ready been applied on the case of paralleled boosts in [28] whererobustness against inductor variations is underlined and guaran-teed. For each individual boost converter, the sliding surface Sk
is defined as follows:
Sk =(ik − iref
k
)+ Kik
∫(ik − iref
k
)dt. (14)
The current ik will follow its reference irefk if the derivative
of the surface Sk verify
Sk = −λikSk . (15)
Equations (14) and (15) can be expressed as
εk + (Kik+ λik
) εk + Kikλik
∫
εk dt = 0 (16)
where Kikand λik
are the current regulation parameters andεk =
(ik − iref
k
). Comparing (16) with a second-order law, it is
762 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 29, NO. 2, FEBRUARY 2014
TABLE IREGULATION PARAMETERS
possible to express current regulation pulsation ωI as
ω2Ik
= Kikλik
. (17)
By combining (1) and (15), it is possible to determine theequivalent duty cycle dke q allowing a good reference tracking
dke q = 1 +1Vo
[
rskik − Vin
+Lk
(
− λikSk +
direfk
dt− Kik
(ik − iref
k
))]
. (18)
C. Regulation Parameters
For simulations and experimental validation, the switchingfrequency is set to fs = 20 kHz. Table I shows parameters ofthe controllers. Parameters ωik
are chosen in order to verify(19) which is necessary to ensure the validity of the used meanmodel. In a two-loop control scheme, dynamics of the regulationmust be separated, then ωnE
is chosen in order to satisfy{
ωs = 2πfs � ωik(19a)
ωik� ωnE . (19b)
IV. REFERENCE POWER REPARTITION METHOD
By combining (9) and (11), the energy regulation gives theexpression (20) of the total input power reference P ref
in as afunction of repartition parameters αk , with P ref
out calculated from(9) as shown in Fig. 2
P refin =
V 2in −
√
V 4in − 4 ∗ P ref
out
(∑Nk=1 α2
k rsk
)
2(∑N
k=1 α2k rsk
) . (20)
Then, a new method to split the power between the parallelboost converters is presented. The proposed repartition aimsto maximize the global efficiency of the structure. Indeed, itis possible to demonstrate that there is a unique point whichminimizes the total input power reference P ref
in . This can beseen in Fig. 3, where total input power is presented as a functionof power repartition parameters on the case of three-parallelboost converters with the same parameters as used in Section V.Only two coefficients appear in this figure, while it is about athree-parallel boost converter structure; the third one is indeeddirectly imposed from (12).
As an example, in this case the minimum value differ fromequal repartition possibility. Then, the interest of the proposedmethod appears easily compared to the most used current-sharing technique. Therefore, it is needed to determine the repar-
Fig. 3. Input power function of power repartition coefficients for an imposedload of 620 W.
tition parameters αk , so that the input power reference P refin is
minimum for a given load reference P refout . In view of (12), P ref
inis a function of N − 1 parameters. Minimizing this referencepower leads to solve
{∂P ref
in
∂αk= 0, k = {1, N − 1} . (21)
The optimal values of parameters αk minimizing the inputreference power can be expressed as (22), presenting the advan-tage to be quite simple and so easily implementable. Under lowpower, parameters rsk
can not be precisely defined (they tend toinfinite for zero current). In this case, it is chosen to stop N − 1converters and uses only one
αoptk =
∏Nj = 1j �= k
rsj
∑Ni=1
∏Nj = 1j �= i
rsj
. (22)
Then, knowing parameters αk , the input power referenceis calculated from (20) so that it is possible to find currentreferences for each individual converter as (13). If the paral-lel converters have strictly the same parameters, the proposedrepartition leads to equal current references αk = 1
N . The maininterest in the proposed method appears when one converter ormore present a lower efficiency compared to the others (result-ing in differences on the estimated parameters rsk
). In this case,the proposed repartition leads to a lower current reference forthe less efficient converter, leading to a benefit on the globalefficiency.
Finally, before presenting simulation and experimental val-idation lets underline requirements for practical application ofthe proposed method. First, while measuring some precautionsmust be taken into account but such requirements are among theclassical thematic of digital control, and the proposed techniquedoes not require more accurate measurement than classicallyused for controlling similar power conversion structures. Sec-ond, in term of computational resources, it is obvious that thiscurrent-sharing strategy requires more than a simple equal shar-ing. However, additional calculations are quite simple and theadditional required computation time is not important. Then, inmost of the cases, implementing the proposed technique will
RENAUDINEAU et al.: EFFICIENCY OPTIMIZATION THROUGH CURRENT-SHARING FOR PARALLELED DC–DC BOOST CONVERTERS 763
TABLE IIEXPERIMENTAL PARAMETERS
not require to be changed the digital controller for an improvedone.
V. SIMULATION RESULTS
Simulation on three-parallel boost converters have been real-ized to verify the effectiveness of the proposed method. First,the current repartition is set to αk = 1
3 . At time t = 0.5 s, theproposed power repartition is enabled. Parameters taken forsimulation are the same as those listed in Table II for experi-mental verification. Serial and parallel resistors of the simulatedmodel are chosen constant for an easier computation. To vali-date our purpose, the simulated paralleled boost converters onwhich the proposed control is applied present different efficien-cies for each individual converter. This is simulated by imposingrs1 = 0.39 Ω, rs2 = 0.39Ω, and rs3 = 1.40Ω traducing morelosses through the third individual converter. This difference be-tween serial resistors is only one modeling of a poorer behaviorof the third converter. On a real boost converter, many reasonscan lead to such results, as many different losses are taken intoaccount through this resistor (see Section II-A and reference [7]for more details).
First, it is ensured that the estimated resistors converge totheir simulated values. Then, from (22), it is possible to calculateoptimal repartition coefficients as
⎧⎪⎨
⎪⎩
αopt1 = 0.439
αopt2 = 0.439
αopt3 = 0.122.
(23)
This results on different current references for each converter.Fig. 4 shows current on the previously described control scheme.Fig. 5 shows the efficiency of the structure. In this figure, the effi-ciency of the proposed current-sharing scheme can be observed.Indeed, when total power is equally divide through elements(t < 0.5 s), efficiency is about 2.4% less than the efficiencywith the proposed method. Note that the difference with respectto experimental result comes from the hypothesis that estimatedresistors are constant. In practice, those resistors change withrespect to the power as well described in [7]. This is also thereason why their is no long transitory in simulation, as explainedin the experimental part.
In view of these results, another advantage of the proposedcurrent sharing can be underlined. As shown in Fig. 4, the pro-posed repartition leads to a lower current in the less efficientconverter. Then, this converter will suffer lower stress than bet-
Fig. 4. Simulated average input currents ik .
Fig. 5. Efficiency of the structure—Simulation result.
ter converters. Finally, it can be assumed that the proposedcurrent-sharing scheme leads to make uniform ageing of theparalleled modules. Only ageing tests can corroborate this as-sertion but this aspect will not be treated in this paper. Thisproperty should have an effect on the structure health improv-ing its long-term reliability and facilitating its maintenance. Forexample, a three-parallel boost converter structure can be easilyrealized using integrated circuits planned for inverters. In thiscase, the ageing uniformity resulting from the proposed current-sharing scheme, will ensure a replacement of the used modulewhen all the semiconductors are deficient. On the other hand,for classical methods, the replacement can be needed for onlyone of the converters presenting malfunctioning.
VI. EXPERIMENTAL VERIFICATION
To verify the validity of the proposed method, experimentsare performed on a three-parallel boost converters structure.Parameters of the tested structure are listed on Table II andthe experimental hardware step-up is shown in Fig. 6. Controland estimation are realized with MATLAB-Simulink softwareand implemented; thanks to the dSpace 1103 device. Samplingis synchronized with the PWM signal; therefore, measurementgives the mean values of the voltages and currents. In orderto validate the proposed method, one of the parallel boost isartificially aged by introducing a 1Ω resistor in series.
764 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 29, NO. 2, FEBRUARY 2014
Fig. 6. Experimental test bench.
Fig. 7. Convergence of estimated parameters rsk—Experimental result.
Fig. 8. Convergence of estimated parameter Rp —Experimental result.
A. Control and Losses Estimation Validations
First, the validity of losses estimation is verified. Figs. 7 and8 attest the convergence of estimated resistors. As expected, oneof the serial resistor in about 1Ω higher than other, allowing toverify the interest and validity of the proposed power repartition.The correctness of those estimated parameters is also verifiedas measured losses are equal to estimated ones.
Fig. 9. Verification of the energy regulation—Result on the output voltageVo —Starting.
Fig. 10. Verification of the currents regulation—Mean values of the currentsfor a load step.
Fig. 9 shows voltage response when the regulation starts.At this time, output voltage varies from Vo = Vin = 48 V toVo = 100 V as expected. Fig. 10 shows the validity of currentregulations for a step of load from RLoad = 30Ω to RLoad =15 Ω with equal power sharing between the three converters. Inthis figure, only mean values of the currents are shown.
B. Current-Sharing Verification
In this section, the behavior of the proposed current-sharingscheme is verified and compared with equal repartition. Thoseresults have been obtained with a constant resistive loadRLoad = 15.15 Ω. As previously done by simulation, the nextresults have been obtained when power repartition passes fromequal (αk = 1
3 ) to the new optimal definition introduced in thispaper. Fig. 11 shows the evolution of the structure efficiency,and Fig. 12 the corresponding sampled currents ik . Repartitionparameters obtained with our method converge to the followingvalues:
⎧⎪⎨
⎪⎩
αopt1 = 0.438
αopt2 = 0.440
αopt3 = 0.122.
(24)
RENAUDINEAU et al.: EFFICIENCY OPTIMIZATION THROUGH CURRENT-SHARING FOR PARALLELED DC–DC BOOST CONVERTERS 765
Fig. 11. Efficiency of the structure—Experimental result.
Fig. 12. Sampled currents ik repartition—Experimental result.
Fig. 11 shows the validity of the proposed current-sharingscheme in term of efficiency, compared with the classical equalsharing technique. In this figure, the system starts with equalsharing between the converters, and when the proposed tech-nique is enabled, values are those of (24). After, the proposedrepartition is enabled, the efficiency converges to a higher value.The transitory which can be seen in this figure comes to the factthat estimated resistor values change with the functioning point,then changing the repartition which itself changes the function-ing point, and so forth, leading to a quite long transitory. Thislong transitory is only present in the tested case, where reparti-tion passes from equal to the proposed one to underline its ben-efit. In real application, this transitory will not exist while onlyone of the two repartition scheme will be applied (the proposedone). This transitory is also visible in Fig. 12, where currentstook time to definitely stabilize when the proposed approach isapplied. In this case, when all values have converged with theproposed repartition, the new value of estimated resistors arers1 = 0.356 Ω, rs2 = 0.354 Ω and rs1 = 1.459 Ω, leading torepartition parameters following (25). This difference explainsthe transitory, and is also the cause of the difference with theresults shown in simulation where equivalent loss resistors havebeen chosen constant with values equal to the one estimated
TABLE IIIEXPERIMENTAL PARAMETERS
Fig. 13. Efficiency load dependence—Advantage of the proposed method.
with equal sharing⎧⎪⎨
⎪⎩
αopt1 = 0.443
αopt2 = 0.447
αopt3 = 0.108.
(25)
For the tested case, the global efficiency of the structure in-creases from η = 78.7% to η = 81.4% when the proposed strat-egy is applied. Then, compared to equal sharing, which is themost used power repartition scheme, the method detailed in thispaper allows a global efficiency higher than 2.7%.
As mentioned viewing simulation results, the proposed tech-nique should lead to make uniform ageing between parallelelements. This can be visible in Fig. 12, where the current in theconverter presenting the more losses is the lower.
C. Load Dependence Experiment
In this part, the behavior of loss parameters and efficiencyare experiment with respect to the load power. As explainedpreviously, estimated loss resistors change with respect to theload. Then, advantage of the proposed method will depend onthe load power. Four level of power have been tested and arelisted in Table III.
The efficiency of the converter with equal sharing and with theproposed method are shown in Fig. 13. First, this result confirmthe attractivity of the proposed repartition scheme since it leadsto a gain in efficiency on the entire load range from 1.65% underlow power to 4.5% gain under higher power. It is also possibleto underline that the gain increases when power increases, andthat the maximum of efficiency of the structure is higher withthe proposed method. Then, compared with the classical equalsharing technique, the proposed method shows great advantageon the structure efficiency.
766 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 29, NO. 2, FEBRUARY 2014
VII. CONCLUSION
A new current-sharing technique on parallel dc–dc boost con-verters has been presented in this paper. Through online es-timation, individual converter losses are deduced and powerrepartition coefficients are redefined in order to maximize theefficiency of the overall structure. Output voltage and individualinput currents are regulated through a two-loop control designbased on flatness theory and sliding mode controllers.
Compared with the most used current-sharing technique con-sisting in equal repartition, the proposed method shows its inter-est when one or more converter in parallel present malfunction-ing. In these conditions, the presented method allows a gain inefficiency up to 4.5% in the tested cases, depending on the loadpower. Another benefit of the proposed repartition is the factthat it leads to uniform ageing between the paralleled elements.This should have an effect on the structure health improving itslong-term reliability and facilitating its maintenance. Long-termexperimentations are required to attest this last assumption andwill be part of future works.
The presented current sharing has been discussed, verified,and tested both by simulation and experiment. The validationhas been realized on the case of a three-parallel boost converterstructure, but the concept can easily be scaled to any number ofphases. Indeed, theoretical study has been led on the general caseof N converters in parallel. Practically, each phase will need itsown current regulation, its own serial resistor estimation, andthe repartition coefficients calculation will require only a fewmore time as the number of converter increase.
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Hugues Renaudineau received the M.S. degreein electrical engineering from Ecole NationaleSuperieure d’Electricit, Nancy, France, in 2009. Heis currently working toward the the Ph.D. degree withthe Groupe de Recherche en Electrotechnique et Elec-tronique de Nancy (GREEN), University of Lorraine,Nancy, in partnership with ATECH society.
His main research interests are modeling, control,and diagnosis on photovoltaic power systems.
RENAUDINEAU et al.: EFFICIENCY OPTIMIZATION THROUGH CURRENT-SHARING FOR PARALLELED DC–DC BOOST CONVERTERS 767
Azeddine Houari received the Engineer’s degree in2008 from Bejaia University, Bejaia, Algeria, and theM.Sc. and Ph.D. degrees from the Institut NationalPolytechnique de Lorraine, Vandoeuvre les Nancy,France, in 2009 and 2012, respectively.
He is currently a Doctor with the Groupe deRecherche en Electrotechnique et Electronique deNancy (GREEN), University of Lorraine, Nancy . Hiscurrent research interests include control of electri-cal hybrid systems, renewable energies, and stabilitystudy in microgrid applications.
Ahmed Shahin received the B.Sc. (first class Hons.)and M.Sc. degrees in electrical engineering from theDepartment of Electrical Engineering, the Faculty ofEngineering, El-Mansoura University, El-Mansoura,Egypt, in 2000 and 2004, respectively and the Ph.D.degree in electrical engineering from Ecole NationaleSuperieure d’Electricit, Institut National Polytech-nique de Lorraine, Nancy-University, Nancy, France,in 2011.
Since 2012, he has been engaged as a Doctor atMansoura University, Egypt. His research interests
are modeling, digital control, power electronics, dc–dc converters and activefilter, and fuel cell applications.
Jean-Philippe Martin received the Graduation de-gree from the University of Nancy, Nancy, France,and the Ph.D. degree from Institut National Polytech-nique de Lorraine (INPL), University of Lorraine,Nancy, in 2003.
Since 2004, he has been an Assistant Professorat INPL. His research activities in GREEN Labora-tory include the stability study of distributed powersystem, electrical machine controls, static converterarchitectures, and their interactions with new electri-cal devices (fuel cell and photovoltaic system).
Serge Pierfederici received the Engineer’s de-gree in electrical engineering from Ecole NationaleSuperieure d’Electricite Nancy, France, in 1994, andthe Ph.D. degree from Institut National Polytechniquede Lorraine (INPL), University of Lorraine, Nancy,France, in 1998.
Since 2009, he has been a Professor at INPL.His research activities deals with the stability studyof distributed power system and the control of multisources, and multiload systems.
Farid Meibody-Tabar received the Enginee’s degreefrom Ecole Nationale d’Electricite et de Mecanique(ENSEM), Nancy, France in 1982, the Ph.D. degreeand the Habilitation a diriger des recherches degreein 1986 and 2000, both from the Institut NationalPolytechnique de Lorraine, (INPL), University ofLorraine, Nancy.
Since 2000, he has been a Professor at the Uni-versity of Lorraine (ex. INPL). His research activi-ties in GREEN laboratory (Groupe de Recherche enElectrotechnique et Electronique de Nancy) deal with
electric machines, their supply, and their control and diagnosis.
Bernard Gerardin is the General Manager of ATECH society, Ennery, France,since 2002 . He works on industrial applications dealing with electric devices,automatism, and industrial computing. His main research interests include di-agnosis on photovoltaic power systems.
