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Seattle Pacific University EE 1210 - Logic System DesignAlteraBoard-2 Altera Cyclone II (484 Pin BGA) 22 Pins

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Page 1: Seattle Pacific University EE 1210 - Logic System DesignAlteraBoard-2 Altera Cyclone II (484 Pin BGA) 22 Pins
Page 2: Seattle Pacific University EE 1210 - Logic System DesignAlteraBoard-2 Altera Cyclone II (484 Pin BGA) 22 Pins

Seattle Pacific University EE 1210 - Logic System Design AlteraBoard-2

Altera Cyclone II (484 Pin BGA)

22 Pins

22 Pins

Page 3: Seattle Pacific University EE 1210 - Logic System DesignAlteraBoard-2 Altera Cyclone II (484 Pin BGA) 22 Pins

Seattle Pacific University EE 1210 - Logic System Design AlteraBoard-3

SW9L2

SW8M1

SW7M2

SW6U11

SW5U12

SW3V12

SW1L21

SW4W12

SW2M22

SW0L22

KEY3T21

KEY2T22

KEY1R21

KEY0R22

DE1 Pin Assignments

LEDR9

R17

LEDR8

R18

LEDR7

U18

LEDR6Y18

LEDR5V19

LEDR4T18

LEDR3Y19

LEDR2

U19

LEDR1

R19

LEDR0

R20

LEDG7Y21

LEDG6Y22

LEDG5

W21

LEDG4

W22

LEDG3V21

LEDG2V22

LEDG1U21

LEDG0U22

Page 4: Seattle Pacific University EE 1210 - Logic System DesignAlteraBoard-2 Altera Cyclone II (484 Pin BGA) 22 Pins

Seattle Pacific University EE 1210 - Logic System Design AlteraBoard-4

HEX3

DE1 Pin Assignments

0

1

2

3

4

5 6

HEX2

HEX1

HEX0

HEX0[0] PIN_J2HEX0[1] PIN_J1HEX0[2] PIN_H2HEX0[3] PIN_H1HEX0[4] PIN_F2HEX0[5] PIN_F1HEX0[6] PIN_E2

HEX1[0] PIN_E1HEX1[1] PIN_H6HEX1[2] PIN_H5HEX1[3] PIN_H4HEX1[4] PIN_G3HEX1[5] PIN_D2HEX1[6] PIN_D1

HEX2[0] PIN_G5HEX2[1] PIN_G6HEX2[2] PIN_C2HEX2[3] PIN_C1HEX2[4] PIN_E3HEX2[5] PIN_E4HEX2[6] PIN_D3

HEX3[0] PIN_F4HEX3[1] PIN_D5HEX3[2] PIN_D6HEX3[3] PIN_J4HEX3[4] PIN_L8HEX3[5] PIN_F3HEX3[6] PIN_D4

Page 5: Seattle Pacific University EE 1210 - Logic System DesignAlteraBoard-2 Altera Cyclone II (484 Pin BGA) 22 Pins

Seattle Pacific University EE 1210 - Logic System Design AlteraBoard-5

Steps in designing with Quartus II

1. Select target device

2. Design

• Use VHDL, Schematics, etc.

3. Synthesize

• Build (compile chip)

4. Simulate and verify

• Timing simulation

5. Check input/output pin assignments

• Change any that need to be moved

6. Program chip

Page 6: Seattle Pacific University EE 1210 - Logic System DesignAlteraBoard-2 Altera Cyclone II (484 Pin BGA) 22 Pins

Seattle Pacific University EE 1210 - Logic System Design AlteraBoard-6

Device Selection

• Assignments | Device

• Cyclone II

• EP2C20F484C7

Page 7: Seattle Pacific University EE 1210 - Logic System DesignAlteraBoard-2 Altera Cyclone II (484 Pin BGA) 22 Pins

Seattle Pacific University EE 1210 - Logic System Design AlteraBoard-7

Designing/Compiling/Simulating

• Use any of the following methods to make your design

• Schematics (Block Diagram File – .BDF)

• VHDL (.VHD)

• Verilog (.V)

• Leave the default settings for the compiler – just press “Play”

• Use the Simulator to check your work

• See tutorials (Homework 3) for a guide

Page 8: Seattle Pacific University EE 1210 - Logic System DesignAlteraBoard-2 Altera Cyclone II (484 Pin BGA) 22 Pins

Seattle Pacific University EE 1210 - Logic System Design AlteraBoard-8

Pin Assignment• Assign pins to input/output symbols

• For now inputs come from switches and buttons

• For now outputs go to LEDs

• Use the tables from the previous slides to figure out which pins are connected to the parts you need

• Select Assignments | Pins

• Use the table at the bottom – ignore the rest

• Enter the pin number for each I/O

Page 9: Seattle Pacific University EE 1210 - Logic System DesignAlteraBoard-2 Altera Cyclone II (484 Pin BGA) 22 Pins

Seattle Pacific University EE 1210 - Logic System Design AlteraBoard-9

Programming

• First, Re-Compile after selecting Pins• Select Tools | Programmer

• Power up the board (red button)

• Make sure RUN/PROG is in RUN mode

• Make sure USB-Blaster is specified – if not use the Hardware setup

• Click Start