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1 (Based on text: David A. Patterson & John L. Hennessy, Computer Organization and Design: The Hardware/Software Interface, 3 rd Ed., Morgan Kaufmann, 2007) Instructions - Instructions - Type and Format Type and Format

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COMPUTER ARCHITECTURE. Instructions - Type and Format. (Based on text: David A. Patterson & John L. Hennessy, Computer Organization and Design: The Hardware/Software Interface , 3 rd Ed., Morgan Kaufmann, 2007 ). COURSE CONTENTS. Introduction Instructions Computer Arithmetic - PowerPoint PPT Presentation

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(Based on text: David A. Patterson & John L. Hennessy, Computer Organization and Design: The Hardware/Software Interface, 3rd Ed., Morgan Kaufmann, 2007)

Instructions -Instructions -Type and FormatType and Format

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COURSE CONTENTSCOURSE CONTENTS Introduction InstructionsInstructions Computer Arithmetic Performance Processor: Datapath Processor: Control Pipelining Techniques Memory Input/Output Devices

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Instruction Type Instruction Format

InstructionsInstructions

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IntroductionIntroduction

Instruction: Words of machine’s language Instruction Set: Set of instruction RISC (Reduced Instruction Set Computer)

Design Principles: Principle 1: Simplicity favors regularity Principle 2: Smaller is faster Principle 3: Good design demands good compromises Principle 4: Make the common case fast

We’ll be working with MIPS architecture Used by NEC, Nintendo, Cisco, Silicon Graphics, Sony,

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MIPS Instruction Set MIPS Instruction Set Arch.: RegistersArch.: Registers

Registers - 32 general purpose registers, 3 special purpose registers, each 32 bits

$zero (0): constant 0 $at (1): reserved for assembler $v0-v1 (2-3): values for results &

expression evaluation $a0-a3 (4-7): arguments $t0-t7 (8-15): temporaries $s0-s7 (16-23): saved $t8-t9 (24-25): more temporaries $gp (28): global pointer $sp (29): stack pointer $fp (30): frame pointer $ra (31): return address

Registers $0 - $31

PC

Hi

Lo

3 special purpose registersPC: program counterHi, Lo: for multiply and divide

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MIPS Instruction Set MIPS Instruction Set Arch.:Arch.:MemoryMemory

Word length = 32 bits Memory: byte addressable, Big

Endian 1 word = 4 bytes Each address is to a byte

Registers are smaller than memory, but with faster access time

Note: Word – unit of access in a computer Big-endian – uses leftmost or “big end”

byte as word address Little-endian – uses rightmost or “little

end” byte as word address

Memory

Register

32 bits

8 bits

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Registers vs. Registers vs. MemoryMemory

Arithmetic instructions operands must be registers,

Only 32 registers provided Compiler associates variables with

registers What about programs with lots of variables

Processor I/O

Control

Datapath

Memory

Input

Output

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InstructionsInstructions Load and store instructions Example:

C code: A[12] = h + A[8]; MIPS code: lw $t0, 32($s3)

add $t0, $s2, $t0sw $t0, 48($s3)

Can refer to registers by name (e.g., $s2, $t2) instead of number

Store word has destination last Remember arithmetic operands are registers,

not memory! Can’t write: add 48($s3), $s2, 32($s3)

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Our First ExampleOur First Example Can we figure out the code?

swap(int v[], int k);{ int temp;

temp = v[k]v[k] = v[k+1];v[k+1] = temp;

}

swap:muli $2, $5, 4add $2, $4, $2lw $15, 0($2)lw $16, 4($2)sw $16, 0($2)sw $15, 4($2)jr $31

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MIPS Instruction TypesMIPS Instruction Types

Arithmetic & logic (AL) add $s1, $s2, $s3 # $s1 $s2 + $s3 sub $s1, $s2, $s3 # $s1 $s2 - $s3

each AL inst. has exactly 3 operands, all in registers

addi $s1, $s2, 100 # s1 $s2 + 100 the constant is kept in the instruction itself

Data transfer (load & store) lw $s1, 100($s2) # $s1 memory [$s2+100] (load word) sw $s1, 100($s2) # memory[$s2+100] $s1 (store word) lb $s1, 100($s2) # $s1 memory [$s2+100] (load byte) sb $s1, 100($s2) # memory[$s2+100] $s1 (store byte)

load/store bytes commonly used for moving characters (ASCII)

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MIPS Instruction TypesMIPS Instruction Types

Conditional Branch beq $s2, $s3, L1 # branch to L1 if $s2 = $s3

bne $s2, $s3, L1 # branch to L1 if $s2 $s3beq $s1, $s2, 25 # branch to PC + 4 + 100 (=4x25) if $s1 = $s2

slt $s2, $s3, $s4 # if ($s3) < ($s4) then $s2 1; # else $s2 0 (set on less than) Unconditional Branch j Loop # go to Loop (jump)

j 2500 # go to 4x2500=10000 (jump) jr $t1 # go to $t1 (jump register) jal Proc1 # $ra PC + 4; go to Proc1 (jump & link)

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Compiling a HighCompiling a HighLevel LanguageLevel Language

Assignment statement (operands in registers, operands in memory)

Assignment statement (operands with variable array index) If-then-else statement Loop with variable array index While loop Case / switch statement Procedure that doesn’t call another procedure Nested procedures Using strings Using constants Putting things together

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Arithmetic instructions useful for assignment statements

Data transfer instructions useful for arrays or structures

Conditional branches useful for if-then-else statements & loops

Unconditional branches Case / switch statements, procedure calls and returns

Compiling a HighCompiling a HighLevel LanguageLevel Language

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Basic BlocksBasic Blocks

A basic block is a sequence of instructions without branches except possibly at the end, and without branch targets or branch labels, except possibly

at the beginning One of the first early phases of compilation is

breaking the program into basic blocks

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Procedure CallProcedure Call

Use the following registers $a0-a3: to pass parameters $v0-v1: to return values for results & expression evaluation $ra: return address $sp: stack pointer (points to top of stack) $fp: frame pointer

Use the following instructions jal ProcedureAddress # it jumps to the procedure address and

saves # the return address (PC + 4) in register $ra jr $ra # return jump; jump to the address stored in register

$ra Use stack

a part of memory to save the registers needed by the callee

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Nested ProceduresNested Procedures

Use stack to preserve values ($a0-a3, $s0-s7, $sp, $ra, stack above $sp, and $fp & $gp if need to use them)

No need to preserve $t0-t9, $v0-v1, stack below $sp Frame pointer serves as stable base register within procedure for local

references Procedure frame (activation record):

$fp

$sp

Arg. registers

Return address

$fp

$sp

Saved registers

Local arrays &

structures

$fp

$sp

High address

Low address

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Instruction FormatInstruction Format All instructions are 32 bits 3 types of formats:

R-type (Regular)I-type (Immediate)J-type (Jump)

Fields (# of bits) op (6): opcode (basic operation) rs (5): 1st register source

operand rt (5): 2nd register source opd. rd (5): register destination opd. shamt (5): shift amount funct (6): function (select

specific variant of operation in op field)

Op rs rt rd shamt funct

Op rs rt address/immediate

Op target address

address/immediate (16)target address (26)

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Instruction Format Instruction Format (Examples) - 1(Examples) - 1

R-type Examples: add $t0, $s2, $t0 sub $s1, $s2, $s3 slt $s1, $s2, $s3 jr $ra #0s in rt, rd, and shamt fields

I-type Examples: lw $s1, 100($s2) #100 appears in address/immediate field sw $s1, 100($s2) #100 appears in address/immediate field beq $s1, $s2, 25 # 25 appears in address/immediate field (eqv. to

100) J-type Examples:

j 2500 #2500 appears in target address field (eqv. to 4x2500=10000)

jal 2500 #2500 appears in target address field (eqv. to 4x2500=10000)

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R-type Example: add $t0, $s2,

$t0

I-type Example: lw $s1,

100($s2)

J-type Example: j 2500

Op=35 rs=18 rt=17 100

Op=0 rs=18 rt=8 rd=8 shamt=0 funct=32

Op=2 2500

000000 10010 01000 01000 00000 100000

Instruction Format Instruction Format (Examples) - 2(Examples) - 2

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Motivation for I-type Motivation for I-type InstructionsInstructions

For many operations, one operand = constantC compiler gcc: 52%Spice 69%

Design principle: Make the common case fast

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J-Type InstructionsJ-Type Instructions

Example:j 200 # go to location 800 (=200*4)

Other J type instruction: jal 200 # jump & link, go to location 800 (=200*4)

# $31(ra) PC + 4

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Assembly Language Assembly Language vs. Machine vs. Machine LanguageLanguage

Assembly provides convenient symbolic representation

much easier than writing down numbers e.g., destination first

Machine language is the underlying reality e.g., destination is no longer first

Assembly can provide ‘pseudoinstructions’ e.g., “move $t0, $t1” exists only in Assembly would be implemented using “add $t0, $t1, $zero”

When considering performance you should count real instructions

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SummarySummary

Instruction Type Instruction Format RISC Design Principles Assembly vs. Machine Language