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Computer Architecture Computer Architecture Instruction Set Instruction Set Architecture Architecture Lynn Choi Lynn Choi Korea University Korea University

Computer Architecture Instruction Set Architecture

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Computer Architecture Instruction Set Architecture. Lynn Choi Korea University. Machine Language. Programming language High-level programming languages Procedural languages: C, PASCAL, FORTRAN Object-oriented languages: C++, Objective-C, Java Functional languages: Lisp, Scheme - PowerPoint PPT Presentation

Text of Computer Architecture Instruction Set Architecture

  • Computer Architecture

    Instruction Set ArchitectureLynn ChoiKorea University

  • Machine LanguageProgramming languageHigh-level programming languagesProcedural languages: C, PASCAL, FORTRANObject-oriented languages: C++, Objective-C, JavaFunctional languages: Lisp, SchemeAssembly programming languages: symbolic machine languagesMachine languages: binary codes (1s and 0s)TranslatorCompilerTranslates high-level language programs into machine language programsAssembler: a part of a compilerTranslates assembly language programs into machine language programsInterpreterTranslates and executes programs directlyExamples: JVM(Java virtual machine): translate/execute Java bytecode to native machine instructions

  • Compilation ProcessPreprocessorCompilerAssemblerLoader/Linkage EditorSource programExpanded Source ProgramAssembly ProgramRelocatable codeTarget programExpands macros into the source programLibraries, relocatableobject files

  • CompilerCompilerA program that translates a source program (written in language A) into an equivalent target program (written in language B)

    Source programUsually written in high-level programming languages (called source language) such as C, C++, Java, FORTRANTarget programUsually written in machine languages (called target language) such as x86, Alpha, MIPS, SPARC, or ARM instructionsWhat qualities do you want in a compiler?Generate correct codeTarget code runs fastCompiler runs fastSupport for separate compilation, good diagnostics for errors


  • Compiler PhasesI.C. : Intermediate CodeO.C. : Optimized Code

  • Compiler Structure Front-End : language dependent part Back-End : machine dependent part

  • Machine StateISA defines machine states and instructionsRegistersCPU internal storage to store data fetched from memoryCan be read or written in a single cycleArithmetic and logic operations are usually performed on registersMIPS ISA has 32 32-bit registers: Each register consists of 32 flip-flopsTop level of the memory hierarchyRegisters caches memory hard disk Registers are visible to programmers and maintained by programmersCaches are invisible to programmers and maintained by HWMemoryA large, single dimensional array, starting at address 0To access a data item in memory, an instruction must supply an address.Store programs (which contains both instructions and data)To transfer data, use load (memory to register) and store (register to memory) instructions

  • Data Size & AlignmentData sizeWord : the basic unit of data transferred between register and memory32b for 32b ISA, 64b for 64b ISADouble word: 64b data, Half word: 16b data, Byte: 8b dataLoad/store instructions can designate data sizes transferred: ldw, lddw, ldhw, ldbByte addressabilityEach byte has an addressAlignmentObjects must start at addresses that are multiple of their sizeObject addressedAligned addressesMisaligned addressesByte0, 1, 2, 3, 4, 5, 6, 7NeverHalf Word0, 2, 4, 61, 3, 5, 7Word0, 41, 2, 3, 5, 6, 7Double Word01, 2, 3, 4, 5, 6, 7

  • Machine InstructionOpcode : specifies the operation to be performedEX) ADD, MULT, LOAD, STORE, JUMPOperands : specifies the location of dataSource operands (input data)Destination operands (output data)The location can beMemory specified by a memory address : EX) 8(R2), x1004FRegister specified by a register number : R1

  • Instruction TypesArithmetic and logic instructionsPerforms actual computation on operandsEX) ADD, MULT, SHIFT, FDIVIDE, FADDData transfer instructions (memory instructions)Move data from/to memory to/from registersEX) LOAD, STOREInput/Output instructions are usually implemented by memory instructions (memory-mapped IO)IO devices are mapped to memory address spaceControl transfer instructions (branch instructions)Change the program control flow Specifies the next instruction to be fetchedUnconditional jumps and conditional branchesEX) JUMP, CALL, RETURN, BEQ

  • Instruction Format

    Op: Opcode, basic operation of the instructionRs: 1st source registerRt: 2nd source registerRd: destination registershamt: shift amountfunct: Function code, the specific variant of the opcodeUsed for arithmetic/logic instructions

    Rs: base registerAddress: +/- 215 bytes offset (or also called displacement)Used for loads/stores and conditional branches

    oprsrtrdshamtfunctoprsrtaddress6 5 5 5 5 66 5 5 16R-typeI-type

  • MIPS Addressing ModesRegister addressingAddress is in a registerJr $raBase addressingAddress is the sum of a register and a constantLdw $s0, 100($s1)Immediate addressingFor constant operandAdd $t1, $t2, 3PC-relative addressingAddress is the sum of PC and a constant (offset)Beq $s0, $s1, L1Pseudodirect addressingAddress is the 26 bit offset concatenated with the upper bits of PCJ L1

  • MIPS Instruction formats

    Arithmetic instructions

    Data transfer, conditional branch, immediate format instructions

    Jump instructions

    oprsrtrdshamtfunct6 5 5 5 5 6R-typeoprsrtaddress/immediate6 5 5 16I-typeopaddress6 26J-type

  • MIPS Instruction Example: R-formatMIPS Instruction:add $8,$9,$10

    Binary number per field representation:Called a Machine Language InstructionDecimal number per field representation:hex representation: 012A 4020hexdecimal representation: 19,546,144ten

  • MIPS Instruction Opcode Table

  • Procedure Call & ReturnSteps of procedure call & returnPlace parameters in a place where the callee can access$a0 - $a3: four argument registersTransfer control to the calleeJal callee_address : Jump and link instruction put return address (PC+4) in $ra and jump to the calleeAcquire the storage needed for the calleePerform the desired taskPlace the result value in a place where the caller can access$v0 - $v1: two value registers to return valuesReturn control to the callerJr $ra

  • StackStack frame (activation record) of a procedureStore variables local to a procedureProcedures saved registers (arguments, return address, saved registers, local variables)Stack pointer : points to the top of the stackFrame pointer : points to the first word of the stack frame

  • MIPS Memory Allocation

  • MIPS Register Convention

  • MIPS Example : Procedureint leaf_example (int g, int h, int i, int j){ int f; f = (g + h) ( i + j); return f;}Assembly codeleaf_example: sub $sp, $sp, 8 sw $t1, 4($sp) # save register $t1, $t0 onto stack sw $t0, 0($sp) add $t0, $a0, $a1# $t0 = g + h add $t1, $a2, $a3# $t1 = i + j sub $v0, $t0, $t1# $v0 = (g + h) (i + j) lw $t0, 0($sp)# restore $t0, $t1 for caller lw $t1, 4($sp) add $sp, $sp, 8 jr $ra

  • MIPS Example : RecursionInt fact (int n){ if (n =2, go to L1 addi $v0, $zero, 1# return 1 addi $sp, $sp, 8# pop 2 items off stack jr $raL1: addi $a0, $a0, -1# $a0 = n - 1 jal fact# call fact(n 1) lw $a0, 0($sp) # pop argument n and return address lw $ra, 4($sp) addi $sp, $sp, 8 # mul $v0, $a0, $v0 # return n * fact(n 1) jr $ra

  • Homework 2Read Chapter 7 (from Computer Systems textbook)Exercise2.